Unit-4 Memory Ppts
Unit-4 Memory Ppts
MEMORY
• A memory is just like a human brain. It is
used to store data and instruction. Computer
memory is the storage space in computer
where data is to be processed and instructions
required for processing are stored.
• The memory is divided into large number of small
parts. Each part is called a cell. Each
location or cell has a unique address which
varies from zero to memory size minus one.
• Memory is primarily of two types
• Internal Memory − cache memory and
primary/main memory
• External Memory − magnetic disk / optical
disk etc.
Memory Hierarchy
Characteristics of Memory Hierarchy are
following when we go from top to bottom.
• Capacity in terms of storage increases.
• Cost per bit of storage decreases.
• Frequency of access of the memory by the
CPU decreases.
• Access time by the CPU increases.
RAM
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SRAM Performance
19
Dynamic RAM
DRAM read Operations
22
DRAM write Operations
23
DRAM Characteristics (Why Slow!)
o Destructive Read
When cell read, charge removed
Charge must be restored after a read
o Refresh
Capacitors are not perfect! there’s steady leakage
Charge must be restored periodically
o DRAM are dense (lots of cells) so there are many
address lines.
To reduce the physical size of DRAM we can reduce the
number of pins by applying the address lines serially in two
parts:
• Row Address, and then
• Column Address
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• 2D and 2.5D Memory organization
• Internal structure of Memory either RAM or ROM is
made of memory cells which contains a memory
bit. Now the memory is formed in multidimensional
array of rows and columns. In which each cell stores
a bit and a complete row contains a word. A
memory simply can be divided in this below form.
• 2n = N where, n is the no. of address lines and N is
the total memory in bytes.
There will be 2n words.
• 2D Memory organization –
In 2D organization memory is divides in the form of rows
and columns.
• Each row contains a word now in this memory
organization there is a decoder.
• A decoder is a combinational circuit which contains n
input lines and 2n output lines.
• One of the output line will select the row which address
is contained in the MAR. And the word which is
represented by the row that will get selected and either
read or write through the data lines.
• 2.5D Memory organization –
In 2.5D Organization the scenario is the same but
we have two different decoders one is column
decoder and another is row decoder. Column
decoder used to select the column and row
decoder is used to select the row. Address from the
MAR will go in decoders’ input. Decoders will select
the respective cell. Through the bit outline, the data
from that location will be read or through the bit in
line data will be written at that memory location.
• Read and Write Operations –
• If the select line is in Read mode then the Word/bit
which is represented by the MAR that will be coming out
to the data lines and get read.
• If the select line is in write mode then the data from
memory data register (MDR) will go to the respective cell
which is addressed by the memory address register
(MAR).
• With the help of the select line the data will get selected
where the read and write operations will take place.
• Comparison between 2D & 2.5D Organizations –
• In 2D organization hardware is fixed but in 2.5D hardware
changes.
• 2D Organization requires more no. of Gates while 2.5D
requires less no. of Gates.
• 2D is more complex in comparison to the 2.5D
Organization.
• Error correction is not possible in the 2D organization but In
2.5D error correction is easy.
• 2D is more difficult to fabricate in comparison to the 2.5D
organization.