DSP Processors

Addressing Modes
 C5X Addressing Modes

• Immediate addressing
• Direct addressing
• Memory mapped register addressing
• Dedicated register addressing
• Indirect addressing
• Circular addressing

C5X Addressing Modes – Manish Tiwari 2

 Immediate Addressing Mode
• The data to be accessed is stored immediately after
the Opcode.
• Used to specify the constant value.
Short Immediate:
• In this case the length of instruction is 1-word and
constant is specified as the part of Opcode.
• The length of short constant is 8-bits, however, in a
few cases it is 9-bit or 13 bit.
e.g. ADD #01 ; Add const ‘01’ to ACC
ADD #k ; k is short constant
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 Immediate Addressing (Contd.)
Long Immediate:
• Length of the Immediate Operand (i.e. constant) is
16-bits.
• Length of the instruction is two-words, and the
second word is treated as 16-bit const or long
immediate.
• e.g. ADD #1234H ; Add const ‘1234H’
to ACC
ADD #lk ; lk is long constant.
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 Direct Addressing Mode
• Memory address of the data item is provided directly in
the instruction.
• The C5X processor splits entire data memory into 512
pages, each of which are 128 words long.
• Out of 16 memory address bits, the Data Memory page
pointer (DP) gives the 9-bit page number and 7-bits from
the instruction specifies the word within the page.
16-bit Data Memory Address (dma)
DP dir
(9-bits) (7-bits)

15 76 0
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 Direct Addressing (Contd.)
• The memory pages in C5X (Page 0 to Page 511)
Access
Word 07
in Page 1
DP = 01
DP dir
0 0000 0001 000 Page 1
0111
0080 Word 0
H
0081
H
: Word 7

:
0087
H
:
:
:
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 Direct Addressing (Contd.)
• Example
ADD 01H ; Add memory word stored at an address
01 in current page to ACC.
Current page is obtained by the content of Data Pointer DP.
Let DP=06. So 16-bit address is formed as
DP dir
Address = 0 0000 0110 | 000 0001
= 0000 0011 0000 0001 = 0301H = dma
dma – Data Memory Address
ADD 01H ; Add the content of the data memory
location 301H to ACC.
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 LDP
• After the reset DP is unpredictable, so it must be
initialized before use.

• LDP Instruction Load Data Pointer

LDP #06H ; Load 06 in DP (9-bit short

immediate)

So, to add from location 0301H

LDP #06H ; Point to memory Page 6.
ADD 01H ; Add the content of the data memory
location 301H to ACC.
• Later we discuss more about LDP.
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 Memory Mapped Register
Addressing
• This addressing mode is similar to direct addressing
mode except that it is applicable only on data memory
Page 0.
• In this case the data memory address (dma) is formed
by forcing 9 MSBs of address on DAB to be 0,
irrespective of the contents of DP.
0 0000 000
dir (7-bits)
0  16-bit dma on DAB
• This allows us to address the memory-mapped
registers (which are present at Page 0) directly, without
the overhead of changing the DP or auxiliary register.
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 Memory Mapped Addressing
(Contd.)
• The data memory Page 0 is formed as shown below.

Page 0 • The memory mapped

0000H 0
registers can be addressed
96 MEMORY
MAPPED either by their name or by
REGISTERS
their actual memory
address.
005FH 95
0060H 96 • e.g. saying 10H or AR0 is
32 Words
SCRATCH PAD same, as 10H is the
RAM
007FH (DARAM B2) 127
address of AR0 in Page 0.

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 LAMM & SAMM
LAMM- Load Accumulator from Memory Mapped Register
e.g. LAMM PMST Load Accumulator from PMST.
ACCL  PMST
ACCH  0
LAMM 07H Load Accumulator from address 07H in Page 0.
Same as LAMM PMST as 07H is address of
PMST.

LAMM
ACCL  (dma) dma is data memory address
ACCH  0

SAMM- Store ACCL in Memory Mapped Register

ACCL  (dma) dma is data memory address
e.g. SAMM INDX Store Accumulator in INDX.

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 Example Program 1
Write a program to copy a data word from memory
location 10H to 12H in memory Page 0.

.mmregs ; Include memory mapped registers.

.ps 0A00H ; Originate the program at program
memory address 0A00H.
.entry ; Initialize the program counter with 0A00H
(i.e. starting address of program).

LAMM 10H ; Read word from 10H. (or LAMM AR0)

SAMM 12H ; Store word at 12H. (or SAMM AR2)

.end ; End of program.

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 LMMR & SMMR
LMMR- Load Memory Mapped Register from data memory
e.g. LMMR AR0, #1500H Load AR0 from memory address
1500H.
LMMR 10H, #1500H Load AR0 from memory address 1500H.
(Note that 10H in Page 0 is address of AR0).

LMMR dir, #addr 0  dir  127 (7-bits)

0  addr  65535 (16-bits)
(Page0 - dir)  (addr)

SMMR- Store Memory Mapped Register in data memory

SMMR dir, #addr 0  dir  127 (7-bits)
0  addr  65535 (16-bits)
(Page0 - dir)  (addr)
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 Indirect Addressing Mode
• In this addressing mode, the data memory address
is not directly specified in the instruction but
specified through one of the Auxiliary Register
(ARs).
– The Auxiliary Register Pointer (ARP) tells which of the ARs
is to be used to supply memory address.
– If ARP = 001B, it means AR1 is currently selected AR used
to specify data memory address (dma).
– Symbol ‘*’ is used to specify currently selected AR in the
instruction.

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 Indirect Addressing (Contd.)
• Let ARP=001B and AR1=1234H

ADD * ; Add the content of data memory location pointed

by currently selected AR (i.e. AR1) to Accumulator.
i.e. ACC  ACC + ((AR1))

; Alternately, Add the content of data memory

location 1234H Indirectly to Accumulator. i.e.
ACC  ACC + (1234H)

ACC  ACC + ((AR1))  ACC  ACC + (1234H)

ACC  ACC + (dma)
where dma is specified by the content of currently
selected AR i.e. AR1.
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 Indirect Addressing (Contd.)
• Following symbols are used in Indirect addressing
* Use current AR, as selected ARP, for the
operation.
*+ Post Increment. Use current AR for operation and
increment current AR after the operation.
*- Post Decrement. Use current AR for operation and
decrement current AR after the operation.
*0+ Use current AR for operation and add INDX to
current AR after the operation.
*0- Use current AR for operation and subtract INDX from
current AR after the operation.
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 Indirect Addressing (Contd.)
• Let ARP=001B, AR1=1234H and INDX = 4

ADD *+ ; Indirect Addition with Post Increment

Before Operation After Operation
ARP = 1 ARP = 1
AR1 = 1234H AR1 = 1235H

ADD *0- ;Indirect Addition with Post Subtraction

by INDX
Before Operation After Operation
ARP = 1 ARP = 1
AR1 = 1234H AR1 = 1230H
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 LACC
• LACC – Load Accumulator from memory with left shift as
specified by the instruction.
LACC {ind} [,SHIFT [,ARn]]
0  SHIFT  16; Default SHIFT is 0.
0  n  7; Operands in [ ] are optional.
– LACC * – Load ACC indirectly through current AR. Current AR is
specified by ARP.
– LACC *,1, AR3 – Load ACC indirectly through current AR, left
shift the data by 1-bit and change the current AR to AR3
(ARP=3).
– LACC *,0, AR2 – Load ACC indirectly through current AR and
change the current AR to AR2 (i.e. ARP=2). SHIFT is mandatory
if AR has to be changed.
• Later, we discuss more on LACC and its uses.
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 LACC (Contd.)
• Let us consider following data to understand LACC
with indirect addressing. Data item 2345H has been
shifted to obtain different data.

2345H = 0010 0011 0100 0101 Original Data

46BAH = 0 0100 0110 1000 1010 1-bit Left Shifted
8D14H = 0 1000 1101 0001 0100 2-bit Left Shifted
11A28H = 1 0001 1010 0010 1000 3-bit Left Shifted

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 LACC (Contd.)
• ARP INDX AR2 All Memory Locations
2 2 1250H 2345H

Instruction Executed After Execution

ACC AR2 ARP
LACC *,0 (or LACC *) 2345H 1250H 2
LACC *+,1 468AH 1251H 2
LACC *-,2 8D14H 1250H 2
LACC *0+,3 11A28H 1252H 2
LACC *0-,1 468AH 1250H 2
LACC *+,0,AR3 2345H 1251H 3
SHIFT is mandatory if AR has to be changed. So, SHIFT is 0 in the
last instruction.

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 BIT-Reversed Addressing
• In Bit-Reversed addressing content of AR is
modified by INDX. If during the modification of AR,
any carry is generated by the bit, then the carry is
propagated in reversed direction.
e.g. 1 1 0 0 Carry given in right (reverse)
direction
+ 0100
1010
• This addressing mode is very useful in FFT, as
calculation of FFT requires to access the data items
stored in memory in bit-reversed order.
• Next we see organization of data for calculation of
8-Point FFT.
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 BIT-Reversed Addressing (Contd.)
Memory x(0) X(0)
Addres Data
s x(4) X(1)
0060H x(0) x(2) X(2)
8-Point
0061H x(1) x(6) X(3)
FFT
0062H x(2) x(1) X(4)
Calculatio
0063H x(3) x(5) n X(5)
0064H x(4)
x(3) X(6)
0065H x(5)
x(7) X(7)
0066H x(6)
0067H x(7)
• Observe that base address of data table is 0060H which
is evenly divisible by 8.

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 BIT-Reversed Addressing (Contd.)
• If we need to calculate N-Point FFT, then the data
items should be stored at a memory address that is
evenly divisible by N.
• So, the address stored in selected AR should be
evenly divisible by N.
• The INDX register should be loaded by N/2.
• SYMBOLS
– BR0+ AR incremented by INDX with reverse carry
propagation
– BR0- AR decremented by INDX with reverse carry
propagation
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 BIT-Reversed Addressing (Contd.)
N INDX ARP AR6
8 4 6 0060H
0000 0100 0110 0000
Arrow indicates address
Instruction Executed After Executionused by LACC for
reading.
ACC AR6=AR6+INDX
LACC *BR0+ x(0) 0110 0100 = 0064H
Load ACC from location 0060H i.e. ACC=x(0), after execution
AR6=64H
LACC *BR0+ x(4) 0110 0010 = 0062H
LACC *BR0+ x(2) 0110 0110 = 0066H
LACC *BR0+ x(6) 0110 0001 = 0061H
LACC *BR0+ x(1) 0110 0101 = 0065H
LACC *BR0+ x(5) 0110 0011 = 0063H
LACC *BR0+ x(3) 0110 0111 = 0067H
LACC *BR0+ x(7) 0110 0000 = 0060H
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 Dedicated Register Addressing
• In this addressing mode the address comes from
one of the two special-purpose memory-mapped
registers, BMAR (Block Move Address Register) and
DBMR (Dynamic Bit Manipulation Register).
• e.g. OPL 030AH (PLU Instruction)
– Content of data memory location 030A is ORed with the
content of DBMR and result is stored at data location
030AH.
– If content of DBMR is 00FFH and FF00H is stored at 030AH
then, (DBMR) OR (030AH)  (030AH)
– i.e. 00FFH OR FF00H = FFFFH  (030AH)

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 Dedicated Register Addressing
(Contd.)
• e.g. BLDD BMAR, 030AH (Block MOVE
Instruction)
– Copy the content of data memory location pointed by
BMAR to the data memory location 030AH.
– If content of BMAR is 0150H then, (0150H)  (030AH)

• The advantage of this addressing mode is that the

address of the block of memory to be acted upon
can be changed during execution of program.

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 Circular Addressing Mode
• Many algorithms such as convolution, correlation,
and finite impulse response (FIR) filters can use
circular buffers in memory to implement a sliding
window, which contains the most recent data to be
processed.

• The circular addressing mode in C5x support such

kind operations through certain memory-mapped
registers and via ARs.

• In particular there are two circular buffers to

support circular addressing mode.

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 Circular Addressing (Contd.)
• CBSR – Circular Buffer Start Registers. They are used
to hold starting address for circular addressing.
– CBSR1 : CBSR for Circular Buffer1
– CBSR2 : CBSR for Circular Buffer2
• CBER – Circular Buffer End Registers. They are used
to hold ending address for circular addressing.
– CBER1 : CBER for Circular Buffer1
– CBER2 : CBER for Circular Buffer2
• CBCR – Circular Buffer Control Register. This register
controls the operation of circular buffers.
• To understand the idea let us consider the following
diagram for circular convolution.

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 Circular Addressing (Contd.)
x(0) 0200H

x(3) x(1) 0203H 0201H

x(2) 0202H
After Sample x(3), the After Address 0200H, the
algorithm should go to algorithm should go to Address
Sample x(0) 2003H.

• There should be a start register (CBSR) to hold address

0200H.
• There should be an end register (CBER) to hold address
0203H.
• Addressing
C5X There Modes
should be
– Manish an AR that traverse from 0200H goes to 29
Tiwari
 Circular Addressing (Contd.)
• Let CBSR1 = 0200H, CBER1 = 0203H, ARP = 6 and
AR6=0200H (= CBSR1). Further, let Buffer 1 is enabled.
Before Instruction Executed After
Execution
Execution
AR6 ACC AR6
0200H LACC *+ x(0) 0201H
0201H LACC *+ x(1) 0202H
0202H LACC *+ x(2) 0203H
0203H LACC *+ x(3) 0200H
In the last instruction, AR6=0203H before LACC was executed.
LACC reads data from 0203H and modifies AR6 but, the CBCR
makes sure that after modification AR6=0200H.

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 Circular Addressing (Contd.)
• The algorithm for circular buffer addressing below shows
how the test of AR value is performed before any
modification:
If (ARn = CBER) and (Any AR Modification)
Then: ARn = CBSR
Else: ARn = ARn + Step.
• If current AR = CBER and no AR modification occurs, the
current AR is not modified and is still equal to CBER.
• When the current AR = CBER, any AR modification
(increment or decrement) will set the current AR = CBSR.
• As long as Step = 1, no problems occur in circular
addressing. However, problems may occur when Step >
1.
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 Circular Addressing (Contd.)
• Let CBSR1 = 0200H, CBER1 = 0203H, INDX = 2, ARP = 6 and
AR6=0200H (=CBSR1).
Before Execution Instruction Executed After Execution
AR6 ACC AR6
0202H LACC *0+ x(2) 0204H
After modification AR6 = 0204H i.e. beyond CBER1. Since modification in
AR6 was not done at boundary (i.e. at address = CBER1) so no
restrictions on AR6.
0203H LACC *0+ x(3) 0200H
After modification AR6 = 0200H as modification in AR6 is done at
boundary.
0203H LACC * x(3) 0203H
LACC does not modify the AR so no change in AR6, even though it is
pointing to boundary.
0203H LACC *- x(3) 0200H
LACC is modifying AR6 at boundary so AR6=0200H.
C5X Addressing Modes – Manish Tiwari 32
 The CBCR
1 1 1 1 1 1 9 8 7 6 5 4 3 2 1 0
5 4 3 2 1 0
RESERVED CENB CAR 2 CENB1 CAR 1
• CENB2 – Circular Buffer 2 Enable
2 bit.
– CENB2 = 0 Circular Buffer 2 disabled.
– CENB2 = 1 Circular Buffer 2 Enabled.
• CAR2 – Circular Buffer 2 Auxiliary Register (AR) bits.
• CENB1 – Circular Buffer 1 Enable bit.
– CENB1 = 0 Circular Buffer 1 disabled.
– CENB1 = 1 Circular Buffer 1 Enabled.
• CAR1 – Circular Buffer 1 Auxiliary Register (AR) bits.
• Same ARs should not be used for both the buffers.

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 The CBCR (Contd.)
• Obtain CBCR word to use Circular Buffer 1 with
AR6.
1 1 1 1 1 1 9 8 7 6 5 4 3 2 1 0
5 4 3 2 1 0
RESERVED CENB CAR 2 CENB1 CAR 1
2
0000 0000 0 000 1 1 1 0
= 000EH
• SPLK #000EH, CBCR
– Load 000EH into CBCR to enable Circular Buffer 1 with AR6.
– SPLK is a PLU instruction that use direct addressing so DP
should be initialized to Memory Page 0 to access memory-
mapped registers.

C5X Addressing Modes – Manish Tiwari 34

 Example Program 2
Write a program using circular addressing
mode to read data from memory. The data is
organized as below.

Memory
Addres Data Starting Address = 0200H =
s
CBSR1
0200H x(0)
0201H x(1) Ending Address = 0203H =
0202H x(2)
CBER1
0203H x(3)

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 Example Program 2 (Contd.)
.mmregs ; Include memory-mapped registers.
.ps 0A00H ; Originate the program at program memory address 0A00H.
.entry ; Initialize the program counter with 0A00H
LDP #00H ; DP=00 i.e. Data Pointer to point Memory Page 0.
SPLK #0EH, CBCR ; Enable Circular Buffer 1 with AR6.
SPLK #200H, CBSR1 ; Initialize Circular Buffer 1 Start Register.
SPLK #203H, CBER1 ; Initialize Circular Buffer 1 End Register.
SPLK #200H, AR6 ; Load Starting Address in AR6 (i.e. AR6=0200H).
MAR *, AR6 ; Make AR6 as current AR i.e. ARP=6.
LACC *+ ; Read x(0) in ACC i.e. ACC = x(0) and AR6=201H.
LACC *+ ; Read x(1) in ACC i.e. ACC = x(1) and AR6=202H.
LACC *+ ; Read x(2) in ACC i.e. ACC = x(2) and AR6=203H.
LACC *+ ; Read x(3) in ACC i.e. ACC = x(3) and AR6=200H.
.end ; End of program.

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