Computer Organization and

Architecture
(CoSc2041)

Chapter 1-Introduction to
Digital Logic Circuit

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 Outline
 Logic Gates
 Boolean Algebra
 Combinational Circuit
 Flip Flops
 Sequential Circuits

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 Logic Gates | Introduction

Digital Computers
 The digital computer is a digital system that performs
various computational tasks.
 The word digital implies that the information in the
computer is represented by variables that take a
limited number of discrete values.
 These values are processed internally by components
that can maintain a limited number of discrete states.
 Digital computers use the binary number system,
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which has two digits: 0 and 1, digit is called a bit.
 Digital …

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  The central processing unit (CPU) contains an arithmetic and logic
unit for manipulating data, a number of registers for storing data,
and control circuits for fetching and executing instructions.
 The memory of a computer contains storage for instructions and
data it is called a Random-Access Memory (RAM).
 The Input and Output Processor (IOP) contains electronic circuits
for communicating and controlling the transfer of information
between the computer and the outside world.

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 Basic Terms
Computer organization is concerned with the way the hardware
components operate and the way they are connected together to form the
computer system.
 Computer design is concerned with the hardware design of the computer.

It is the task of the designer to develop hardware for the system. This aspect
of computer hardware is sometimes referred to as computer implementation.
Computer architecture is concerned with the structure and behavior of

the computer as seen by the user. It includes the information formats, the
instruction set, and techniques for addressing memory. The architectural
design of a computer system is concerned with the specifications of the
various functional modules.

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 Logic Gates

 Binary information is represented in digital computers by physical

quantities called signals.
 Electrical signals such as voltages exist throughout the computer
in either one of two recognizable states.
 The two states represent a binary variable that can be equal to 1 or
0.
 Binary logic deals with binary variables and with operations that
assume a logical meaning.
 It is used to describe, in algebraic or tabular form, the
manipulation and processing of binary information.

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 Logic Gates…
 The manipulation of binary information is done by logic circuits called
gates.
 Gates are blocks of hardware that produce signals of binary 1 or 0
when input logic requirements are satisfied.
 A variety of logic gates are commonly used in digital computer
systems.
 Each gate has a distinct graphic symbol and its operation can be
described by means of an algebraic expression.
 Logical Gates in computer system are AND gate, OR gate, NOT gate,
NOR gate, and XOR gate.

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 AND

 The AND gate produces the AND logic function: that is, the
output is 1 if input A and input B are both equal to 1; otherwise,
the output is 0.\
 These conditions are also specified in the truth table for the AND
gate.


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 OR

The OR gate, the output is 1 if input A or input B or both inputs are

1 otherwise, the output is 0.
 The algebraic symbol of the OR function is +, similar to arithmetic

addition, the output is 1 if any input is 1.

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 NOT/ inverter

 The inverter circuit inverts the logic sense of a binary signal. It

produces the NOT, or complement, function. The algebraic
symbol used for the logic complement is either a prime or a bar
over the variable symbol.

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 Buffer
A triangle symbol by itself designates a buffer circuit.
Buffer does not produce any particular logic function since the

binary value of the output is the same as the binary value of the input.

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 NAND

 The NAND gate is the complement of the AND gate, as indicated

by the graphic symbol, which consists of an AND graphic symbol
followed by a small circle. The designation NAND is derived from
the abbreviation of NOT- AND.

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 NOR

 The NOR gate is the complement of the OR gate and uses an OR

graphic symbol followed by a small circle.

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 exclusive-OR

 The exclusive-OR gate has a graphic symbol similar to the OR

gate except for the additional curved line on the input side.
 The output of this gate is 1 if any input is 1 but excludes the
combination when both inputs are 1.

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 exclusive-NOR
 The exclusive-NOR is the complement of the exclusive-OR, as
indicated by the small circle in the graphic symbol.
 The output of this gate is 1 only if both inputs are equal to 1 or
both inputs are equal to 0.

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 Introduction

 Logic Gates
 Boolean Algebra
 Combinational Circuit
 Flip Flops
 Sequential Circuits

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 Boolean Algebra

 Boolean algebra is an algebra that deals with binary variables and logic
operations.
 A Boolean function can be expressed algebraically with:
– Binary variables,
– The logic operation symbols,
– Parentheses and equal sign.
 For a given value of variables, the Boolean function can be either 1 or
0.
 Example: Boolean function F = x + y’z
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 Boolean…
 For the given Boolean function the function F is equal to 1 if x
is 1 or if both y’ and z are equal to 1; F is equal to 0 otherwise.
 Truth table for the above Boolean expression is presented in
the next slide.
X Y Z F
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1

19 Figure 1-3: Truth table and logic diagram for F = x + y’z

 Boolean…

The purpose of Boolean algebra is to facilitate the

analysis and design of digital circuits. It provides a
convenient tool to:
1. Express in the algebraic form a truth table relationship
between binary variables.
2. Express in algebraic form the input-output relationship of
logic diagrams.
20 3. Find simpler circuits for the same function.
  A Boolean function specified by a truth table can be
expressed algebraically in many different ways. By
manipulating a Boolean expression according to Boolean
algebra rules, we can obtain a simpler expression that will
require fewer gates.
 To see how this is done, we must first study the
manipulative capabilities of Boolean algebra.
 Table 1-1 lists the most basic identities of Boolean
algebra. All the identities in the table can be proven by
means of truth tables.
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Basic Identities of Boolean Algebra

 Annulment  Complement
A+1 = 1 A+A’ = 1  Commutative
A.A’ = 0
A.0 = 0 A+B = B+A
 Double negation A.B = B.A
 Identity
(A’)’ = A  Distributive
A.1 = A  De-morgan’s A.(B+C) = (A.B)+
A+0 = A (A.B)’ = A’+B’ (A.C)
 Idempotent (A+B)’ = A’.B’ A+(B.C)= (A+B).
(A+C)
A+A = A  Associative  Absorptive
A.A = A (A+B)+C = A+(B+C)
(A.B).C = A.(B.C) A+(A.B) = A
A.(A+B) = A
 Bool…
Consider the following Boolean algebra expression: and simplify
and draw the logical circuit

AB’ + C’D + AB’ + C’D

By letting x = AB’ + C’D the expression can be written as x + x .
From identity we find that x + x = x.
Thus the expression can be reduced to only two terms:
 AB’ + C’D + AB’ + C’D = AB’ + C’D

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 Bool…
 DeMorgan’s theorem is very important in dealing with NOR and
NAND gates. It states that a NOR gate that performs the (x + y)’
function is equivalent to the function x’y’. Similarly, a NAND function
can be expressed by either (xy)’ or (x’ + y’). For this reason the NOR
and NAND gates have two distinct graphic symbols, as shown in
Figs. 1-4 and 1-5.

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  Example 2: compare the logical circuit of the following bowling
algebra expression with its simplify form
 F = ABC + ABC’ + A’C
 Soln
 F = ABC + ABC’ + A’C = AB(C + C’) + A’C = AB + A’C
 Note that (C + C)’ = 1 by identity 7 and AB.1 = AB by identity 4 in
Table 1-1.

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 The two circuits are equivalent and produce the same truth
table relationship between inputs A, B, C and output F.

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 Complement of a Function

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 Example
 Z = A+(A’B) Distributive law
 Z = (A+A’)(A+B) Complement law
 Z = 1(A+B) identity law
 Z=(A+B)

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  Exercise
 F = ABC + ABC’ + A’C

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 Map Simplification

 The complexity of the logic diagram that implements a Boolean

function is related directly to the complexity of the algebraic expression
from which the function is implemented.
 The expression may be simplified using the basic
relations of Boolean algebra.
 Pictorial method for simplifying Boolean expressions.
 Special form of a truth table which enables easier
pattern recognition.
 The map method is also known as the Karnaugh
map or K-map
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 Rules

 A group must contain only 1s, no 0s

 A group can only be in vertical or horizontal
no diagonal
 A group must contain 2n 1s (1,2,4,8..)
 Each group should be as large as possible
 Groups may overlap
 Groups may wrap around a table
 Every one must be at least in one group
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 Driving Expressions from a K-map

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 2. Combinational Circuit

 A combinational circuit is a connected arrangement

of logic gates with a set of inputs and outputs.
 At any given time, the binary values of the outputs
are a function of the binary combination of the
inputs.

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 Half-Adder…

The design of combinational circuits starts from the

verbal outline of the problem and ends in a logic circuit
diagram.
The procedure involves the following steps:
1. The problem is stated.
2. The input and output variables are assigned letter symbols.
3. The truth table that defines the relationship between inputs and
outputs is derived.
4. The simplified Boolean functions for each output are obtained.
5. The logic diagram is drawn.

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 Half-Adder

 These circuits serve as basic building blocks for the

construction of more complicated arithmetic circuits.
 The most basic digital arithmetic circuit is the
addition of two binary digits.
 A combinational circuit that performs the
arithmetic addition of two bits is called a half-
adder.
 The input variables of a half-adder are called the
augend and addend bits.
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 Half-Adder …

 The Boolean functions for the two outputs can be obtained

directly from the truth table:
 S = x’y + xy’ = x y
 C = xy
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 Full-Adder

 A full-adder is a combinational circuit that forms the

arithmetic sum of three input bits
 It consists of three inputs and two outputs.
 Two of the input variables, denoted by x and y,
represent the two significant bits to be added.
 The third input, z, represents the carry from the
previous lower significant position.
 Two outputs are necessary because the arithmetic sum
of three binary digits ranges in value from 0 to 3, and
43 binary 2 or 3 needs two digits.
 Full-Adder…

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 3. Flip Flops
 The digital circuits considered thus far have been combinational,
where the outputs at any given time are entirely dependent on the
inputs that are present at that time.
 Synchronous sequential circuits employ signals that affect the
storage elements only at discrete instants of time.
 Synchronization is achieved by a timing device called a clock
pulse generator that produces a periodic train of clock pulses.
 The clock pulses are distributed throughout the system in such a
way that storage elements are affected only with the arrival of the
synchronization pulse.

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 Flip Flops…

 The storage elements employed in clocked sequential circuits are

called flip-flops.
 A flip-flop is a binary cell capable of storing one bit of information.
 It has two outputs, one for the normal value and one for the
complement value of the bit stored in it.
 A flip-flop maintains a binary state until directed by a clock pulse to
switch states.

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 SR Flip-Flop

 It has three inputs, labeled S (for set), R (for reset), and C (for
clock).
 It has an output Q and sometimes the flip-flop has a
complemented output, which is indicated with a small circle at the
other output terminal.
 There is an arrowhead-shaped symbol in front of the letter C to
designate a dynamic input.
 The dynamic indicator symbol denotes the fact that the flip-flop
responds to a positive transition (from 0 to 1) of the input clock
signal.

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 SR Flip-flop…

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 SR Flip-flop…
 If there is no signal at the clock input C, the output of the circuit
cannot change irrespective of the values at inputs S and R.
 Only when the clock signal changes from 0 to 1 can the output be
affected according to the values in inputs S and R.
 If S = 1 and R = 0 when C go from 0 to 1: Q is set to 1.
 If S = 0 and R = 1 when C go from 0 to 1, Q is cleared to 0.
 If both S and R are 0 during the clock transition, the output does
not change.

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 Q(t) Q(t+1) S R
S R Q(t+1)

0 0 0 x
0 0 Q(t)

0 1 1 0
0 1 0

1 0 0 1
1 0 1

1 1 x 0
1 1 Indeterminate

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 D Flip-flop
 An SR flip-flop is converted to a D flip-flop by inserting an
inverter between S and R and assigning the symbol D to the single
input.
 The D input is sampled during the occurrence of a clock transition
from 0 to 1.
 If D = 1, the output of the flip-flop goes to the 1 state, but if D = 0,
the output of the flip-flop goes to 0 state.

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 D Flip-flop…

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 D Flip-flop…
We note that the next state Q(t + 1) is determined from the D input.
The relationship can be expressed by a characteristic equation:

 Q(t + 1) = D

This means that the Q output of the flip-flop receives its value from
the D input every time that the clock signal goes through a transition
from 0 to 1.

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 Q(t) Q(t+1) D
0 0 0
0 1 1
D Q(t+1) 1 0 0
1 1 1

0 0

1 1

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 JK Flip-flop
A JK flip-flop is a refinement of the SR flip-flop in that the
indeterminate condition of the SR type is defined in the JK type.
 Inputs J and K behave like inputs S and R to set and clear the flip-
flop, respectively.
 When inputs J and K are both equal to 1, a clock transition
switches the outputs of the flip-flop to their complement state.

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 JK Flip-flop

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 JK Flip-flop
 The J input is equivalent to the S (set) input of the SR flip-flop,
and the K input is equivalent to the R (clear) input.
 Instead of the indeterminate condition, the JK flip-flop has a
complement condition Q (t + 1) = Q’(t) when both J and K are
equal to 1 .

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 J K Q(t+1) Q(t) Q(t+1) J K

0 0 Q(t)
0 0 0 x

0 1 0
0 1 1 x

1 0 1
1 0 x 1

1 1 Q'(t)
1 1 x 0

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 T Flip-Flop

 T Flip-flop is obtained from a JK type when inputs J and K are

connected to provide a single input designated by T.
T flip-flop has only two conditions.
 When T = 0 (J = K = 0) a clock transition
does not change the state of the flip-flop.
 When T = 1 (J = K = 1) a clock transition
complements the state of the flip-flop. These
conditions can be expressed by a
characteristic equation:
59  Q(t + 1) = Q(t) T
 T Flip-flop…

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 T Q(t+1) Q(t) Q(t+1) T
0 0 0
0 Q(t) 0 1 1
1 0 1
1 Q'(t) 1 1 0

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 4. Sequential Circuits
 A sequential circuit is an interconnection of flip-flops and gates.
 The gates by themselves constitute a combinational circuit, but
when included with the flip-flops, the overall circuit is classified
as a sequential circuit.
 It consists of a combinational circuit and a number of clocked flip-
flops.
 The combinational circuit block receives binary signals from
external inputs and from the outputs of flip-flops.
 The outputs of the combinational circuit go to external outputs
and to inputs of flip-flops.

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  Reading assignment
– State Table and Design Diagram

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  THANK YOU !

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