Scribd
Upload
6 views

Unit2-Hardware Solution to Process Synchronization

The document discusses hardware solutions for process synchronization, particularly focusing on the TestAndSet and Exchange instructions that help manage critical sections (CS) in multiprocessor systems. It highlights the drawbacks of disabling interrupts and presents algorithms that utilize these hardware instructions to ensure mutual exclusion while noting that they do not satisfy the bounded-waiting requirement. The document also provides code structures for implementing these instructions in processes attempting to enter their critical sections.

Uploaded by

jagajagatheeswari360
Copyright
© © All Rights Reserved
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
6 views

Unit2-Hardware Solution to Process Synchronization

The document discusses hardware solutions for process synchronization, particularly focusing on the TestAndSet and Exchange instructions that help manage critical sections (CS) in multiprocessor systems. It highlights the drawbacks of disabling interrupts and presents algorithms that utilize these hardware instructions to ensure mutual exclusion while noting that they do not satisfy the bounded-waiting requirement. The document also provides code structures for implementing these instructions in processes attempting to enter their critical sections.

Uploaded by

jagajagatheeswari360
Copyright
© © All Rights Reserved
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
You are on page 1/ 19

Hardware Solution to Process

Synchronization

J Paul Rajasingh
Asst Prof (Sr.G)
SRM IST, Chennai
Hardware Solution
•Software solutions require no help from hardware
•The hardware-supported solution developed for the CS
problem make use of hardware instructions present on
many systems
Eg:
1.Motorola 68 K machine has Test- and Set Lock
instruction
2.IBM-370 machine has Compare – and –swap
instruction
3.Intel 8086 machine has exchange (XCHG) instruction
• In a uniprocessor system, only 1 process executes at a
time
• The other processes can gain control of the processor
through interrupts
• In order to solve CS problem, an interrupt should not
happen when a process is in CS
• A process can achieve it by disabling interrupts before
entering into its CS, and it can enable the interrupts
after finishing execution in its CS
Drawbacks:
1.Disabling interrupts in a multiprocessor environment
takes time as messages are passed to all processors.
This message passing delays processes from
entering their CS and decreasing the system efficiency

2. It affects the scheduling goals as the processor cant


be preempted from a process executing in its CS
Due to the drawbacks of the above method, many
systems provide special hardware instructions to test
and modify the content of a word or swap the contents
of 2 words atomically
1.TestAndSet () instruction

•TestAndSet () instruction is an instruction to solve CS problem

•This instruction is executed atomically.,


i.e, if two TestAndSet instructions are executed
simultaneously(each on different CPU) , they will be executed
sequentially in some arbitrary order
The process switch can’t take place during the execution
of this TSL instruction. It will be either fully executed or it will
not be executed at all
The instruction works like a bathroom door lock
If the lock is off, one enters the bathroom and puts the
lock on. Otherwise, he waits till the lock is set off by the
outgoing person
In the instruction, the contents of a variable (say lock)
are tested
If lock ==0 ( lock is off), the lock is set to
on(i.e.,lock=1)
The caller of the instruction is informed accoridingly in
terms of the lock being true or false
• It executes as an atomic instruction
• If 2 TestAndSet () instructions are executed
simultaneously(each on a different CPU) in a
multiprocessor system, one must complete before
another one can start on another processor
• Here the mutual exclusion can be implemented by
allowing the processes to share a boolean variable, say
lock, initialized to false
Definition of TestAndSet instruction
int TestAndSet (int lock)
{
if(lock==0)
{
lock=1;
return 1;
}
else
return 0;
}
Structure of the code segment for a process say Pi trying to
enter the CS
lock=0
Process p
do
{
while(!TestAndSet(lock))
doNothing();
CRITICAL SECTION
lock=0;
REMAINING CODE
}while(True);

9
• Any process which wishes to enter its CS executes the
TestAndSet instruction and passes the value of lock as a
parameter to it
• If the value of lock is false(means no process is in its CS),
the TestAndSet instruction sets the lock to true and returns
false, which breaks the while loop and permits the process
to enter its CS
• If the value of lock is true, the TestAndSet instruction
returns true and thus blocking the process in the loop
• The algorithm satisfies the mutual exclusion requirement,
but doesn’t satisfy the bounded-waiting requirement

10
2.Exchange() instruction
•It is a hardware instruction which exchanges the contents of
a memory variable called ‘memVar and a process register
called ‘cpuReg’
•When a process wants to enter its CS, it sets ‘memVar’ to 1
and executes the exchange instruction
•A process can enter its CS only ‘memVar’=0 after the
execution of the exchange instructions

11
Suppose we have N processes competing to enter
its CS

12
Exchange instruction
exchange(int memVar, int cpuReg)
{
int temp;
temp=memVar;
memVar=cpuReg;
cpuReg=temp;
}

13
Structure of the code segment for a process say Pi trying to
enter the CS
cpuReg=0
process pi
while(1)
{
memVar=1;
while(memVar!=0)
exchange(memVar,cpuReg);
CRITICAL SECTION
exchange(memVar,cpuReg);
Remainder section
}
14
 It satisfies only the mutual exclusion
requirement
It doesn’t satisfy the bounded-waiting
requirement

15
Eg:
Let Pi be the process wants to enter its CS.
Let memVar=1
After exchange instruction gets executed,
memVar=0 and cpuReg=1
As memVar=0, Pi enter its CS
Assume Pj wants to enter its CS
It sets memVar=1
After exchange instruction gets executed,
memVar=1 and cpuReg=1
Hence it cant enter its CS and made to wait
All processes other than Pi go into bounded waiting
16
3.Modified algorithm using TestAndSet() Instruction
•The algorithm lets processes share the following 2
variables:
boolean lock;
boolean waiting[N];
•The variable lock and all the elements of array waiting
are initialized to false
•Each process also has a local Boolean variable, say key
Structure of the code segment for a process say Pi
do
{
waiting[i]=true;
key=true;
While (waiting[i] &&key)
key=TestAndSet(lock);
waiting[i]=false;
Critical Section
j=(i+1) %N;
while(j!=I && waiting[next_ts]==false)
j=(j+1) mod N;
if(j==i)
lock=false;
else
waiting[j]=false;
remaining code
}
While(1);

You might also like