Chapter 8

Input-Output Organization
 Peripheral Devices

• Input or output devices attached to the computer are called peripherals.

• I/O operations are accomplished through a wide assortment of external
devices that provide a means of exchanging data between the external
environment and the computer.
• An external device attaches to the computer by a link to an I/O module as
shown in figure 8.1 below.
• The link is used to exchange control, status, and data between the I/O
module and the external device.
• An external device connected to an I/O module also called Interface is often
referred to as a peripheral device or simply a peripheral. 2
 … Cont’d

Figure 8.1: Connection of CPU,I/O modules and Peripheral Devices

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 … Cont’d

Classification of External devices

• External devices broadly can be classified into three categories:
1. Human readable: suitable for communicating with the computer user.
• Examples: Screen, keyboard, video display terminals (VDT) and printers.
2. Machine readable: suitable for communicating with equipment’s.
• Examples: magnetic disk & tapes systems, Monitoring and control, sensors and
actuators which are used in robotics.
3. Communication: These devices allow a computer to exchange data with remote
devices, which may be machine readable or human readable.
• Examples: Modem, Network Interface Card (NIC)

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 I/O Interface

• I/O provides a method for transferring information between internal storage (CPU and
Memory) and extremal storage (peripherals).
Major difference between peripherals and CPU
1. Peripherals are electromechanical and electromagnetic devices and their manner of
operation is different from the operation of CPU and memory, which are electronic
devices.
2. The data transfer rate of peripherals is usually slower than the transfer rate of the CPU,
and consequently, a synchronization mechanism may be needed.
3. Data codes and formats in peripherals differ from the word format in the CPU and
memory.
4. The operating modes of peripherals are different from each other and each must be
controlled so as not to disturb the operation of other peripherals connected to the CPU. 5
 … Cont’d

Input/output Problems
• Wide variety of peripherals
• Delivering different amounts of data per second
• Work at different speeds
• Send/receive data in different formats.
• All slower than CPU and RAM.
• Hence I/O modules are used as a solution.
Input/output Module
• It is the entity within a computer that is responsible for the control of one or more
external devices .
 Interface to CPU and memory
 Interface to one or more peripherals 6
 … Cont’d
I/O Module Function
• The major functions or requirements for an I/O module fall into the following five
categories.
 Control & Timing
 CPU Communication
 Device Communication
 Data Buffering
 Error Detection
• During any period of time, the CPU may communicate with one or more external
devices in unpredictable patterns on the program’s need for I/O.
• The internal resources, main memory and the CPU must be shared among number
of activities including handling data I/O. 7
 … Cont’d

• Thus, the I/O device includes a control and timing requirement to coordinate the
flow of traffic between internal resources and external devices to the CPU.
• Thus CPU might involve in sequence of operations like:
 CPU checks I/O module device status
 I/O module returns device status
 If ready, CPU requests data transfer
 I/O module gets data from device
 I/O module transfers data to CPU variations for output, DMA, etc.
• I/O module must have the capability to engage in communication with the CPU
and external device.

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 … Cont’d

• Thus CPU communication involves the following:

1. Command decoding: The I/O module accepts commands from the CPU carried on
the control bus.
2. Data: data are exchanged between the CPU and the I/O module over data bus.
3. Status reporting: Because peripherals are slow it is important to know the status
of I/O device.
• I/O module can report with the status signals, common used status signals are
BUSY or READY.
• Various other status signals may be used to report various error conditions.
4. Address recognition: just as each memory word has an address, there is address
associated with every I/O device.
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 Asynchronous Data Transfer

• It is used when speed of I/O devices do not match with processor and
Timing characteristics of I/O devices is not predictable.
• Asynchronous data transfer between two independent units require that
control signals be transmitted between the communicating units to indicate
the time at which data is being transmitted.
• Two ways of achieving Sender Receiver
1. Strobe Figure 8.2: Strobe Method
• A strobe pulse is supplied by one of the units to indicate to the other unit
when the transfer has to occur.
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 … Cont’d

2. Handshaking Method
• A control signal is accompanied with each data item being transmitted to
indicate the presence of data.
• The receiving unit responds with another control signal to acknowledge the
receipt of data.

Sender Receiver

Figure 8.3: Handshaking Method

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 Mode of Data Transfer

• Three techniques are possible for I/O operations or data transfer mode.
• They are:
1. Programmed I/O
2. Interrupt Driven
3. Direct Memory Access (DMA)
1. Programmed I/O
• With Programmed I/O, data are exchanged between the CPU and the I/O module.
• The CPU executes a program that gives it direct control of the I/O operation,
including:
 sensing device status,
 sending a read or write command and
 transferring data. 12
 … Cont’d

• When CPU issues a command to I/O module, it must wait until I/O operation is
complete.
• If the CPU is faster than I/O module, there is wastage of CPU time.
• The I/O module does not take any further action to alert CPU.
• That is, it doesn’t interrupt CPU.
• Hence it is the responsibility of the CPU to periodically check the status of the I/O
module until it finds that the operation is complete.
• The sequences of actions that take place with programmed I/O are:
1. CPU requests I/O operation
2. I/O module performs operation
3. I/O module sets status bits
4. CPU checks status bits periodically 13
 … Cont’d

5. I/O module does not inform CPU directly

6. I/O module does not interrupt CPU
7. CPU may wait or come back later
I/O commands
• To execute an I/O related instruction, the CPU issues an address, specifying the
particular I/O module and external device and an I/O command.
• Four types of I/O commands can be received by the I/O module when it is
addressed by the CPU.
• They are:
1. A control command: is used to activate a peripheral and tell what to do.
• Example: a magnetic tape may be directed to rewind or move forward a
record. 14
 … Cont’d

2. A test command: is used to test various status conditions associated with an I/O
module and its peripherals.
• The CPU wants to know the interested peripheral for use.
• It also wants to know the most recent I/O operation is completed and if any
errors have occurred.
3. A read command: it causes the I/O module to obtain an item of data from the
peripheral and place it in an internal buffer.
• The CPU then gets the data items by requesting I/O module to place it on the
data bus.
4. A write command: it causes the I/O module to take an item of data from the data
bus and subsequently transmit the data item to the peripheral.
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 Priority Interrupt

• An interrupt is an exception condition in a computer system caused by an event

external to the CPU.
• Interrupts are commonly used in I/O operations by a device interface (or controller)
to notify the CPU that it has completed an I/O operation.
• An interrupt is indicated by a signal sent by the device interface to the CPU via an
interrupt request line (on an external bus).
• This signal notifies the CPU that the signaling interface needs to be serviced.
• The signal is held until the CPU acknowledges or otherwise services the interface
from which the interrupt originated.
• The main job of the interrupt system is to identify the source of the interrupt.
• Then, the interrupt system has to decide which device is to be serviced first. 16
 … Cont’d

• A priority interrupt is a system which decides the priority at which various

devices, which generates the interrupt signal at the same time, will be serviced
by the CPU.
• The system has authority to decide which conditions are allowed to interrupt
the CPU, while some other interrupt is being serviced.
• Generally, devices with high speed transfer such as magnetic disks are given
high priority and slow devices such as keyboards are given low priority.
• When two or more devices interrupt the computer simultaneously, the computer
services the device with the higher priority first.

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 … Cont’d

Types of Interrupt
1. Hardware Interrupts
• When the signal for the processor is from an external device or
hardware then this interrupts is known as hardware interrupt.
• Example: when we press any key on our keyboard to do some
action, then this pressing of the key will generate an interrupt
signal for the processor to perform certain action.
• Such an interrupt can be of two types:
i. Maskable Interrupt
• The hardware interrupts which can be delayed when a much
high priority interrupt has occurred at the same time. 18
 … Cont’d

ii. Non Maskable Interrupt

• The hardware interrupts which can be delayed when a
much high priority interrupt has occurred at the same
time.
• The hardware interrupts which cannot be delayed and
should be processed by the processor immediately.
2. Software Interrupts
• The interrupt that is caused by any internal system of the
computer system is known as a software interrupt.
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 … Cont’d

• It can also be of two types:

i. Normal Interrupt
• The interrupts that are caused by software instructions
are called normal software interrupts.
ii. Exception
• Unplanned interrupts which are produced during the
execution of some program are called exceptions.
• Example: division by zero.

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 Direct Memory Access (DMA)

• Interrupt driven and programmed I/O require active CPU intervention.

• Transfer rate is limited.
• CPU is tied up.
• DMA is the solution for these problems.
• Direct Memory Access is capabilities provided by some computer bus
architectures that allow data to be sent directly from an attached device
(such as a disk drive) to the memory on the computer’s motherboard.
• The microprocessor (CPU) is freed from involvement with the data
transfer, thus speeding up overall computer operation.
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 … Cont’d

• When the CPU wishes to read or write a block of data, it issues a command to
the DMA module and gives following information:
• CPU tells DMA controller:
 Whether to read or write
 Device address
 Starting address of memory block for data
 Amount of data to be transferred
• The CPU carries on with other work.
• Thus DMA controller steals the CPU‟s work of I/O operation.
• The DMA module transfers the entire block of data, one word at a time,
directly to or from memory, without going through CPU.
• When the transfer is complete. 22
 … Cont’d

• DMA controller sends interrupt when finished.

• Thus CPU is involved only at the beginning and at the end of the transfer.
DMA Configurations
• The DMA mechanism can be configured in variety of ways.
• Some of the common configurations are discussed here.
1. Single Bus Detached DMA:
• In this configuration all modules share the same system bus.
• The block diagram of single bus detached DMA is as shown in Figure 8.4.
• The DMA module that is mimicking the CPU uses the programmed I/O to exchange
the data between the memory and the I/O module through the DMA module.
• This scheme may be inexpensive but is clearly inefficient.
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 … Cont’d

 Single Bus, Detached DMA controller

 Each transfer uses bus twice
 I/O to DMA then DMA to memory
 CPU is suspended twice

Figure 8.4: Single Bus Detached DMA

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 … Cont’d

2. DMA using an I/O Bus

• One further step of the concept of integrated DMA is to connect I/O modules to DMA
controller using a separate bus called I/O bus.
• This reduces the number of I/O interfaces in the DMA module to one and provides
for an easily expandable configuration.
• The block diagram of DMA using I/O bus is as shown in Figure 8.5.
• Here the system bus that the DMA shares with CPU and main memory is used by
DMA module only to exchange data with memory.
• And the exchange of data between the DMA module and the I/O modules takes place
off the system bus that is through the I/O bus.

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 … Cont’d

2. DMA using an I/O Bus

• One further step of the concept of integrated DMA is to connect I/O modules to DMA
controller using a separate bus called I/O bus.
• This reduces the number of I/O interfaces in the DMA module to one and provides
for an easily expandable configuration.
• The block diagram of DMA using I/O bus is as shown in Figure 8.5.
• Here the system bus that the DMA shares with CPU and main memory is used by
DMA module only to exchange data with memory.
• And the exchange of data between the DMA module and the I/O modules takes place
off the system bus that is through the I/O bus.

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 Serial Communication

• Communication among the devices is very important for reliable execution of the tasks
assigned to CPU.
• I/O processor designed to communicate with data communication networks.
• Such a communication network consists of devices such as printers, display devices,
digital sensors, etc. serving many users at once.
• The data communication processor communicate with each terminal through bus.
• It also communicates with CPU and memory in the same manner as any I/O processor
does.
• The process of sending data one bit at a time sequentially over a communication bus is
called Serial communication.
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 Figure 8.2: Types of Data Transmission

• Serial communication is common method of transmitting data between a computer and

a
• peripheral device.
• Serial communication is the process of sending data one bit at a time, sequentially, over
a single communication line to a receiver.
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• Parallel communication is a method of conveying multiple binary digits (bits)
 … Cont’d

Figure 8.3: Parallel Data Transmission

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 … Cont’d

Figure 8.4: Serial Data Transmission

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Advantages of Serial communication
• Used for long distances
• Low cost
Advantages of Serial communication
• The speed of serial communication is very slow than
parallel communication.

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