Digital Electronics

(BCAC-102)

Lecture#06
1’s and 2’s Complements
 Lecture Outline

 1’s Complement Subtraction

 2’s Complement Subtraction
 Signed Binary Number Representation
 Addition in the 2’s Complement System
 Subtraction in the 2’s Complement System
 Arithmetic Overflow
 Comparison between 1’s and 2’s complements
 Subtraction of a binary number using 1’s complement method
The steps to be followed in subtraction by 1’s complement are:
i) To write down 1’s complement of the subtrahend.
ii) To add this with the minuend.
iii) If the result of addition has a carry-over then it is dropped and an 1 is added in the last bit.
iv) If there is no carry over, then 1’s complement of the result of addition is obtained to get the final
result and it is negative.
Evaluate:
(i) 110101 – 100101

Minued - 110101

1’s complement of subtrahend - 0 1 1 0 1 0 (+)

Carry over - 1 001111

+1
010000

The required difference is 10000

(ii) 101011 – 111001

Solution:
Minued - 101011

1’s complement of the subtrahend - 000110

110001

Hence the difference is –1110

(iii) 1011.001 – 110.10

Solution:
1’s complement of subtrahend 0110.100 is 1001.011 Hence
Minued - 1 0 1 1. 0 0 1
1’s complement of subtrahend - 1 0 0 1. 0 1 1 (+)
Carry over - 1 0 1 0 0. 1 0 0

(+) 1
0 1 0 0. 1 0 1

Hence the required difference is 100.101

(iv) 10110.01 – 11010.10
Solution:
Minuend 1 0 1 1 0. 0 1
1’s complement of subtrahend 11010.10 is 0 0 1 0 1. 0 1
-------------------------------------------------------------------------------
1 1 0 1 1. 1 0
Since no carry is over therefore result is 1’s complement of 11011.10 and is negative.

Hence the required difference is – 00100.01 i.e. – 100.01

 2’s Complement Subtraction
The 2’s complement of a binary number can be obtained by adding 1 to its 1’s complement.

Subtraction of a smaller number from a larger one by the 2’s complement method involves following steps:

Determine the 2’s complement of the smaller number.

Add this to the larger number.

Omit the carry (there is always a carry in this case).

Subtract (1010) from 1111 using 2’s complement method. Subtract by direct method also.

1111 (+)
2’s complement of smaller number 0110

carry….. 1 0101

The carry is discarded. Thus, the answer is (0101)2

Subtraction of a larger number from a smaller one by the 2’s complement method
involves following steps:

 Determine the 2’s complement of the larger number.

 Add this to the smaller number.

 There is no carry. The result is in 2’s complement form and is negative.

To get an answer in true form, take the 2’s complement and change the sign.

Subtract (1010)2 from (1000)2 using 2’s complement method. Subtract by direct method also.

1000 (+)
0110
No carry 1110

No carry is obtained. Thus, the difference is negative and the true answer is the 2’s complement of
(1110)2 i.e. (0010)2

Hence the result is -(0010)2

 Signed Binary Number Representation

Binary numbers are represented with a separate sign bit along with the magnitude, as shown below. For example, in
an 8-bit binary number, the MSB is the sign bit and the remaining 7 bits correspond to magnitude. The magnitude
part contains true binary equivalent of the number for positive numbers, while 2’s complement form of the number
for negative numbers. For example, +13, 0, -46 are represented as follows:

Sign Magnitude

+13
0 000 1101
0
0 000 0000
-46
1 010 1110

It is important to note that the number zero is assigned with the sign bit ‘0’. Therefore, the range of numbers that
can be represented using 8-bit binary number is -128 to +127. In general, the range of numbers that can be
represented by an n-bit number is ( ) to (+2n-1 -1).
 Add the following numbers using 2’s complement system:

a) +29 and +19 b) +39 and -22 c) -47 and +29 d) -32 and -44

Solution:
(a) +29 0 001 1101 (augend)
+19 0 001 0011 (addend)

0 011 0000 (sum =48 )

Sign bit

The sign bits of both augend and addend are zero and sign bit of the sum is 0, indicating that
when the sum is positive they have the same number of bits.
Solution: (b) +39 and -22
Consider the addition of +39 and -22. Remember that -22 will be in its 2’s complement form.
Therefore, +22 [00010110] must be converted to -22 [11101010]

+39 0 010 0111 (augend)

-22 1 110 1010 (addend)

1 0 001 0001 (sum =17 )

carry Sign bit

The carry is omitted and hence the result is 0001 0001

In this case, the sign bit of addend is 1. Sign bits also participate in the process of addition; in fact, a carry
is generated in the last position of addition. This carry is always omitted. Therefore, the final sum is
0001 0001, which is equivalent to +17.

Home Task: (c) and (d)

 Subtraction in the 2’s complement system

a) Subtract 19 from 28

+28 0001 1100

+19 0001 0011
To subtract +19 from +28, the computer will send the +19 to a 2’s complement circuit to produce

-19 1110 1101

The system will then add +28 and -19 as follows:

+28 0001 1100

-19 1110 1101

1 0000 1001 (sum=9)

Carry

Omit this carry. The final result is 9

a) Subtract -21 from 39

+39 0010 0111

-21 1110 1011

To subtract -21 from +39, the computer will send the -21 to a 2’s complement circuit to produce
+21 0001 0101

The system will then add +39 and +21 as follows:

+39 0010 0111

+21 0001 0101

0011 1100 (sum=60)

No carry. The final result is 60

Assignments:

i) Subtract -43 from 19 ii) subtract -33 from -57

 Arithmetic Overflow
When the number of bits in the sum exceeds the number of bits in each of the numbers added, overflow
results. This appears in the ninth significant place, and is also called the excess-one. Overflow causes a sign
change.
Assume that both the input numbers are in the range of -128 to +127. The problem arises only when the
arithmetic circuit adds two positive numbers or two negative numbers. In such a case, it is possible for the
sum to be outside the range of -128 to +127.

Case I : Two positive Numbers

Consider the addition of +120 and +65. As the decimal sum of +120 and +65 is +185, an overflow occurs
into the MSD position. This overflow forces the sign bit of the answer to change.

+120 0111 1000

+65 +0100 0001
-------------------------------------------------
(185) 1011 1001

As the sign bit is one, i.e. negative, the answer is not correct.
Similarly in the case of two negative numbers overflow occurs.
An overflow is a software problem and not a hardware problem. In digital computers, an overflow
occurs when an operation results in a quantity beyond the capacity of the storage register. Therefore a
programmer must check the overflow after each addition or subtraction by looking for a change in the
sign bit. Logic circuitry is used in each case to detect overflow.

Comparison Between 1’s and 2’s Complements

 The 1’s complement can be easily obtained using an inverter. The 2’s complement has to
be arrived at by first obtaining the 1’s complement and then adding one(1) to it.

 The advantage in the 2’s complement system is that only one arithmetic operation is
required ; the 1’s complement requires two operations.

 While the 1’s complement is often used in logical manipulations for inversion operation,
the 2’s complement is used only for arithmetic applications.