MICROPROCESSORS AND

MICROCONTROLLERS(EECE3041)
 Syllabus
L T P C
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UNIT II
Instruction Set and Interrupts Addressing modes of 8086, instruction set of 8086,
assembly language programs (example programs), interrupts and interrupt service
routines, interrupt cycle of 8086, non-maskable interrupt, maskable interrupt (INTR).

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Addressing Modes of 8086
Addressing Modes of 8086
• Addressing modes indicates a way of locating data or operand

• According to the flow of instruction execution, instruction

categorized as
– sequential control flow instruction

– control transfer instruction

Addressing Modes of 8086
Sequential control flow instruction
• These are the type of instructions which after execution transfer
control to the next instruction appearing immediately after it (in
the sequence) in the program
Ex. Arithmetic, logic and data transfer instructions

Control transfer instruction

• The control transfer instruction, after execution transfer control to
some predefined address or the address specified in the
instruction
Ex. INT, CALL, RET, JUMP
Addressing Modes of 8086
1. Immediate Addressing
In this type of addressing, immediate data is a part of
Instruction and appears in the form of successive byte or
bytes
Instruction
Data
• Example
• MOV AX, FE12H
• MOV BL, 90H
• FE12H and 90H are immediate Data
• The immediate data may be 16 bit or 8 bit
Addressing Modes of 8086
2. Register Addressing
In this addressing modes the data is stored in a register and
it is referred using the particular register. All the registers
expect IP may be used in this mode
Instruction
Register Data
• Example
• MOV BX, AX
• ADD AL, BL
• The operands in these instructions are provided in
registers BX, AX, AL and BL respectively
Addressing Modes of 8086
3. Direct Addressing
In this type of addressing mode, a 16 bit memory address
(offset) or an I/O address is specified in the instruction as a
Instruction Memory location
part of it
Offset
Address

DS/ES * 10H + Data

Here the data is in a memory location in the
• Example Data segment whose effective (physical)
• MOV AX, [5000H] address can be computed using 5000H
(offset address) and the content of Data
segment register (DS) as segment address.
In the example the effective address is DS*10H + 5000H
Addressing Modes of 8086
4. Register Indirect Addressing
 The address of the memory location where the data or operand is
stored, can be determined in an indirect way, using offset address
 The offset address of the data is stored either in BX or SI or DI
 The segment is either in DS or in ES
 The data is available in the physical address location obtained as
DS/ES *10H+BX/SI/DI

• Example Here the data is in a memory location in the

• MOV AX, [BX] Data segment whose offset address is in BX
and the segment address is in DS register
In the example the effective address is DS*10H + [BX]
Register Indirect Addressing
Instruction
Register
BX/SI/DI
Memory location

Offset Address

20 bit Address
DS/ES * 10H + Data

20 bit address is DS/ES*10H + offset address

Addressing Modes of 8086
5. Register Relative Addressing
 In this mode the data is available at an effective address
formed by adding an 8-bit or 16-bit displacement with the
content of any one of the registers BX,BP,SI and DI in the
default segment DS or ES

• Example
• MOV AX, 50H[BX]
• MOV 10H[SI], DX

Here the effective (physical) address is given as DS*10H+50H+[BX] and

DS*10H+10H+[SI] respectively
gister Relative Addressing
Instruction
Register 8-bit/16-bit
BX/BP/SI/DI Displacement

+
Memory location

Offset Address

20 bit Address
DS/ES * 10H + Data
Offset Address is [BX]/[SI]/[DI]/[BP] + Displacement
Effective/Physical Address is DS/ES*10H + Offset Address
Addressing Modes of 8086
6. Indexed Addressing
 In this mode, offset address is stored in one of the index registers
SI or DI.
 DS is the default segment registers.
 In case of string instructions DS and ES are default segment for SI
and DI respectively.
• Example
• MOV AX, [SI]
• MOV CX, [DI]
Here the effective (physical) address is given as DS*10H+[SI] and
DS*10H+[DI] respectively and the data present in these location is
moved to the register AX and CX respectively
dexed Addressing

Instruction
Register SI/DI

Memory location
Offset Address

20 bit Address
DS * 10H + Data

20 bit address (effective or physical)is DS*10H + offset address

Addressing Modes of 8086
7. Based Indexed Addressing
 In this mode, the effective address is obtained by adding the
content of base register (BX or BP) to the content of an index
register (SI or DI).
 The default segment registers may be ES or DS
• Example
• MOV AX, [BX][SI]
• MOV [BX] [DI], AX
Here the BX is the base register and SI/DI is the index register. The
effective (physical) address is given as DS*10H+[BX]+[SI] and DS*10H+
[BX]+[DI] respectively. In the first instruction the data present in the
memory location is moved to the register AX and in the second
instruction the data in AX is moved to the memory location.
ased Indexed Addressing Instruction
Base Register Index Register
(BX/ BP) (SI/DI)

+
Memory location

Offset Address

20 bit Address
DS/ES * 10H + Data

Offset Address is [BX]/[BP] +[SI]/[DI]

Effective/Physical Address is DS/ES*10H + Offset Address
Addressing Modes of 8086
8. Relative Based Indexed Addressing
 In this mode, the effective address is formed by adding an
8-bit or 16-bit displacement with the sum of content of
base register (BX or BP) and the index register (SI or DI).
 The default segment registers may be ES or DS
• Example
• MOV AX, 50H[BX][SI]
• ADD 50H[BX] [SI], BP

Here, 50H is the displacement. BX is the base register and SI is the index
register. The effective (physical) address is DS*10H+[BX]+[SI]+50H. The
first instruction the data present in the memory location is moved to
the register AX and the second instruction adds content of BP with the
data present in the memory location.
lative Based Indexed Addressing

Instruction
Base Register Index Register 8-bit / 16-bit
(BX/ BP) (SI/DI) displacement

+
Memory location

Offset Address

20 bit Address
DS/ES * 10H + Data

Offset Address is [BX]/[BP] +[SI]/[DI]+ Displacement

Effective/Physical Address is DS/ES*10H + Offset Address
Addressing Modes For The Control
Transfer Instruction
Addressing Modes For The Control Transfer Instruction

It depend upon
• whether the destination location is within the same
segment or in a different segment
• The method of passing the destination address to the
processor Intersegment Direct

Intersegment

Intersegment Indirect
Addressing Modes For
The Control Transfer
Instruction
Intrasegment Direct

Intrasegment

Intrasegment Indirect
Intrasegment: if the location to which the control is to be transferred

lies in the same segment, the mode is called Intrasegment mode

Intrasegment Direct Mode:

• The address to which the control is to be transferred lies in the
same segment in which the control transfer instruction lies.
• The address appears directly in the instruction as an
immediate displacement value.
• The displacement is computed relative to the content of the
instruction pointer.
• The effective address to which the control will be transferred is
given by the sum of 8 or 16 bit displacement and current
content of IP
9. Intrasegment Direct Mode:
• In the case of jump instruction, if the signed displacement
is 8bits (-128 < d < +127), it is called short jump. If it is of
16 bits (-32768 < d < +32767) , its termed as long jump
• Example JMP LABEL

10. Intrasegment Indirect Mode:

• The address to which the control is to be transferred lies in
the same segment in which the control transfer
instruction lies. But it passed to the instruction indirectly
• Example JMP [BX]; jump to effective address stored in BX
 Intersegment: If the location to which the control is to be
transferred lies in a different segment other than the current
segment, the mode is called intersegment mode

11. Intersegment Direct Mode:

• The address to which the control is to be transferred lies in
the different segment. This mode provides a means of
branching from one code segment to another code
segment.
• The CS and IP of the destination address are specified
directly.
• Example JMP 5000H : 2000H; jump to effective address
2000H in segment 5000H
12. Intersegment Indirect Mode:
• The address to which the control is to be transferred lies in
the different segment. This mode provides a means of
branching from one code segment to another code segment.
• The CS and IP of the destination address are specified
indirectly. That is, content of a memory block containing four
bytes IP(LSB), IP(MSB), CS(LSB), CS(MSB)
• Example JMP [3000H]
IP(LSB) 00 3000
IP(MSB) 20 3001
CS(LSB) 00 3002
CS(MSB) 50 3003
 Web Reference

https://www.youtube.com/watch?v=oSYF9riDeyA
Thank you!

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