Lecture1_EELE_1232 (1)
Lecture1_EELE_1232 (1)
Microcontrollers
Lecture 1: Introduction
Ehsan Atoofian
[email protected]
LAB
• PIC18 Explorer Board
• PIC18F87J11
• MPLABX
• http://www.microchip.com/pagehandler/en-us/family/mplabx/
• Lab instructor:
• Joshua Ottens
• Lab mark break-down
• Pre-lab: 6/20
• Lab experiments: 7/20
• Lab report: 7/20
2
Grading Information
• Lab: 20%
• At least 50% to pass the course
• Assignment: 5%
• Final: 50%
• At least 50% to pass the course
3
Course Administration
• Instructor
• Name: Ehsan Atoofian
• Email: [email protected]
• Office: AT5011
• Office Hours: Monday&Wednesday 4:00 PM- 5:00 PM
4
Embedded System
5
Examples of Embedded Systems
• 20 MHz RAD6000 CPU, 128 MB of DRAM
6
Internal Organization of a Computer
7
Internal Block Diagram of a CPU
8
Microprocessor System Contrasted With Microcontroller System
9
Embedded Systems
• Designed for a specific application
• Program is burned into ROM
• PC uses RAM and OS, runs a variety of applications
• Power vs. performance
10
Simplified View of a PIC Microcontroller
• Microchip Technology Corporation, introduced Peripheral
Interface Controller (PIC) in 1989
• PIC18, an 8-bit microcontroller
• One of the most popular microcontroller
11
WREG (Working Register)
• An 8-bit register
• Source and destination of arithmetic and logical instructions
• MOVLW a2h
• ADDLW 47h
12
File Registers of PIC12, PIC16, and PIC18
• File register or data RAM
• Special Function Register (SFR)
• General Purpose Register/RAM (GPR)
13
SPECIAL FUNCTION REGISTER MAP FOR PIC18F87J11 FAMILY DEVICES
14
MOVWF & ADDWF
• MOVWF
• Copies WREG into file register
• ADDWF
• ADDWF filereg, D
• Destination: SFR or GPR
• D=0→destination=WREG, D=1→destination=file register
• Add 3 numbers?
• Destination
• WREG
• File Register
15
ADDWF
•D
• F for file register
• W for WREG
• The default is F
• ADDWF 23h, F
• ADDWF 23h, W
16
COMF, DECF, MOVF
• COMFfilereg, D
• DECF filereg, D
• MOVF filereg, D
17
MOVFF
• MOVFF filereg1, filereg2
18
Status Register
• C: affected by add & sub
• DC: carry from D3 to D4
• Refer to Table 2-4 in the textbook for the list of
instructions that affect status register
19
Branch instructions
• Conditional jump based on flags in status register
• BC
• BNC
• BZ
• BNZ
• BN
• BNN
• BOV
• BNOV
20