Chapter Three

Basic and Derived Logic Gate

By Gemeda. S (Bsc Electrical Eng, Msc in Project)

 Computer System Architecture

Hierarchical structuring of a computer system

Architecture
 Actually a computer system composed of many layers of
software and hardware.
 But for simplicity we see the computer in Abstract way.
 This avoids details and make the user to concern about
the outer layer which is easy for the user to
communicate with the computer.
 Generally modern computers consists of multi-layers or
levels.

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 Logical Elements and Boolean Algebra

 In the hierarchical structuring of a computer the logic gate level is

above the device level.
 A gate is a circuit with one or more input signals but only one
output signal.
 Gates are digital ( two state) circuits because the input or output
signals are either low or high voltages.
 Gates are often called logic circuits because they can be analyzed
with Boolean algebra.
 Boolean algebra could be used to do manipulation with binary
variables and simplify logic expressions.
 These are actually implemented in a digital system with the help of
electronic circuits called logic gates.
 Boolean algebra deals with Boolean (also called binary) values that
are typically labeled true/false, 1/0, yes/no, on/off, and so forth.
 Boolean Algebra: is a useful mathematical system for specifying and
transforming logic functions. 3
 We study Boolean algebra as a foundation for designing and
analyzing digital systems.
 A Boolean function is a function that operates on binary
inputs and returns binary outputs.
 Computer hardware is based on the representation and
manipulation of binary values.
 Therefore, Boolean functions play a central role in the
specification, construction, and optimization of hardware
architectures.
 Hence, the ability to formulate and analyze Boolean functions
is the first step toward constructing computer architectures.
 There are three basic logic gates (logical operations), namely
the OR gate, the AND gate and the NOT gate.
 Other logic gates that are derived from these basic gates are
the NAND gate, the NOR gate, the EXCLUSIVE-OR gate and
the EXCLUSIVE-NOR gate. 4
 1. OR Gate
 An OR gate is a logic circuit with two or more inputs and
one output.
 The OR operation on two independent logic variables A
and B is written as Y = A+B and reads as Y equals A OR B
and not as A plus B.
 The output of an OR gate is LOW(or 0) only when all of
its inputs are LOW( or o).
 For all other possible input combinations, the output is
HIGH.
 The operation of a two-input OR gate is explained by the
logic expression Y = A+B
 If we have four logic variables and we want to know the
logical output of (A+B+C +D), then it would be the output
of a four-input OR gate with A, B, C and D as its inputs.
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Figure 1: Two Input OR gate with its
corresponding truth table. 6
Figure 2 (a) Three input OR gate (b) Four-input OR gate and
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(c) Truth table of three-input OR gate
 Figures 2.4(a) and (b) show the circuit symbol of three-
input and four-input OR gates.
 Figure 2.4(c) shows the truth table of a three-input OR gate.
 Logic expressions explaining the functioning of three-
input and four-input OR gates are Y=A+B+C and Y =
A+B+C +D.
 Activity 2.1 : 1. How would you hardware-implement a
four-input OR gate using two-input OR gates only?
Solution
 Figure 2.5(a) shows one possible arrangement of two-
input OR gates that simulates a four-input OR gate.
 A, B, C and D are logic inputs and Y3 is the output.
 Figure 2.5(b) shows another possible arrangement.
 In the case of Fig. 2.5(a), the output of OR gate 1 is8 Y
 Figure 3
 The second OR gate produces the output Y2=Y1+C=
A+B+C.
 Similarly, the output of OR gate 3 is Y3=Y2+D= A+B+C+D.
 In the case of Fig. 3 (b), the output of OR gate 1 is Y1=
A+B.
 The second OR gate produces the output Y2 = C +D.
 Output Y3 of the third OR gate is given by Y1+Y2 = A+B+C
9
+D.
 2. AND Gate

 An AND gate is a logic circuit having two or more inputs

and one output.
 The output of an AND gate is HIGH only when all of its
inputs are in the HIGH state. In all other cases, the output
is LOW.
 The logic symbol and truth table of a two-input AND gate
are shown in Figs 2.6(a) and (b) respectively.
 Figures 2.7(a) and (b) show the logic symbols of three-
input and four-input AND gates respectively.
 Figure 2.7(c) gives the truth table of a four-input AND gate.
 The AND operation on two independent logic variables A
and B is written as Y = A.B and reads as Y equals A AND
B.
 Here, A and B are input logic variables and Y is the
output. 11
Figure 4 (a): Two-input AND gate and (b) Two-input truth table
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Figure (a) Three-input AND gate (b) Four-input AND gate and (c) Truth-table
of four-input AND gate 13
 For a two-input AND gate, Y = A.B;
 For a three-input AND gate, Y = A.B.C;
 For a four-input AND gate, Y = ABCD.
 Activity : 1. Show the logic arrangement for implementing a four-
input AND gate using two-input AND gates only.
Solution
 Figure 2.8 shows the hardware implementation of a four-input AND
gate using two-input AND gates.
 The output of AND gate 1 is Y1=A.B The second AND gate produces
an output Y 2 given by Y 2 = Y 1.C = A.B.C.
 Similarly, the output of AND gate 3 is Y= Y2.D = A.B.C.D and
hence the result.
Figure 6: Implementation of a four-
input AND gate using two-input AND
gate

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 3. NOT Gate
 A NOT gate is a one-input, one-output logic circuit.
 The output of NOT gate is always the complement of the
input.
 That is, a LOW input produces a HIGH output, and vice
versa.
 It is also known as a ‘complementing circuit’ or an
‘inverting circuit’.
 Figure 2.9 shows the circuit symbol and the truth table.
 The NOT operation on a logic variable X is denoted as X
or X.
 That is, if X is the input to a NOT circuit, then its output
Y is given by Y= X or X and reads as Y equals NOT X.
 Thus, if X = 0, Y = 1 and if X = 1, Y = 0.
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Figure 7(a): Circuit symbol of NOT gate and (b) Truth-table
of NOT gate 17
 4. EXCLUSIVE-OR Gate
 The EXCLUSIVE-OR gate, commonly written as EX-OR gate, is
a two-input, one-output gate.
 The output of an EX-OR gate is a logic ‘1’ when the inputs are
unlike and a logic ‘0’ when the inputs are like.
 Although EX-OR gates are available in integrated circuit form
only as two-input gates, unlike other gates which are available in
multiple inputs also, multiple-input EX-OR logic functions can be
implemented using more than one two-input gates.
 The output of a multiple-input EX-OR logic function is a logic ‘1’
when the number of 1’s in the input sequence is odd and a logic
‘0’ when the number of 1’s in the input sequence is even,
including zero.
 That is, an all 0’s input sequence also produces a logic ‘0’ at the
output.
 The output of a two-input EX-OR gate is expressed by the
following Boolean expression.
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Figure 8(a) Circuit symbol of a two-input EXCLUSIVE-OR gate, (b)
the truth table of a two-input EXCLUSIVE-OR gate and (c) the truth
table of a four-input EXCLUSIVE-OR gate 22
 Activity 2.3
3. How do you implement three-input and four-input
EX-OR logic functions with the help of two-input
EX-OR gates?
 Solution
 Figures 2.11(a) and (b) show the implementation of
a three-input EX-OR logic function and a four-input
EX-OR logic function using two-input logic gates:
 For Fig. 2.11(a), the output Y1 is given by A ⊕ B.
 The final output Y is given by Y = (Y1 ⊕)=
(A⊕B)⊕C = A⊕B⊕C.
 Figure 2.11(b) can be explained on similar lines.
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Figure 9 (a): Three-input EX-OR gate and (b) a four-input EX-OR
gate 24
 5. NAND Gate

 NAND stands for NOT AND. An AND gate followed by

a NOT circuit makes it a NAND gate, (a).
 Figure 2.13(b) shows the circuit symbol of a two-input
NAND gate.
 The truth table of a NAND gate is obtained from the
truth table of an AND gate by complementing the output
entries, (c).
 The output of a NAND gate is a logic ‘0’ when all its
inputs are a logic ‘1’.
 For all other input combinations, the output is a logic
‘1’. NAND gate operation is logically expressed as

 In general, the Boolean expression for a NAND gate with more than
two inputs can be written as 25
Figure 11 (a) Two-input NAND implementation using an
AND gate and a NOT circuit, (b) the circuit symbol of a
two-input NAND gate and (c) the truth table of a two-input
NAND gate 26
 6. NOR Gate
 NOR stands for NOT OR.
 An OR gate followed by a NOT circuit makes it a
NOR gate [Fig. 2.14(a)].
 The truth table of a NOR gate is obtained from the
truth table of an OR gate by complementing the
output entries.
 The output of a NOR gate is a logic ‘1’ when all
its inputs are logic ‘0’.
 For all other input combinations, the output is a
logic ‘0’.
 The output of a two-input NOR gate is logically
expressed as 27
Figure 12(a) Two-input NOR implementation using an OR gate and a
NOT circuit, (b) the circuit symbol of a two-input NOR gate and (c) the
truth table of a two-input NOR gate.
• In general, the Boolean expression for a NOR gate with more than
two inputs can be written as 28
 7. EXCLUSIVE-NOR Gate
 EXCLUSIVE-NOR (commonly written as EX-NOR) means NOT
of EX-OR, i.e. the logic gate that we get by complementing the
output of an EX-OR gate.
 Figure 2.15 shows its circuit symbol along with its truth table.
 The truth table of an EX-NOR gate is obtained from the truth
table of an EX-OR gate by complementing the output entries.
 Logically,

Figure 13 (a) Circuit symbol of a two-

input EXCLUSIVE-NOR gate and (b)
the truth table of a two-input
EXCLUSIVE-NOR gate.

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 The output of a two-input EX-NOR gate is a
logic ‘1’ when the inputs are like and a logic ‘0’
when they are unlike.
 In general, the output of a multiple-input EX-
NOR logic function is a logic ‘0’ when the
number of 1s in the input sequence is odd and a
logic ‘1’ when the number of 1s in the input
sequence is even including zero.
 That is, an all 0s input sequence also produces a
logic ‘1’ at the output

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 Exercise

1. Show the logic arrangements for implementing:

(a) a four-input NAND gate using two-input AND gates
and NOT gates;
(b) a three-input NAND gate using two-input NAND
gates;
(c) a NOT circuit using a two-input NAND gate;
(d) a NOT circuit using a two-input NOR gate;
(e) a NOT circuit using a two-input EX-NOR gate

2. How do you implement a three-input EX-NOR

function using only two-input EX-NOR gates?

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