Chapter 3 Hardware O-level
Chapter 3 Hardware O-level
Chapter 3
TABLE OF CONTENTS
3.1 3.2
Input and output
Computer Architecture Device
3.3 3.4
Data Storage Network Hardware
John neumann Architecture introduced the following features in our
computer
Control Unit
This is also a part of CPU that reads instruction and instruct other device
in the computer to execute the instruction using control bus. This CU
ensure synchronization of data flow and program instruction throughout
the computer.
Address Data bus
bus
Memory Address
Program (MAR)
Control
bus Current Instruction
Control unit register (CIR)
CPU
Address Data bus
bus
______________________
_____
Control
bus _____________________ Current Instruction
___ register (CIR)
_________________
Arithmetic logic unit
____
CPU
CPU
Register Abbreviatio Function/Purpose of register
n
Current Instruction Register CIR This register stores the current instruction
being decoded and executed
Memory Address register MAR This register stores the address of the
memory location currently being read from
or written to
Memory data/buffer MDR This register stores data which has just
Register been read from memory or data which is
about to be written to memory
CU fetches memory from the RAM through MDR and the location of the
program file is kept at Program counter and the next instruction in the
program file is given to MAR. The CU fetches the instruction and gives
orders to different devices and fetch different data from RAM to MDR.
All the logical and arithmetic calculation is done using the ALU and the
accumulator helps to store temporary data which helps to do multiple
step in a specific function and calculation.
What are system bus?
Buses are referred as parallel transmission component and each wire
transfer only one 1 bit at a time.
CPU Memory Input/output
Ports
Control bus
Address bus
Data bus
Address bus
Carries the location of data or instruction from CPU to the RAM and
I/O deives, hence it is unidirectional
Data bus
Carries back and forth data between different I/O devices , Memory
units and CPU. this data can be address, instruction or numerical
value as well. Hence this bus is Bidirectional
Control Bus
Memory Address Contents
-read signal 1111 0000 0111 0011
-write signal
1111 0001 11011101
Size
Accessibility
Time
Type
Volatility
Example
Properties Primary Memory Secondary Memory
Temporary permanent
Volatile non-volatile