OTFT
OTFT
on
Channel Length-Dependent
This paper presents an analytical model to study the impact of
Performance Study of OTFT:
channel length variations on OTFT performance. The findings
Analytical Modeling and
5. M. Gupta, R. Kumar provide insights into optimizing channel length to achieve
Simulation
desired electrical characteristics, aiding in the design of high-
IEEE Transactions on Electron
performance OTFTs.
Devices, 2020.
Scott T. Keene, Tom P. The study focuses on improving the performance and stability of
Enhancement-Mode PEDOT:PSS A. van der Pol, Dante Organic Electrochemical Transistors (OECTs) by de-doping
Organic Electrochemical . Zakhidov, Christ H. L. PEDOT:PSS using amine-based molecular de-dopants. This
6. Transistors Using Molecular De- Weijtens,René A. J. method shifts the threshold voltage (Vth) to negative values,
Doping Janssen, Alberto reducing power consumption and improving stability. De-doping
Advanced Materials,2020 Salleo, and Yoeri van lowers the operating current by up to 20 times and ensures stable
Literature Survey
S.
TITLE AUTHOR INFERENCE
No
Doped organic transistors Bjo¨rn Lu¨ssem , Max L. This study demonstrates that doping a thin pentacene layer at the gate
operatingin the inversion and Tietze , Hans Kleemann , oxide interface enables tunable and reproducible organic transistors.
7. depletion regime Christoph Ho bach, Johann Threshold voltage can be precisely controlled without compromising
Nature Communications, W. Bartha,Alexander ON/OFF ratio, subthreshold swing, or mobility. Doping is expected to
2013 Zakhidov & Karl Leo become a vital technology for designing integrated organic circuits.
Prospects and Limitations of Flexible organic transistors offer low-cost fabrication and versatility,
Organic Thin attracting global research. Comparative analyses of OTFT structures
B.K. Kaushik , Brijesh
FilmTransistors reveal top-contact designs outperform bottom-contact ones, with
8. Kumar ,Y.S. Negi , and
(OTFTs)Advances BGTC exhibiting superior functionality. Performance depends on
Poornima Mittal
Intelligent and Soft structure, material properties, and fabrication processes, impacting
Computing, 2012 speed and sensitivity.
Investigate the Ids -Vgs and Ids- Vds Extract and analyse key performance Examine the influence of material
characteristics of the graphs to understand metrics such as threshold voltage (Vth), properties (e.g., mobility, trap density,
the device behaviour across different subthreshold swing, mobility, on/off and doping profiles), gate dielectric
operating regions current ratio, and contact resistance parameters, and interface effects on the
overall OTFT performance.
Fig 6. Novelty
Learning and Development Journey
Figure 8. Materials used in OTFT scalability but also simplifies the fabrication process,
Figure 11. Energy band diagram The small difference of 0.2 eV between these values
facilitates efficient hole injection into the pentacene layer,
promoting p-type behavior in the OTFT and ensuring smooth
charge flow at room temperature.
Learning and Development Journey
DEPLETION MODE
Figure 12. Depletion mode Id-Vgs Graph (linear scale) Figure 13. Depletion mode Id-Vgs Graph (log scale)
The simulated I ds -V gs curve of the model in depletion mode, as shown in Figure 12 and 13, exhibits key features
characteristic of p-channel depletion-mode behavior.
At zero gate voltage (V gs = 0V), a substantial drain current (Ids) is observed, indicating that the transistor is
naturally in the ON state.
As the gate voltage becomes more positive, the drain current decreases.
Learning and Development Journey
ENHANCEMENT
MODE
Figure 14. Enhancement mode Id-Vgs Graph (linear scale) Figure 15. Enhancement mode Id-Vgs Graph (log scale)
The simulated I ds -V gs curve of the model in enhancement mode, as shown in Figure 14 and 15, exhibits key features
characteristic of p-channel enhancement-mode behavior.
At V g =50V and V g =120V, the positive gate bias depletes holes in the p-type channel, turning off the device effectively
thus highlighting strong gate control over channel conductivity.
The enhancement-mode OTFT demonstrates efficient switching behavior, with no drain current at V gs = 0 V,
confirming its normally-off nature that requires gate bias to form a conductive channel.
Learning and Development Journey
DRAIN
CHARACTERISTICS
In enhancement-mode OTFTs, Ids is negligible at V gs = 0 and increases as V gs surpasses V th , showing linear rise
at low V ds and saturation at high V ds . In depletion-mode OTFTs, Ids exists at V gs = 0 and decreases with
negative V gs
Learning and Development Journey
PARAMETERS
These following parameters highlight effective gate control, strong charge carrier mobility, rapid
switching, and robust current modulation. Despite relatively high contact resistance, the device shows
strong potential for flexible, energy-efficient electronic applications.
3.
2. 4.
1.
5.
Learning and Development Journey
Table 2. Extracted parameters from Simulation
Parameters Simulated
Values
Modes Depletion
Enhancement
Traps are localized defect states within the semiconductor material that capture charge carriers, reducing
mobility and performance. They can be shallow or deep, affecting device efficiency
Vds=-120V Vds=-120V
10−4
4×10−2
−2
10−8
3×10
Ids
10−12
Ids
−2
2×10
10−16
1×10−2
10−20
0
10−24
150 100 50 0 −50 −100 −150 150 100 50 0 −50 −100 −150
Vgs Vgs
Figure 19. Depletion mode Id-Vgs Graph Figure 20. Depletion mode Id-Vgs Graph
(linear scale) (log scale)
In depletion-mode OTFTs, traps immobilize carriers, requiring higher positive voltage to deplete the channel
completely, unlike smooth depletion without traps.
traps increase the threshold voltage from 61.3V to 65.3V due to the presence of trap density (N trap ) making it
harder to turn off the device. Therefore, the I D -V G curve shifts rightward, showing increased V th.
Traps reduce mobility from 0.505 to 1.89×10 ⁻³ cm²/V·s, increasing transit time and flattening the I D -V G
curve, indicating slower transistor operation and reduced current at given voltages.
Learning and Development Journey
ENHANCEMENT MODE WITH
6
Vds=-120V
TRAPS V =-120V 101
ds
10−1
5 10−3
10−5
4 10−7
10−9
3 10−11
Ids
Ids
10−13
2 10−15
10−17
1 10−19
10−21
0 10−23
10−25
150 100 50 0 −50 −100 −150 150 100 50 0 −50 −100 −150
Vgs Vgs
Figure 21. Enhancement mode Id-Vgs Graph Figure 22. Enhancement mode Id-Vgs Graph
(linear scale) (log scale)
In enhancement-mode OTFTs, traps necessitate a larger negative gate voltage to fill trap states before carriers
can contribute to conduction, unlike smooth conduction at low negative V GS without traps.
Traps increase the threshold voltage from 1.16V to 2.74V, as they must be filled first before conduction can
occur.
Traps reduce the on/off current ratio from 8.23x10 9 to 1.31x10 9 by increasing leakage current, resulting in a
lower slope in the I D -V G curve due to higher OFF-state current.
Learning and Development Journey
COMPARITIVE SUMMARY OF ENHANCEMENT AND DEPLETION MODE
PARAMETERS WITH AND WITHOUT TRAPS
With Traps Without Traps
Parameter
Depletion Mode Enhancement Mode Depletion Mode Enhancement Mode
Table 3. Parameters of enhancement and depletion modes with and without traps
The presence of traps in OTFTs degrades device performance by increasing threshold voltage,
reducing mobility, and lowering the on/off current ratio. While depletion-mode OTFTs suffer from
higher conduction losses, enhancement-mode OTFTs face greater difficulty in turning ON due to
charge trapping effects.
Learning and Development Journey
The device structure was developed using DeckBuild, a comprehensive platform for semiconductor device modeling and
simulation. TonyPlot was utilized to generate a detailed graphical representation of the simulations.
Performance Optimization: Improving contact resistance and Figure 23. Enhancement and Depletion modes in contrast
charge mobility can enhance both modes, positioning them as promising
candidates for next-generation flexible and large-area electronic devices.
Realistic Constrains
• Threshold Voltage Instability: Variations in Vth due to environmental factors (e.g., oxygen
exposure) can impact device reliability and operational consistency.
• Environmental Sensitivity: OTFTs are highly susceptible to doping effects from oxygen and
moisture, which can alter electrical properties such as mobility, I off, and Vth.
• Material Ionization Energy: Differences in ionization energy (IE) of organic materials influence
charge injection efficiency, requiring careful material selection for optimized performance.
• Charge Carrier Mobility: Mobility is affected by grain boundaries and doping levels, constraining
performance in high-speed or high-frequency applications.
• On-Off Current Ratio: Maintaining a high Ion/Ioff ratio is challenging due to parasitic effects, such as
trap-assisted conduction and leakage currents.
• Balancing electrical performance and mechanical compliance in organic semiconductors remains a significant
challenge
Engineering Standards
- Material Selection: High mobility and stable semiconductors.
- Performance Metrics: High on-off ratio, low voltage, stable charge transport.
Fig 20. Logo of Silvaco Fig 21. Logo of ORIGIN Fig 22. Logo of Tonyplot
SILVACO is a leading provider of TCAD (Technology Computer-Aided Design) tools used in semiconductor device
design. These tools simulate device behavior, allowing designers to optimize performance and reduce manufacturing
costs before fabrication, ensuring efficient front-end design and functionality verification.
ATLAS is a powerful simulation tool from Silvaco that models and simulates the electrical and physical behavior of
semiconductor devices, including transistors and diodes, using both 2D and 3D models.
ORIGIN is a used in device simulation for data analysis and visualization. DeckBuild is a graphical user interface
(GUI) designed for building simulation decks for the Silvaco simulation tools, particularly for ATLAS. TonyPlot 3D
is used for visualizing and analyzing the results of TCAD simulations, particularly for 3D data. It is often used in
conjunction with ATLAS to view the outputs of simulations in a 3D format.
Video of the project
Paper acceptance proof
Project Timeline
Gantt Chart
Title Finalisation
Workplan/0th Review
Initial code and
implementation
Initial simulation
1st Review
Parameter extraction
2nd Review
Paper publication
Final Review
References
1.O. Marinov and M. Jamal Deen, “Performance of Organic thin film transistors,” J. Vac. Sci. Technol. B. vol. 24, no. 4,
2006.
2.M. J. Deen, M. H. Kazemeini, and S. Holdcroft, “Contact effects and extraction of intrinsic parameters in poly (3-
alkylthiophene) P3AT thin film field-effect transistors,” J. Appl. Phys., vol. 103, no. 12, pp. 124 509 (1-7), Jun. 2008.
3.Y. Roichman and N. Tessler, “Analysis of polymer field field effect transistor,” Mat. Res. Soc. Symp. Proc. vol. 665, pp.
C. 7. 4. (1-6), 2001.
4.Brijesh Kumar, B. K. Kaushik, Y. S. Negi and poornima Mittal, “Polymeric Thin Film Transistor Characteristics and their
Applications: Prospects and Challenges,” Proc. IEEE Int. Conf. on Electrical and Computer Technology (ICETECT-2011),
Nagercoil (Kanyakumari), March 23-24, 2011.
5.H. Klauk, M. Halik, U. Zschieschang, G. Schmid and W. Radik, “High mobility polymer gate dielectric pentacene thin
film transistors,” J. Appl. Phys. vol. 92, no. 9, pp. 5259-63, Nov, 2002.
6.Jin Jang and S. H. Han, “High performance OTFT and its application,” Current Applied Physics, vol. 6S1, pp. e17-e21,
2006.
Internet Sources:
7. https://www.sciencedirect.com/journal/organic-electronics, https://www.researchgate.net/
8. https://www.nature.com/nmat, https://pubs.rsc.org/en/journals/journalissues/tc, https://ieeexplore.ieee.org
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