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Vlsi Design Flow

The document outlines the VLSI design flow, detailing both front-end and back-end design processes. It describes various design domains (Behavioral, Structural, and Physical) and levels (System, RTL, Logic, Circuit) involved in VLSI design. Key steps include design entry, logic synthesis, system partitioning, floor planning, placement, and routing, culminating in post-layout simulation to ensure functionality.

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vaishnavicheemala1
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© © All Rights Reserved
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2 views

Vlsi Design Flow

The document outlines the VLSI design flow, detailing both front-end and back-end design processes. It describes various design domains (Behavioral, Structural, and Physical) and levels (System, RTL, Logic, Circuit) involved in VLSI design. Key steps include design entry, logic synthesis, system partitioning, floor planning, placement, and routing, culminating in post-layout simulation to ensure functionality.

Uploaded by

vaishnavicheemala1
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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VLSI Design Flow

1
Design Paradigm
System Level

RTL Level Structura


Behaviora l
l Logic Level Domain
Domain A
Circuit Level

Physica
l
Domain

 The design representation space consists of domains and levels


 Behavioral domain most abstract
 Structural domain specifies the architecture
 Physical domain include the transistors and layout
2
Domains

Behavioral a = b+c
Domain z = !(a·d)

b
Structural c a z
Domain d

Physical
Domain

3
Levels

System Level Gate Level


c
a
z
b d

Circuit
Register Level
Level
Clk
Z
H
H

Reg. Reg. B
r
Registe

Registe
B
EN

EN
B

A
r

A
Q1

Q8
Q8

Q1

C
B
Adder
D

4
Design Paradigm
Tabl showing Domains and Level of
e Design
Domains

Behavioral Structural Physical

System System Blocks Chip


Specifications

RTL RTL Registers Macro Cells


Specifications

Levels
Logic Boolean Logic Gates Standard
Functions Cells

Circuit Differential Transistors Masks


Equations

5
Typical VLSI Design Flow

6
Typical VLSI Design Flow
Front-end design (Logical design) consists of following steps

1. Design entry – Enter the design in to an ASIC design


system
using a hardware description language ( HDL ) or schematic entry

2. Logic synthesis – Generation of netlist (logic cells and their


connections) from HDL code. Logic synthesis consists of
following steps :
(i)
(ii) Technology independent
Translation: Logic optimization
Converting Behavioral to structural
description
domain
(iii) Technology mapping or Library binding
3. System partitioning - Divide a large system into ASIC-sized
pieces

4. Pre-layout simulation - Check to see if the design functions


correctly. Gate level functionality and timing details can be
verified. 7
Partitioning

8
Typical VLSI Design Flow

Back-end design (Physical design) consists of following steps

5. Floor planning - Arrange the blocks of the netlist on the chip

6. Placement - Decide the locations of cells in a block

7. Routing - Make the connections between cells and blocks

8. Circuit Extraction - Determine the resistance and capacitance of


the interconnect

9. Post-layout simulation - Check to see the design still works with


the added loads of the interconnect
9
Floor planning

 The entire arrangement of blocks, including their positions,


is called a floor-plan

 Every functional module is assigned an outline area so as


to facilitate the gate placement

 Allocation of different pins (I/O, CLK, and other control pins)


of various functional blocks so that internal and external
nets can be routed

10
Placement and Routing

 After partitioning the circuit into smaller modules and floor


planning the layout to determine block outlines and pin
locations, placement determines the locations of standard
cells or logic elements within each block.

 In routing phase, connection between different blocks


is
defined.

11

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