Chapter 6
Chapter 6
2. Stack organization
3. Instruction formats
4. Addressing modes
DRM[SP]
SPSP + 1
2. Updating SP.
3. Stack organization
The instruction format in this type of computer uses one address field.
AC is the accumulator register and M[X] symbolizes the memory word located at
address X.
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General register organization
The instruction format in a computer with a general register
organization type needs two or three register address fields.
e.g. ADD R1, R2, R3 R1 R2 + R3.
e.g. ADD R1, R2 denotes R1 R1 + R2. Only register addresses for R1 and R2 need be
specified in this instruction.
e.g. ADD R1, X denotes R1 R1 + M[x]. It has two address fields, one for register R1 and
the other for the memory address X.
This is because the operation is performed on the two items that are
on top of the stack.
LOAD and STORE instructions that have one memory and one register
address and computational-type instructions that have three addresses
with all three specifying processor registers.
1. Arithmetic instruction
2. Logical and bit manipulation
3. Shift instruction
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Cont..
Arithmetic Instruction: The four basic arithmetic operations are
addition, subtraction, multiplication and division.
Most computers provide instructions for all four operations.
Some small computers have only addition and possibly subtraction
instructions.
The multiplication and division must then be generated by means of
software subroutines.
The four basic arithmetic operations are sufficient for formulating
solution to scientific problems when expressed in terms of numerical
analysis methods.
Shifts are operations in which the bits of a word are moved to the left or right.
The bit shifted in at the end of the word determines the type of shift used.
Shift instructions may specify either logical shifts, arithmetic shifts, or rotate
type operations.
The End