Chapter3

Gate-Level Minimization
• Karnaugh Maps
• SOP and POS Simplifications
• Don’t Care Conditions
• Quine McCluskey Minimization Algorithm
• NAND and NOR Implementations
• Parity Generation and Detection
Learning Objectives
• Given a function (completely or incompletely specified) of three to
five variables, plot it on a Karnaugh map and use to simplify Boolean
expressions. The function may be given in minterms, maxterms, or
algebraic form.
• Determine the essential prime implicants of a function from a map.
• Obtain the minimal sum-of-products or product-of-sums form of a
function from a map.
• Determine all of the prime implicants of a function from a map.
• Understand the relation between operations performed using the map
and the corresponding algebraic operations.
• Study incompletely specified functions and their simplification using
map method.
• Simplify given function using Quine-McCluskey minimization
algorithm.
• Perform NAND and NOR implementations for a given function.
• Study all non-degenerate forms and function implementation using
these forms
• Study Exclusive-OR and Exclusive-NOR functions, their properties
and applications in digital design.
K-Map Method
• The Karnaugh Map (K-Map) method uses a simple
procedure for minimizing Boolean functions.
– The map is a diagram made up of squares with each square
representing one minterm of the function.
– The key is to learn to identify visual patterns.
– The result is always an expression that is in one of the two standard
forms, SOP or POS.
– Much faster and more efficient than previous minimization
techniques with Boolean algebra. It can be used to simplify
functions of up to six variables.
– It is possible to find two or more expressions that satisfy the
minimization criteria.
– Rules to consider
 Every cell containing a 1 must be included at least once.
 The largest possible “power of 2 rectangle” must be enclosed.
 The 1’s must be enclosed in the smallest possible number of rectangles.
Two-Variable Map

• A two-variable map
holds four minterms for
two variables.
– We mark the squares of the
minterms that belong to a
given function.
– Combine adjacent squares to
find minimal expression.
Three-Variable Map
• A three-variable map holds eight minterms for three
variables.
– Again, we mark the squares of the minterms that belong to a given
function.
– Note that the sequence is arranged in Gray code to allow only one
bit to change from column to column and row to row.
• Since any two adjacent cells in a 3-variable map represent a change in
only a single bit, we use this to do minimization.
– Consider the two cells for m0 and m1 where the difference is the
negation of the bit z.
– F = m0 + m1 = x′y′z′ + x′y′z = x′y′(z′ + z) = x′y′
Minimization Example
• Each of the two adjacent pairs of entries can be
simplified by eliminating the changing bit (z in both
cases).
– F (x,y,z) = x′y′ + xy
Notes on Adjacency
• So far, we have assumed that adjacent cells in the
map need to touch each other but this is not always
the case.
– m0 and m2 are considered adjacent
» m0 + m2 = x′y′z′ + x′yz′ = x′z′(y′ + y) = x′z′
– m4 and m6 are considered adjacent
» m4 + m6 = xy′z′ + xyz′ = xz′(y′ + y) = xz′
3-Variable Map Patterns
• The number of adjacent squares that may be
combined always represent a number that is a power
of 2 such as 1, 2, 4, and 8.
– One square represents one minterm with three literals.
– Two adjacent squares represents a term of two literals.
– Four adjacent squares represents a term of one literal.
– Eight adjacent squares represents the entire map and produces a
function that is always equal to 1.
Mapping Functions Example
• Given the function
– F = x′z + xy′ + xy′z + yz
• Map the function
• Determine the sum of minterms equation
• Determine the minimum sum of products expression

1 1
1 1 1

• Sum of minterms: F = ∑(1, 3, 4, 5, 7)

• Minimum sum of products: F = z + xy′
Example 3-1
– Simplify Boolean function
F(x,y,z) = (2,3,4,5)
• Solution:
– 1 is marked in each minterm
that represents the function
– Find the possible adjacent
squares and mark them with
rectangles
– The upper right rectangle
represents the area
enclosed closed by x′y
(eliminating the changing
bit)
– Similarly lower left
rectangle represents xy′
– The logical sum of these
two terms gives:
F = x'y + xy'
Example 3-2
– F(x,y,z) = (3,4,6,7)
• Solution:
– 1 is marked in each minterm
that represents the function
– Find the possible adjacent
squares and mark them with
rectangles
– Two adjacent squares are
combined in the third
column to give a two-literal
term yz
– The remaining two squares
with 1’s are enclosed in half
rectangles. This gives two-
literal term xz′
– The logical sum of these
two terms gives:
F = yz + xz′
Example 3-3
– F(x,y,z) = (0,2,4,5,6)
• Solution:
– 1 is marked in each minterm
that represents the function
– Find the possible adjacent
squares and mark them with
rectangles
– We combine four adjacent
squares to get a single literal
term z’ as m0+m2+m4+m6
= x'y'z'+x'yz'+xy'z'+xyz′
= x'z'(y'+y) +xz'(y'+y)
= x'z' + xz′ = z'
– The remaining two squares with
1’s are enclosed by a rectangle
(with one square that is already
used once). This gives two-
literal term xy′
– The logical sum of these two
terms gives:
F = z′ + xy′
Example 3-4
– F = A'C + A'B + AB'C + BC
– express it in sum of minterms
find the minimal sum of
products expression
• Solution:
– The two squares corresponding
to the first term A′C. (A′ first
row and C two middle columns)
– A′B has 1’s in squares 011 and
010 in the same way
– AB′C has 1 square 101 and BC
has two 1’s in squares 011 and
111
– The function has total of 5
minterms as shown in figure
– Find the possible adjacent
squares and mark them with
rectangles as shown in the map
– It can be simplified with only
two terms giving:
F = C + A′B
Four-Variable Map
• A four-variable map
holds 16 minterms
for four variables.
– Again, we mark the
squares of the
minterms that belong
to a given function.
– Note that the
sequence is not
arranged in a binary
way.
– The sequence used
is a Gray code and
allows only one bit to
change from column
to column and row to
row.
4-Variable Map Patterns
• The number of adjacent squares that may be
combined always represent a number that is a power
of 2 such as 1, 2, 4, 8, and 16.
– One square represents one minterm with four literals.
– Two adjacent squares represents a term of three literals.
– Four adjacent squares represents a term of two literals.
– Eight adjacent squares represents a term of one literal.
– Sixteen adjacent squares represents the entire map and produces a
function that is always equal to 1.
Minimization Example

• The eight adjacent squares can be combined to form

the one literal term y.
• Four adjacent squares can be combined to form the
two literal term wz′.
• F = y+wz′
Another Example

• Four adjacent corners can be combined to form

the two literal term x′z′.
• Four adjacent squares can be combined to form
the two literal term x′y.
• The remaining 1 is combined with a single
adjacent 1 to obtain the three literal term w′y′z′.
• F = x′z′ + x′y + w′y′z′
Example 3-5
– F(w,x,y,z) =
(0,1,2,4,5,6,8,9,12,13,14)
• Solution:
– 1 is marked in each minterm
that represents the function
– Find the possible adjacent
squares and mark them with
rectangles
– We combine eight adjacent
squares to get a single literal
term y′
– The top two 1’s on the right
are combined with the top
two 1’s on the left to give the
term w′z′
– We combine the single
square left on right with three
adjecent squares that are
already used to give the term
xz′
– The logical sum of these
three terms gives:
F = y′ + w′z′+xz′
Example 3-6
– F = A′B′C′+B′CD′+A′BCD′+AB
′C′
• Solution:
– Each of three literal term in
map is represented by two
squares and four literal term
in map is represented by one
square
– We combine the 1’s in the four
corners to give the term B′D′
– The two left hand 1’s in the
top row are combined with
two 1’s in the bottom row to
give the term B′C′
– The remaining 1’s may be
combined in the two-square
area to give the term A′CD′
– The logical sum of these three
terms gives:
F = B′D′ + B′C′+ A′CD′
Prime Implicants Definitions
Example of Prime Implicants
Essential Prime Implicants

Essential Prime Implicants:

BD, AC, B′C
Distinguished 1-cells:
M2, m5, m14

f= BD+ AC+ B′C

Algorithm for determining minimum
SOP using a K-map
Five-Variable Map
• A five-variable map holds thirty-two minterms for five
variables.
– We use two four variable map with one of the variables distinguishing
between the two.
– Each square in the first map is adjacent to the corresponding square in
the second map (i.e. 4 and 20 are adjacent). It is just like placing one
map on the top of the other.
5-Variable Map Patterns
5-Variable Map Patterns
• The number of adjacent squares that may be
combined always represent a number that is a power
of 2 such as 1, 2, 4, 8, 16, and 32.
– One square represents one minterm with five literals.
– Two adjacent squares represents a term of four literals.
– Four adjacent squares represents a term of three literals.
– Eight adjacent squares represents a term of two literals.
– Sixteen adjacent squares represents a term of one literal.
– Thirty-two adjacent squares represents the entire map and
produces a function that is always equal to 1.
Note that the squares on map can be combined horizontally or
vertically but not diagonally since these differ by more than one
variable.
Minimization Example of 5-Variable
Map
• Example 3-7
• Simplify the Boolean function
F(V,W,X,Y,Z) = ∑(0,2,4,6,9,13,21,23,25,29,31)

vxz
V′w′z′

Wy′z

• F = v′w′z′ + wy′z + vxz

Minimization Example of 5-Variable
Map
6-Variable Map Patterns

• A six-variable map holds sixty four minterms for six variables.

–We use four four variable maps with two of the variables
distinguishing between the four.
–Each square in the first map is adjacent to the corresponding
square in the second map (i.e. 4 and 20 are adjacent) and in
the fourth map(i.e. 4 and 36 are adjacent). It is just like placing
one map on the top of the other.
6-Variable Map Patterns
6-Variable Map Patterns
• The number of adjacent squares that may be combined
always represent a number that is a power of 2 such as 1,
2, 4, 8, 16, 32, and 64.
– One square represents one minterm with six literals.
– Two adjacent squares represent a term of five literals.
– Four adjacent squares represent a term of four literals.
– Eight adjacent squares represent a term of three literals.
– Sixteen adjacent squares represent a term of two literals.
– Thirty-two adjacent squares represents a term of one literal.
– Sixty-four adjacent squares represent the entire map and produce a
function that is always equal to 1.
Minimization Example of 6-Variable
Map
Simplify the Boolean function
F(A,B,C,D,E,F)=
∑(9,11,13,15,16,18,19,25,27,29,31,41,43,45,47,50,51,57,59,61,63)
Product of Sums Minimization
• By definition, all the squares in a map that are not
marked with a 1 represent the complement of the
function.
– If we mark the empty squares with 0s and then combine the zeros
into valid adjacent squares, we obtain a simplified expression of the
complement of the function i.e., F′
– The complement of F′ [as (F′)′ = F] by DeMorgan’s theorem (by
taking the dual and complementing each literal, section 2-4), gives
us the product of sums form
 POS Minimization Example

xz yz

0
W′x 0 0 0 0 xy
0 0 0
0

• F′ = w′x + yz + xz + xy
• F = (F′)′
• =(w′x + yz + xz + xy)′ = (w + x′)(y′ + z′)(x′ + z′)(x′ + y′)
Example 3-8
– F = (0,1,2,5,8,9,10)
– Simplify the function in
» sum of products (SOP)
» Product of sums (POS)
• Solution:
– The squares marked with 1’s
represents minterms and are
combined to form simplified
function in sum of products
(SOP). F=B′D′+B′C′+A′C′D
– If the squares marked with
0’s are are combined we
obtain the simplified
complemented function F
′=AB+CD+BD′
– Applying DeMorgan’s
theorem we obtain the
simplified function in
product of sum form (POS)
F=(A′+B′)(C′+D′)(B′+D)
SOP and POS Gate Implementation
Two-level logic diagrams
Function Comparison
Working With Maxterms
• At times, we may be required to work with maxterms.
– The previous process actually worked with minterms. Remember
that the numbers used for minterms are the opposites of the
numbers used for maxterms:
» F(w, x, y, z) = ∑(0, 1, 2, 8, 9, 10, 11), uses minterms
» F(w, x, y, z) = π(3, 4, 5, 6, 7, 12, 13, 14, 15), uses maxterms
– If you are given minterms, fill in 1’s for the minterms and then fill the
remaining cells with 0’s
– If you are given maxterms, fill in 0’s for the maxterms and then fill
the remaining cells with 1’s
– For SOP simplification, solve the map for the 1’s
– For POS simplification, solve the map for the 0’s to get
complemented function. Taking the complement of this
complemented function we obtain function in POS form
Don’t Care Conditions
• So far, we have always assumed that all combinations
of the input values are necessary in our expressions.
• Sometimes there are unspecified combinations within
a function.
– For example, four bit binary coded decimal code has six
combinations that are not used.
• Functions that have unspecified outputs for some
input combinations are called incompletely specified
functions.
– These are called don’t care conditions because in most applications,
we do not care what the specification of the combination is and not
concerned about the function output for these combinations..
Indicating Don’t Care Conditions
• A don’t care condition cannot be specified with a 1
because it would require the function to always be 1
for the combination.
• Likewise, a don’t care condition cannot be specified
with a 0 because it would require the function to
always be 0 for the combination.
• To specify don’t care conditions in a map, we use the
letter ‘x’ or ‘d’.
– When we choose adjacent squares to simplify the map, the don’t
care minterms can be assumed to be 0 or 1, whichever leads to the
simplest expression.
Simplification with Don’t Care
Conditions
• Simplify the Boolean function: F (w,x,y,z) = (1,3,5,9,13)
• It has don’t-care conditions: d(w,x,y,z) = (0,2,7)

F1 = w′x′+y′z = (0, 1, 2, 3, 5, 9, 13)

F2 = w′z+y′z = (1, 3, 5, 7, 9, 13)
Example 3-9
• Simplify the Boolean function: F (w,x,y,z) = (1,3,7,11,15)
• It has don’t-care conditions: d(w,x,y,z) = (0,2,5)

F = (0,1,2,3,7,11,15) ; F = (1,3,5,7,11,15)
Either of two are acceptable
More Examples with Don’t Care

CD
00 01 11 10
AB
00 0 1 0 0
01 x x x 1 F=ACD+B+AC
11 1 1 1 x
10 x 0 1 1
CD
00 01 11 10
AB
00 0 1 0 0
01 x x x 1 F=ABCD+ABC+BC+AC
11 1 1 1 x
10 x 0 1 1
Function Simplification using Quine
McCluskey Method
• The Quine-McCluskey method is an exact algorithm which
finds minimum cost sum-of-products implementation of a
Boolean function.
• There are four steps in the Quine-McCluskey algorithm:
 Generate Prime Implicants
 Construct Prime Implicant Table
 Reduce the Prime Implicant Table by
– Removing Essential Prime Implicants
– Column Dominance
– Row Dominance
 Solve Prime Implicant Table by (i) Petrick’s Method (ii)
Branching Method
 Example
f(a,b,c,d,e)=∑m(1,3,4,5,6,7,10,11,12,13,14,15,
18,19,20,21,22,23,26,27)
Example Cont… Group minterms Variables
abcde
0 1 00001
4 00100
 minterms sorted
1 3 00011
into groups according
to number of 1’s in 5 00101
each term. 6 00110
10 01010
12 01100
18 10010
20 10100
2 7 00111
11 01011
13 01101
14 01110
19 10011
21 10101
22 10110
26 11010
3 15 01111
23 10111
27 11011
 Column 1

Grou minterm abcde

p s
0 1 0 0 0 0 1
4 0 0 1 0 0
1 3 0 0 0 1 1
5 0 0 1 0 1
6 0 0 1 1 0
10 0 1 0 1 0
12 0 1 1 0 0
18 1 0 0 1 0
20 1 0 1 0 0
2 7 0 0 1 1 1
11 0 1 0 1 1
13 0 1 1 0 1
14 0 1 1 1 0
19 1 0 0 1 1
21 1 0 1 0 1
22 1 0 1 1 0
26 1 1 0 1 0
3 15 0 1 1 1 1
23 1 0 1 1 1
27 1 1 0 1 1
 Column3 Column4

Gp minterms abcde Gp minterms abcde

0 1,3,5,7 0 0 - - 1 0 4,5,6,7,12,13,14,15 0 - 1 - -
4,5,6,7 0 0 1 - - 4,5,6,7,20,21,22,23 - 0 1 - -
4,5,12,13 0 - 1 0 - 4,5,12,13,6,7,14,15 0-1--
4,5,20,21 - 0 1 0 - 4,5,20,21,6,7,22,23 -01--
4,6,12,14 0 - 1 - 0 4,6,12,14,5,7,13,15 0-1--
4,6,20,22 - 0 1 - 0 4,6,20,22,5,7,21,23 -01--

1 3,7,11,15 0 - - 1 1
3,7,19,23 - 0 - 1 1
3,11,19,27 - - 0 1 1
5,7,13,15 0 - 1 - 1  The Prime implicants generated
5,7,21,23 - 0 1 - 1 are:-
6,7,14,15 0 - 1 1 - a′b′e ∑(1,3,5,7)
6,7,22,23 - 0 1 1 - a′d e ∑(3,7,11,15)
10,11,14,15 0 1 - 1 - b′d e ∑(3,7,19,23)
c′d e ∑(3,11,19,27)
10,11,26,27 - 1 0 1 - a′bd ∑(10,11,14,15)
12,13,14,15 0 1 1 - - bc′d ∑(10,11,26,27)
18,19,22,23 1 0 - 1 - ab′d ∑(18,19,22,23)
18,19,26,27 1 - 0 1 - ac′d ∑(18,19,26,27)
20,21,22,23 1 0 1 - - a′c ∑(4,5,6,7,12,13,14,15)
b′c ∑(4,5,6,7,20,21,22,23)
Prime Implicant Table
Reduced Prime Implicant Table
 The Prime Implicant Table
was constructed in the
previous slide. PIs 10 11 18 19 26 27
 Essential Prime Implicants a′de (3,7,11,15) ×
(EPIs) identified and
eliminated from the table and
corresponding minterms b′de (3,7,19,23) ×
also struck.
 The Essential Prime c′de (3,11,19,27) × × ×
Implicants (EPIs) obtained in
this way are:- a′bd (10,11,14,15) × ×
_ a′b′e ∑(1,3,5,7)
_ a′c ∑(4,5,6,7,12,13,14,15) bc′d (10,11,26,27) × × × ×
_ b′c ∑(4,5,6,7,20,21,22,23)
ab′d (18,19,22,23) × ×
 Now we can construct
Reduced Prime Implicant ac′d (18,19,26,27) × × × ×
Table and apply column
dominance to reduce it
further.
 Eliminate dominating
column.
Further Reduced Prime Implicant
Table
 The table is further PIs 10 18 26
reduced by applying
Column Dominance. a′bd (10,11,14,15) ×
 We can now apply Row
Dominance and eliminate bc′d (10,11,26,27) ×
dominated rows.
 Rows bc′d and ac′d ab′d (18,19,22,23) ×
dominate a′bd and ab′d.
Hence dominated rows a ac′d (18,19,26,27) ×
′bd and ab′d can be
eliminated. The secondary
EPIs bc′d and ac′d cover all
minterms and are selected
for minimal solution.
 We can also apply row f(a,b,c,d,e)=a′b′e+a′c+b′c+bc′d+ac′d
dominance first and then
column dominance.
Petrick Method
 In Petrick’s method, a
Boolean expression P is PIs 10 11 18 19 26 27
formed which describes all
possible solutions of the table.
 The prime implicants in the
table are numbered in order, p1 a′de (3,7,11,15) ×
from 1 to 6. For each prime
implicant pi, a Boolean p2 b′de (3,7,19,23) ×
variable Pi is used which is
true whenever prime implicant p3 c′de (3,11,19,27) × × ×
pi is included in the solution.
 Remember that pi is prime p4 a′bd (10,11,14,15) × ×
implicant whereas Pi is
corresponding Boolean p5 bc′d (10,11,26,27) × × × ×
proposition(true/false
statement) which is true(1) or p6 ab′d (18,19,22,23) × ×
false(0) value.
 Using these Pi variables, a p7 ac′d (18,19,26,27) × × × ×
larger Boolean expression P
can be formed, which captures
the precise conditions for
every row in the table to be
covered.
All Possible Solutions using Petrick
Method
• P=(P4+P5)(P1+P3+P4+P5)(P6+P7)(P2+P3+P6+P7)(P5+P7)
(P3+P5+P7)
P=(P4+P5)(P6+P7)(P5+P7) Absorption theorem
P=(P4+P5)(P7+P5P6) + dist over .
P=P4P7 +P4P5P6+P5P7+P5P6
Each product term in the above Boolean expression
describes a solution for the table.
• All possible solutions are
f1(a,b,c,d,e)=a′b′e+a′c+b′c+a′bd+ac′d
f1(a,b,c,d,e)=a′b′e+a′c+b′c+bc′d+ac′d
f1(a,b,c,d,e)=a′b′e+a′c+b′c+ab′d+ac′d
 Map Simplification of the Function

de
de 00 01 11 10
00 01 11 10
bc bc
1* 1 1 1
00 00

01 1 1 1 1 01 1* 1 1 1

1* 1 1 1
11 11

10 1 1 10 1 1

a=0 a=1

f(a,b,c,d,e)=a′c+b′c+a′b′e+(a′bd+ac′d or bc′d+ab′d or bc′d+ac′d)

NAND and NOR Implementations
• Digital circuits are frequently constructed with NAND and
NOR gates due to following rasons:-
– they are easier to fabricate with electronic components
– they are used in all IC digital logic families
• Because of their use, rules have been developed that
allow us to convert Boolean functions using AND, OR and
NOT into the equivalent NAND and NOR logic diagrams.
NAND Circuits
• The NAND gate is a universal gate that can be used to
construct any gate, therefore being able to replace all
AND and OR gates.
NAND Notation
• A convenient method for creating a NAND circuit is to
obtain the simplified Boolean function in terms of
Boolean operators and then convert the function to
NAND logic.
• To facilitate the conversion to NAND logic we define
equivalent alternative symbols as shown below for
NAND gate
Two-Level Implementation
• The implementation of Boolean functions with NAND
gates requires that the function be in sum of products
form.
– F = AB + CD
• All three diagrams are equivalent
Two-Level Implementation
• F = AB+CD+E
• F = ((AB)' (CD)' E')' =AB+CD+E
Example 3-10
• Implement F(x,y,z)= (1,2,3,4,5,7) with NAND gates
Two-Level NAND Rules
• Given a Boolean function, follow these rules to obtain
the NAND logic diagram:
– Simplify the function and express it in sum of products
– Draw a NAND gate for each product term of the expression that has
at least two literals. This is group of first level gates
– Draw a single gate using the AND-invert or the invert-OR graphic
symbol in the second level, with inputs coming from outputs of first
level gates
– A term with a single literal requires an inverter in the first level,
unless the single literal is already complemented
Multilevel NAND Circuits
• The general procedure for converting a multi-level
AND-OR diagram into an all-NAND diagram is as
follows:
– Convert all AND gates to NAND gates with AND-invert graphic
symbols
– Convert all OR gates to NAND gates with invert-OR graphic symbols
– Check all the bubbles in the diagram
» Every bubble that is not compensated by another along the
same line will require the insertion of an inverter or complement
the input literal
Multilevel NAND Example
Multilevel NAND Example
NOR Circuits
• The NOR operation is a dual of the NAND operation
and therefore all procedures and rules for NOR logic
are the dual of the corresponding procedures and
rules for the NAND logic.
NOR Notation
• A convenient method for creating a NOR circuit is to
obtain the simplified Boolean function in terms of
Boolean operators and then convert the function to
NOR logic.
Two-Level NOR Implementation
• The implementation of Boolean functions with NOR
gates requires that the function be in product of sums
form.
– F = (A + B)(C + D)E
Multilevel NOR Implementation
Other Two-Level Implementations
• The types of gates most often used in integrated circuits are NAND and NOR
gates. For this reason, NAND and NOR logic implementations are the most
important from a practical point of view.
• Some(but not all) NAND or NOR gates allow the possibility of a wired
connection between the outputs of two gates to provide a specific logic
function.
• For example, open-collector TTL NAND gates, when tied together, perform
wired-AND logic. Similarly, the NOR outputs of ECL gates can be tied
together to perform a wired-OR function. Both are depicted below
Non-degenerate Forms
• Consider that we have four types of gates:
AND, OR, NAND, and NOR.
• In a two-level circuit, we can have as many as 16 combinations
of two-level forms:
– Eight of these combinations are called degenerate forms because they
degenerate to a single operation
» For example, an AND-AND circuit is simple an AND of all inputs
• The eight non-degenerate forms are:

Combine ‘1s’ on map Combine ‘0s” on map

AND-OR OR-AND

NAND-NAND NOR-NOR
NOR-OR NAND-AND
OR-NAND AND-NOR
AND-OR- INVERT Implementation
• The two forms NAND-AND and AND-NOR are
equivalent and can be treated together.
• Both perform the AND-OR-INVERT function
• AND-NOR resembles the AND-OR except for the
inversion done by the bubble in the output of NOR
gate.
• Therefore, if the complement of the function is
simplified into sum-of-products form (by combining
0’s on the map, it will be possible to implement F′
with the AND-OR part of the function.
• In the figure (next slide) the function implemented is
– F = (AB+CD+E)′
– F' = AB+CD+E (sum of products for F′)
AND-OR-INVERT Implementation
OR-AND-INVERT Implementation
• The OR-NAND and NOR-OR are equivalent and can be
treated together.
• Both forms perform the OR-AND-INVERT function
• OR-NAND resembles the OR-AND except for the
inversion done by the bubble in the output of NAND
gate.
• Therefore, if the complement of the function is
simplified into product-of-sums form (by combining
1’s on map), it will be possible to implement F′ with
the OR-AND part of the function.
• In the figure (next slide) the function implemented is
– F = [ (A+B)(C+D)E ]′
– F' = (A+B)(C+D)E (product of sums for F′)
OR-AND-INVERT Implementation
Exclusive-OR Function
• Exclusive-OR (XOR) performs the following function
– x  y = xy′ + x′y
• This function is equal to one only if one of x or y is
equal to one but not both.
• Exclusive NOR (XNOR) can be generated by taking the
complement of an XOR operation
– (x  y)′ = xy + x′y′
• XNOR is also known as equivalence
• The following identities apply to XOR
– x0=x
– x  1 = x′
– xx=0
– x  x′ = 1
– x  y′ = x′  y = (x  y)′
• XOR is also commutative and associative
– AB=BA
– (A  B)  C = A  (B  C) = A  B  C
Exclusive-NOR Function
Exclusive-OR Implementation using
NAND gates
Odd and Even Functions
• The XOR operation with three or more variables can be converted
into an ordinary Boolean function by replacing the  with its
equivalent Boolean expression
– A  B  C = (A  B) . C′ + (A  B)′ . C
– (AB′ + A′B)C′ + (AB + A′B′)C [As (A  B)′ = AB + A′B′]
– AB′C′ + A′BC′ + ABC + A′B′C
– ∑(1, 2, 4, 7)
• This function is equal to 1 only if one variable is equal to 1 or if all
three variables are equal to 1.
– This implies that an odd number of variables must be one. This is
defined as an odd function.
• The complement of an odd function is an even function.
Odd and Even Functions Cont…
• The three input odd function is implemented by means
of 2-input exclusive- OR gates
• The complement of an odd function (i.e., even function)
is obtained by replacing the output gate with an
exclusive- NOR gate
Odd and Even Functions Cont…
• The definition of Odd and Even functions can be extended to
functions with more than three variables as shown in the
following maps.
Parity Generation and Checking
• Exclusive-OR (XOR) functions are very useful in
systems requiring error-detection and correction
codes.
• Parity bit is for the purpose of detecting errors. It is an
extra bit added to make the total number of 1’s either
odd or even
• The message including the parity bit is transmitted
and then checked at the receiving end for errors
• An error is detected if the checked parity does not
correspond with the one transmitted
– A circuit that generates a parity bit is called a parity generator.
– The circuit that checks the parity is called a parity checker.
Parity Generation and Checking
Cont…
• Following is the truth table for even parity generator

• The three bits x, y and z constitute the message and are inputs.
The parity bit P is the output
• P must be generated to make the total number of 1’s even. So P
constitutes the odd function (three variable exclusive- OR
function)
Parity Generation and Checking
Cont…
•The four bits are
received by the
parity checker
circuit.
•The same parity
technique is used
both at transmitting
and receiving
terminals.
•The parity checker
circuit will output 1
whenever, the odd
number of input
variables are 1 i.e
even parity.
•Truth Table for
even parity checker
is listed to the left
Parity Generation and Checking
cont…
• The parity checker can also be implemented with
exclusive- OR gates
• parity check: C = x  y z P
– C=1: an odd number of data bit error
– C=0: correct or an even number of data bit error
EndEnd
of of
Chapter 1
Chapter3