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ELectronics-I_PPT_Lecture_Note_02

The document discusses the analysis and design of transistor amplifiers, emphasizing the importance of both DC and AC responses. It explains the concept of operating points, biasing circuits, and the effects of temperature on transistor performance. Additionally, it covers load line analysis and the relationship between collector current and voltage in various operational regions of a transistor.

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2 views

ELectronics-I_PPT_Lecture_Note_02

The document discusses the analysis and design of transistor amplifiers, emphasizing the importance of both DC and AC responses. It explains the concept of operating points, biasing circuits, and the effects of temperature on transistor performance. Additionally, it covers load line analysis and the relationship between collector current and voltage in various operational regions of a transistor.

Uploaded by

kmomoh599
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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ELECTRICAL & ELECTRONICS

ENGINEERING

ELECTRONICS-I

Lecture Presentation By:

Dr. ABDULAI SANKOH


 Transistor amplifier requires knowledge of both
the dc and ac response of the system.

 Analysis/design of any electronic amplifier has


two components:

1. DC portion
2. AC portion.

 Superposition theorem is applicable and the


investigation of the dc conditions can be totally
separated from the ac response.
 For transistor design the parameters for the
required dc levels will affect the ac response, and
vice versa.

 DC level of operation of a transistor is controlled by


a number of factors, including the range of possible
operating points on the device characteristics.

 To establish the desired operating point, dc current


and voltage levels must be determine.

 The design will also determine the stability of the


system. (sensitivity of the system to temperature
variations.
 Important basic relationships for a transistor

Eq. (1)

 For transistor amplifiers, the resulting dc current


and voltage establish an operating point on the
characteristics that define the region that will be
employed for amplification of the applied signal.

 The operating point is a fixed point on the


characteristics, called the quiescent (Q) point.
 The graph shows a general output device
characteristic with four operating points indicated.

Fig. 1

 Biasing circuit can be designed to set the device


operation at any of these points or others within the
active region.
 The maximum ratings are indicated on the
characteristics by a horizontal line for the maximum
collector current ICmax and a vertical line at the
maximum collector-to-emitter voltage VCEmax.

 Cutoff region, defined by IB ≥ 0µA.

 Saturation region defined by VCE≤VCEsat.

 Maximum power constraint is defined by the curve


PCmax.
 BJT device could be biased to operate outside
these maximum limits, but the result of such
operation would be either a considerable
shortening of the lifetime of the device or
destruction of the device.

 Temperature causes the device parameters such as


the transistor current gain () and the transistor
leakage current (ICEO) to change.

 Higher temperatures result in increased leakage


currents in the device, thereby changing the
operating condition set by the biasing network.
 For BJT biasing in its linear or active, cut-off and
saturation regions of operations, the following
must be true:

 Linear-region operation:
 Base-emitter junction forward biased ()
 Base-collector junction reverse biased
 Cutoff-region operation:
 Base-emitter junction reverse biased.
 Collector-emitter junction reverse biased.
 Input base current IB = 0, hence the output
 collector current, IC= 0.
 Collector-emitter voltage (VCE) is maximum
 Saturation-region operation:
 Base-emitter and collector-emitter junction are
both forward biased
 Collector-emitter voltage (VCE) is minimum.
 Base current IB can be applied to its maximum
value, hence collector current, IC is maximum.
 Collector-emitter voltage drop is minimum
because depletion layer is small (forward
biased).
 Maximum current flow through the transistor
 Transistor operate as a close switch i.e. fully-ON.
FIXED-BIAS CIRCUIT
For the dc analysis the network Fig. 2
can be isolated from the
indicated ac levels by replacing
the capacitors with an open
circuit equivalent.

 For analysis purposes only, the dc supply


VCC can be separated into two supplies as
shown below to permit a separation of
input and output circuits.
FIXED-BIAS CIRCUIT
Fig. 3

 For analysis purposes only,


the dc supply VCC can be
separated into two supplies
as shown in Fig. 3 to permit a
separation of input and
output circuits.
FIXED-BIAS CIRCUIT
Forward Bias of Base-Emitter
 Using KVL in the base-emitter circuit loop, the
input base current IB is given:

Eq. (2)

 The supply voltage VCC and the base-emitter


voltage VBE are constants.

Selection of a base resistor, RB, sets the level of base


current for the operating point.
FIXED-BIAS CIRCUIT
Collector-Emitter Loop
Fig. 4
The magnitude of the collector
current is related directly to IB by.

 Base current is controlled by the


level of RB and IC and is related to
IB by a constant β.
 Magnitude of IC is not a function of the resistance RC.

 Change RC to any level and it will not affect the level


IB or IC as long as we remain in the active region of th
FIXED-BIAS CIRCUIT
Collector-Emitter Loop
 The voltage across the collector-emitter
region of a transistor is given by:

Eq. (3)

Collector to emitter voltage, VCE can also


be express as:
Eq. (4)

 VC and VE are the collector and emitter voltages to


ground respectively.
FIXED-BIAS CIRCUIT
Collector-Emitter Loop
 For this transistor network
configuration, since VE = 0V
Eq. (5)

Eq. (6)

Eq. (7)
TRANSISTOR SATURATION
 The term saturation is applied to any system where
levels have reached their maximum values.

 For a transistor operating in the saturation region, the


current is a maximum value for the particular design.

 Change the design and the corresponding saturation


level may rise or drop.

 Saturation conditions are normally avoided because


the base-collector junction is no longer reverse-biase
and the output amplified signal will be distorted
TRANSISTOR SATURATION

 Applying Ohm’s law the resistance between


collector and emitter terminals can be determined
as follows:

Eq. (8)
LOAD LINE ANALYSIS
The analysis describe so far has been performed using
a level of β corresponding with the resulting Q-point.

Here, we will investigate how the network parameters


define the possible range of Q-points and how the
actual Q-point is determined.

Fig. 5b

Fig. 5a
LOAD LINE ANALYSIS
 The fixed-biased network establishes an output
that relates the variables IC and VCE given by:

 The output characteristics of the transistor also


relate the two variables IC and VCE as shown in the
characteristics of Fig. 5b.

 For the load line, superimpose the straight line


defined by Eq. (3) on the characteristics.
LOAD LINE ANALYSIS
 Choose IC=0 mA, specify one point located on the
horizontal axis given as

 Choose VCE=0 V, specify another point located on


the vertical axis given as
LOAD LINE ANALYSIS
 Joining the two points define by IC and VCE, the
resulting line on the graph of Fig. 6 is called the
load line since it is defined by the load resistor RC.

Fig. 6
LOAD LINE ANALYSIS
 If the level of IB is changed by varying the value of
RB the Q-point moves up or down the load line as
shown in the graph below.
Fig. 7
LOAD LINE ANALYSIS
 If VCC is held fixed and RC changed, the load line will
shift as shown in Fig. 8.
 Also, If IB is held fixed, the Q-point will move as
shown in the same graph.
Fig. 8
LOAD LINE ANALYSIS
 If RC is fixed and VCC varies, the load line shifts as
shown in Fig. 9

Fig. 9
THANK YOU

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