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lec 9 JFET ac analysis

The document discusses the AC analysis of JFETs, focusing on the small-signal model and the relationship between gate-to-source voltage and drain-to-source current. It covers Shockley's equation, the transconductance factor (gm), input and output impedance, and the construction of an AC equivalent circuit for FETs. Key parameters such as gm and impedance values for JFETs and MOSFETs are also highlighted.

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8 views22 pages

lec 9 JFET ac analysis

The document discusses the AC analysis of JFETs, focusing on the small-signal model and the relationship between gate-to-source voltage and drain-to-source current. It covers Shockley's equation, the transconductance factor (gm), input and output impedance, and the construction of an AC equivalent circuit for FETs. Key parameters such as gm and impedance values for JFETs and MOSFETs are also highlighted.

Uploaded by

percival2174
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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JFET AC ANALYSIS

• The ac analysis of an FET configuration requires that a small-signal ac


model for the FET be developed. A major component of the ac model
will reflect the fact that an ac voltage applied to the input gate-to-
source terminals will control the level of cur rent from drain to source.

• The gate-to-source voltage controls the drain-to-source (channel)


current of an FET.
Shockley’s Equation
• ID =IDSS(1- VGS/VP)2

• The change in collector current that will result from a change in gate-
to-source voltage can be determined using the transconductance
factor gm in the following manner:
• The prefix trans-in the terminology applied to gm reveals that it
establishes a relationship between an output and input quantity.
• The root word conductance was chosen because gm is determined by
a voltage-to-current ratio similar to the ratio that defines the
conductance of a resistor G= 1/R= I/V.
Graphical Determination of gm
• If we now examine
the transfer
characteristics of the
figure. we find that gm
is actually the slope
of the characteristics
at the point of
operation. That is
• On specification sheets, gm is provided as yfs where y indicates it is
part of an admittance equivalent circuit. The f signifies forward
transfer parameter, and the s reveals that it is connected to the
source terminal. In equation form
Mathematical Definition of gm
• The derivative of a function at a point is equal to the slope of the
tangent line drawn at that point
• where |VP| denotes magnitude only to ensure a positive value for gm.
• It was mentioned earlier that the slope of the transfer curve is a
maximum at VGS =0 V.
• Plugging in VGS =0 V in to the equation will result in the following
equation for the maximum value of gm for a JFET in which IDSS and VP
have been specified
• where the added subscript 0 reminds us that it is the value of gm when
VGS =0 V
Zi Input Impedance
• The input impedance of all commercially available FETs is sufficiently
large to as sume that the input terminals approximate an open circuit.
In equation form,

• For a JFET a practical value of 109 Ω (1000 M Ω ) is typical, while a


value of 1012 to 1015 Ω is typical for MOSFETs.
Output Impedance ZO
• The output impedance of FETs is similar in magnitude to that of conventional BJTs.
• On FET specification sheets, the output impedance will typically appear as y os with
the units of µS.
• The parameter yos is a component of an admittance equivalent circuit, with the
subscript o signifying an output network parameter and s the terminal (source) to
which it is attached in the model.
FET AC Equivalent Circuit
• Now that the important parameters of an ac equivalent circuit have been introduced and
discussed, a model for the FET transistor in the ac domain can be constructed.
• The control of Id by Vgs is included as a current source gmVgs connected from drain to source as
shown in the figure.
• The current source has its arrow pointing from drain to source to establish a 180° phase shift
between output and input voltages as will occur in actual operation
• The input impedance is represented by the open circuit at the input terminals
and the output impedance by the resistor rd from drain to source.
• Note that the gate to source voltage is now represented by Vgs (lower-case
subscripts) to distinguish it from dc levels.
• In addition, take note of the fact that the source is common to both input and
output circuits while the gate and drain terminals are only in “touch” through the
controlled current source gmVgs.
• In situations where rd is ignored (assumed sufficiently large to other elements of
the network to be approximated by an open circuit), the equivalent circuit is
simply a current source whose magnitude is controlled by the signal Vgs and
parameter gm— clearly a voltage-controlled device
JFET FIXED-BIAS CONFIGURATION
Redrawn the networl
Example
Assignment

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