Chapter01b - Intro To Digital Logic Design
Chapter01b - Intro To Digital Logic Design
Boolean algebra
A boolean value can be either true or false; In digital logic, 1 is usually used to represent true. 0 to represent false. Boolean functions produce a boolean output based on one or more boolean inputs. common functions: AND , OR , NOT NAND , NOR XOR , XNOR
Boolean algebra
-- AND Output is 1 if every input has a value of 1
x y x^y 0 0 0 0 1 0 1 0 0 1 1 1 -- OR Output is 1 if any of its inputs is 1 x 0 0 1 1 y 0 1 0 1 xy 0 1 1 1
Boolean algebra
-- NOT
a single Boolean value. output is the complement of inputs
x 0 1
x 1 0
Boolean algebra
-- NAND(NOT AND)
output is 1 if no inputs are not all of its inputs 1. x y x NAND y 0 0 1 0 1 1 1 0 1 -- NOR(NOT OR) 1 1 0 output is 1 if no inputs are equal to 1. x y x NOR y 0 0 1 0 1 0 1 0 0 1 1 0
Boolean algebra
-- XOR(exclusive OR)
The number of input that are 1 does matter. If two inputs are equal to 1,output is 0 else 1 in general , the output is equal to 1 if an odd number of input values are 1, and 0 if an even number of inputs are 1. x y x XOR y 0 0 0 0 1 1 1 0 1 1 1 0
Boolean algebra
-- XNOR(equivalence function)
the output is equal to 1 if an even number of input values are 1. x 0 0 1 1 y 0 1 0 1 x XNOR y 1 0 0 1
Multiplexers
A multiplexer ,or MUX, is a selector. It chooses one of its data inputs and passes it through to its output.
4-to-1 Mux.
Multiplexers
Multiplexers
Multiplexers can be cascaded to select from a large number of inputs.
Decoders
A decoder as its name implies,accepts a value and decodes it.
2-to-4 DEC.
Decoders
Encoders
A encoder is the exact opposite of the decoder. It receives 2n inputs and outputs an n-bit value corresponding to the one input that has a value of 1.
A 4-to-2 encoder.
Encoders
Comparators
A comparator compares two n-bit binary values to determine which is greater, or if they are equal.
A 1-bit comparator.
Adders
Adders are not only perform addition ,but also to perform subtraction, multiplication, and division. Half adder inputs two 1-bit values, X and Y ,and outputs their 2-bit sum as bits C and S.Bit C is the carry and bit S is the sum.
Adders
Full adder has three inputs: the two data inputs and a carry input C X iYi X i Cin Yi Cin and S X i Yi Cin.
Adders
With the carry input, full adders can be cascaded to produce an n-bit adder by connecting output C of an adder to Cin of the next adder called ripple adder.
A 4-bit ripple-adder.
Memory
Memory is a group of circuits used to store data. A memory component has some number of memory locations, each of which stores a binary value of some fixed length. Ex: A memory chip 512x 8 has 512 memory location, each has eight bits.
The address inputs of a memory chip choose one of its locations. Ex. The 512 x 8 memory chip has address lines A7 A6A0.
The data pins on a memory chip are used to access the data. Ex. The 512 x 8 memory chip has eight data pins D7 D6 D0
Memory
Two primary classes of chips, ROM and RAM. --ROM( Read Only Memory ) Data is programmed into the chip Not change the contents of the ROM nonvolatile memory Application: lookup table and BIOS
Memory
--RAM( Random Access Memory ) Initially contain no data Store and retrieve data from these locations. volatile memory Application: temporary storage in digital circuit and working memory in personal computers.
Sequential Circuits
The BCD to 7-segment decoder converts the binary representation of a decimal digit,0000 to 1001.
Combinational logic circuits are perfect for situations when we require the immediate application of a Boolean function to a set of inputs. There are other times, however, when we need a circuit to change its value with consideration to its current state as well as its inputs.
These circuits have to remember their current state.
As the name implies, sequential logic circuits require a means by which events can be sequenced. State changes are controlled by clocks. A clock is a special circuit that sends electrical pulses through a circuit. Clocks produce electrical waveforms such as the one shown below.
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State changes occur in sequential circuits only when the clock ticks. Circuits can change state on the rising edge, falling edge, or when the clock pulse reaches its highest voltage.
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Circuits that change state on the rising edge, or falling edge of the clock pulse are called edgetriggered. Level-triggered circuits change state when the clock voltage reaches its highest or lowest level.
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To retain their state values, sequential circuits rely on feedback. Feedback in digital circuits occurs when an output is looped back to the input.
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SR flip flop
You can see how feedback works by examining the most basic sequential logic components, the SR flip-flop.
The SR stands for set/reset.
The internals of an SR flip-flop are shown below, along with its block diagram.
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The behavior of an SR flip-flop is described by a characteristic table. Q(t) means the value of the output at time t. Q(t+1) is the value of Q after the next clock pulse.
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The SR flip-flop actually has three inputs: S, R, and its current output, Q. Thus, we can construct a truth table for this circuit, as shown at the right. Notice the two undefined values. When both S and R are 1, the SR flipflop is unstable.
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JK flip flop
If we can be sure that the inputs to an SR flip-flop will never both be 1, we will never have an unstable circuit. This may not always be the case. The SR flip-flop can be modified to provide a stable state when both inputs are 1. This modified flip-flop is called a JK flip-flop, shown at the right.
- The JK is in honor of
Jack Kilby.
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At the right, we see how an SR flip-flop can be modified to create a JK flip-flop. The characteristic table indicates that the flip-flop is stable for all inputs.
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D flip flop
Another modification of the SR flip-flop is the D flip-flop, shown below with its characteristic table. You will notice that the output of the flip-flop remains the same during subsequent clock pulses. The output changes only when the value of D changes.
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FSM
The behavior of sequential circuits can be expressed using characteristic tables or finite state machines (FSMs).
FSMs consist of a set of nodes that hold the states of the machine and a set of arcs that connect the states.
Moore and Mealy machines are two types of FSMs that are equivalent.
They differ only in how they express the outputs of the machine.
Moore machines place outputs on each node, while Mealy machines present their outputs on the transitions.
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The behavior of a JK flop-flop is depicted below by a Moore machine (left) and a Mealy machine (right).
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Although the behavior of Moore and Mealy machines is identical, their implementations differ.
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Although the behavior of Moore and Mealy machines is identical, their implementations differ. This is our Mealy machine.
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ASM
It is difficult to express the complexities of actual implementations using only Moore and Mealy machines.
For one thing, they do not address the intricacies of timing very well. Secondly, it is often the case that an interaction of numerous signals is required to advance a machine from one state to the next.
For these reasons, Christopher Clare invented the algorithmic state machine (ASM).
The next slide illustrates the components of an ASM.
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A stateful application requires both combinational and sequential logic. The following slides provide several examples of circuits that fall into this category.
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This illustration shows a 4-bit register consisting of D flip-flops. You will usually see its block diagram (below) instead.
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A binary counter is another example of a sequential circuit. The low-order bit is complemented at each clock pulse. Whenever it changes from 0 to 1, the next bit is complemented, and so on through the other flip-flops.
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