Digital Logic Design I

Chapter 1
Digital Systems and Binary Numbers

Digital Logic Design Ch1-1

 Outline of Chapter 1
 1.1 Digital Systems
 1.2 Binary Numbers
 1.3 Number-base Conversions
 1.4 Octal and Hexadecimal Numbers
 1.6 Signed Binary Numbers
 1.7 Binary Codes
 1.8 Binary Storage and Registers
 1.9 Binary Logic

Digital Logic Design Ch1-2

 Digital Systems and Binary
Numbers
 Digital age and information age
 Digital computers
 General purposes
 Many scientific, industrial and commercial applications
 Digital systems
 Telephone switching exchanges
 Digital camera
 Electronic calculators, PDA's
 Digital TV
 Discrete information-processing systems
 Manipulate discrete elements of information
 For example, {1, 2, 3, …} and {A, B, C, …}…

Digital Logic Design Ch1-3

 Analog and Digital Signal

 Analog system
 The physical quantities or signals may vary continuously over a specified
range.
 Digital system
 The physical quantities or signals can assume only discrete values.
 Greater accuracy
X(t) X(t)

t t
Analog signal Digital signal Digital Logic Design Ch1-4
 Binary Digital Signal
 An information variable represented by physical quantity.
 For digital systems, the variable takes on discrete values.
 Two level, or binary values are the most prevalent values.
 Binary values are represented abstractly by:
 Digits 0 and 1
 Words (symbols) False (F) and True (T) V(t)
 Words (symbols) Low (L) and High (H)
 And words On and Off Logic 1
 Binary values are represented by values
or ranges of values of physical quantities. undefine

Logic 0
t
Binary digital signal

Digital Logic Design Ch1-5

 Decimal Number System
 Base (also called radix) = 10
 10 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }
 Digit Position
 Integer & fraction 2 1 0 -1 -2
 Digit Weight 5 1 2 7 4
 Weight = (Base) Position
 Magnitude 100 10 1 0.1 0.01
 Sum of “Digit x Weight”
 Formal Notation
500 10 2 0.7 0.04

d2*B2+d1*B1+d0*B0+d-1*B-1+d-2*B-2

(512.74)10
Digital Logic Design Ch1-6
 Octal Number System
 Base = 8
 8 digits { 0, 1, 2, 3, 4, 5, 6, 7 }
 Weights
 Weight = (Base) Position 64 8 1 1/8 1/64
 Magnitude 5 1 2 7 4
 Sum of “Digit x Weight” 2 1 0 -1 -2
 Formal Notation 2 1 0 -1 -2
5 *8 +1 *8 +2 *8 +7 *8 +4 *8

=(330.9375)10
(512.74)8

Digital Logic Design Ch1-7

 Binary Number System
 Base = 2
 2 digits { 0, 1 }, called binary digits or “bits”
 Weights
4 2 1 1/2 1/4
 Weight = (Base) Position
 Magnitude 1 0 1 0 1
 Sum of “Bit x Weight” 2 1 0 -1 -2
 Formal Notation 2 1 0
1 *2 +0 *2 +1 *2 +0 *2 +1 *2
-1 -2

 Groups of bits 4 bits = Nibble

=(5.25)10
8 bits = Byte
(101.01)2
1011

11000101
Digital Logic Design Ch1-8
 Hexadecimal Number System
 Base = 16
 16 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }
 Weights
 Weight = (Base) Position 256 16 1 1/16 1/256

 Magnitude 1 E 5 7 A
 Sum of “Digit x Weight” 2 1 0 -1 -2
 Formal Notation 2 1 0 -1 -2
1 *16 +14 *16 +5 *16 +7 *16 +10 *16

=(485.4765625)10
(1E5.7A)16

Digital Logic Design Ch1-9

 The Power of 2

n 2n n 2n
0 20=1 8 28=256
1 21=2 9 29=512
2 22=4 10 210=1024 Kilo

3 23=8 11 211=2048
4 24=16 12 212=4096
5 25=32 20 220=1M Mega

6 26=64 30 230=1G Giga

7 27=128 40 240=1T Tera

Digital Logic Design Ch1-10

 Addition
 Decimal Addition

1 1 Carry
5 5
+ 5 5

1 1 0
= Ten ≥ Base
 Subtract a Base

Digital Logic Design Ch1-11

 Binary Addition
 Column Addition

1 1 1 1 1 1
1 1 1 1 0 1 = 61
+ 1 0 1 1 1 = 23

1 0 1 0 1 0 0 = 84

≥ (2)10

Digital Logic Design Ch1-12

 Binary Subtraction
 Borrow a “Base” when needed

1 2 = (10)2
0 2 2 0 0 2
1 0 0 1 1 0 1 = 77
− 1 0 1 1 1 = 23

0 1 1 0 1 1 0 = 54

Digital Logic Design Ch1-13

 Binary Multiplication
 Bit by bit

1 0 1 1 1
x 1 0 1 0
0 0 0 0 0
1 0 1 1 1
0 0 0 0 0
1 0 1 1 1

1 1 1 0 0 1 1 0

Digital Logic Design Ch1-14

Number Base Conversions
Evaluate
Magnitude
Octal
(Base 8)

Evaluate
Magnitude
Decimal Binary
(Base 10) (Base 2)

Hexadecimal
(Base 16)
Evaluate
Magnitude
Digital Logic Design Ch1-15
 Decimal (Integer) to Binary
Conversion
 Divide the number by the ‘Base’ (=2)
 Take the remainder (either 0 or 1) as a coefficient
 Take the quotient and repeat the division

Example: (13)10
Quotient Remainder Coefficient
13/ 2 = 6 1 a0 = 1
6 /2= 3 0 a1 = 0
3 /2= 1 1 a2 = 1
1 /2= 0 1 a3 = 1
Answer: (13)10 = (a3 a2 a1 a0)2 = (1101)2

MSB LSB
Digital Logic Design Ch1-16
 Decimal (Fraction) to Binary
Conversion
 Multiply the number by the ‘Base’ (=2)
 Take the integer (either 0 or 1) as a coefficient
 Take the resultant fraction and repeat the division

Example: (0.625)10
Integer Fraction Coefficient
0.625 * 2 = 1 . 25 a-1 = 1
0.25 * 2 = 0 . 5 a-2 = 0
0.5 *2= 1 . 0 a-3 = 1
Answer: (0.625)10 = (0.a-1 a-2 a-3)2 = (0.101)2

MSB LSB

Digital Logic Design Ch1-17

 Decimal to Octal Conversion
Example: (175)10
Quotient Remainder Coefficient
175 / 8 = 21 7 a0 = 7
21 / 8 = 2 5 a1 = 5
2 /8= 0 2 a2 = 2
Answer: (175)10 = (a2 a1 a0)8 = (257)8

Example: (0.3125)10
Integer Fraction Coefficient
0.3125 * 8 = 2 . 5 a-1 = 2
0.5 *8= 4 . 0 a-2 = 4
Answer: (0.3125)10 = (0.a-1 a-2 a-3)8 = (0.24)8

Digital Logic Design Ch1-18

 Binary − Octal Conversion
 8 = 23 Octal Binary

 Each group of 3 bits represents an octal 0 000

digit 1 001
2 010
Assume Zeros
Example: 3 011

( 1 0 1 1 0 . 0 1 )2 4 100
5 101
6 110
( 2 6 . 2 )8 7 111

Works both ways (Binary to Octal & Octal to Binary)

Digital Logic Design Ch1-19
 Binary − Hexadecimal Conversion
Hex Binary
 16 = 24 0 0000
1 0001
 Each group of 4 bits represents a
2 0010
hexadecimal digit 3 0011
4 0100
5 0101
Assume Zeros 6 0110
Example: 7 0111
8 1000
( 1 0 1 1 0 . 0 1 )2 9 1001
A 1010
B 1011
C 1100
D 1101
(1 6 . 4 )16 E 1110
F 1111

Works both ways (Binary to Hex & Hex to Binary)

Digital Logic Design Ch1-20
 Octal − Hexadecimal Conversion
 Convert to Binary as an intermediate step

Example:
( 2 6 . 2 )8

Assume Zeros Assume Zeros

( 0 1 0 1 1 0 . 0 1 0 )2

(1 6 . 4 )16

Works both ways (Octal to Hex & Hex to Octal)

Digital Logic Design Ch1-21
Decimal, Binary, Octal and
Hexadecimal
Decimal Binary Octal Hex
00 0000 00 0
01 0001 01 1
02 0010 02 2
03 0011 03 3
04 0100 04 4
05 0101 05 5
06 0110 06 6
07 0111 07 7
08 1000 10 8
09 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F

Digital Logic Design Ch1-22

 1.6 Signed Binary Numbers
 To represent negative integers, we need a notation for negative
values.
 It is customary to represent the sign with a bit placed in the leftmost
position of the number since binary digits.
 The convention is to make the sign bit 0 for positive and 1 for
negative.
 Example:

 Table 1.3 lists all possible four-bit signed binary numbers in the
three representations.
Digital Logic Design Ch1-23
Signed Binary Numbers

Digital Logic Design Ch1-24

 1.7 Binary Codes
 BCD Code
 A number with k decimal digits will
require 4k bits in BCD.
 Decimal 396 is represented in BCD
with 12bits as 0011 1001 0110, with
each group of 4 bits representing one
decimal digit.
 A decimal number in BCD is the
same as its equivalent binary number
only when the number is between 0
and 9.
 The binary combinations 1010
through 1111 are not used and have
no meaning in BCD.

Digital Logic Design Ch1-25

 Binary Code
 Example:
 Consider decimal 185 and its corresponding value in BCD and binary:

 BCD addition

Digital Logic Design Ch1-26

 Binary Codes
 American Standard Code for Information Interchange (ASCII) Character Code

Digital Logic Design Ch1-27

 Binary Codes
 ASCII Character Code

Digital Logic Design Ch1-28

 ASCII Character Codes
 American Standard Code for Information Interchange (Refer to
Table 1.7)
 A popular code used to represent information sent as character-
based data.
 It uses 7-bits to represent:
 94 Graphic printing characters.
 34 Non-printing characters.
 Some non-printing characters are used for text format (e.g. BS =
Backspace, CR = carriage return).
 Other non-printing characters are used for record marking and
flow control (e.g. STX and ETX start and end text areas).

Digital Logic Design Ch1-29

 ASCII Properties
 ASCII has some interesting properties:
 Digits 0 to 9 span Hexadecimal values 3016 to 3916
 Upper case A-Z span 4116 to 5A16
 Lower case a-z span 6116 to 7A16
» Lower to upper case translation (and vice versa) occurs by flipping bit 6.

Digital Logic Design Ch1-30

 Binary Codes
 Error-Detecting Code
 To detect errors in data communication and processing, an eighth bit is
sometimes added to the ASCII character to indicate its parity.
 A parity bit is an extra bit included with a message to make the total
number of 1's either even or odd.
 Example:
 Consider the following two characters and their even and odd parity:

Digital Logic Design Ch1-31

 Binary Codes
 Error-Detecting Code
 Redundancy (e.g. extra information), in the form of extra bits, can be
incorporated into binary code words to detect and correct errors.
 A simple form of redundancy is parity, an extra bit appended onto the
code word to make the number of 1’s odd or even. Parity can detect all
single-bit errors and some multiple-bit errors.
 A code word has even parity if the number of 1’s in the code word is even.
 A code word has odd parity if the number of 1’s in the code word is odd.
 Example:

Message A: 100010011 (even parity)

Message B: 10001001 0 (odd parity)

Digital Logic Design Ch1-32

 1.8 Binary Storage and Registers
 Registers
 A binary cell is a device that possesses two stable states and is capable of storing
one of the two states.
 A register is a group of binary cells. A register with n cells can store any discrete
quantity of information that contains n bits.

n cells 2n possible states

 A binary cell
 Two stable state
 Store one bit of information
 Examples: flip-flop circuits, ferrite cores, capacitor
 A register
 A group of binary cells
 AX in x86 CPU
 Register Transfer
 A transfer of the information stored in one register to another.
 One of the major operations in digital system.
 An example in next slides.
Digital Logic Design Ch1-33
 A Digital Computer Example

Memory

Control
CPU unit Datapath

Inputs: Keyboard, Outputs: CRT,

mouse, modem, LCD, modem,
Input/Output
microphone speakers

Synchronous or
Asynchronous?
Digital Logic Design Ch1-34
Transfer of information

Figure 1.1 Transfer of information among register Digital Logic Design Ch1-35
 Transfer of information
 The other major component
of a digital system
 Circuit elements to
manipulate individual bits of
information
 Load-store machine
LD R1;
LD R2;
ADD R3, R2,
R1;
SD R3;

Figure 1.2 Example of binary information processing Digital Logic Design Ch1-36
 1.9 Binary Logic
 Definition of Binary Logic
 Binary logic consists of binary variables and a set of logical operations.
 The variables are designated by letters of the alphabet, such as A, B, C, x, y, z, etc,
with each variable having two and only two distinct possible values: 1 and 0,
 Three basic logical operations: AND, OR, and NOT.

Digital Logic Design Ch1-37

 Binary Logic
 Truth Tables, Boolean Expressions, and Logic Gates

AND OR NOT
x y z x y z x z
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1

z=x•y=xy z=x+y z = x = x’

x x x
y z y z z
Digital Logic Design Ch1-38
 Switching Circuits

AND OR

Digital Logic Design Ch1-39

 Binary Logic
 Logic gates
 Example of binary signals

3
Logic 1
2
Un-define
1
Logic 0
0

Figure 1.3 Example of binary signals Digital Logic Design Ch1-40

 Binary Logic
 Logic gates
 Graphic Symbols and Input-Output Signals for Logic gates:

Fig. 1.4 Symbols for digital logic circuits

Fig. 1.5 Input-Output signals for gates Digital Logic Design Ch1-41
 Binary Logic
 Logic gates
 Graphic Symbols and Input-Output Signals for Logic gates:

Fig. 1.6 Gates with multiple inputs

Digital Logic Design Ch1-42