w7 ARM Flow Control
w7 ARM Flow Control
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Overview
If-then-else
While loop
For loop
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Three Control Structures
Selection Structure
If-then-else
Loop Structure
while loop
for loop
Negative bit
N = 1 if most significant bit of result is 1
Zero bit
Z = 1 if all bits of result are 0
Carry bit
For unsigned addition, C = 1 if carry takes place
For unsigned subtraction, C = 0 (carry = not borrow) if borrow takes
place
For shift/rotation, C = last bit shifted out
oVerflow bit
V = 1 if adding 2 same-signed numbers produces a result with the
opposite sign
Positive + Positive = Negative, or
Negative + negative = Positive
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Non-arithmetic operations does not touch V bit, such as
Updating Condition Flags
Method 1: append with “S”
ADD r0,r1,r2 → ADDS r0,r1,r2
SUB r0,r1,r2 → SUBS r0, r1, r2
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Comparison Instructions
Instructi Brief
Operands Flags
on description
CMP Rn, Op2 Compare N,Z,C,V
Compare
CMN Rn, Op2 N,Z,C,V
Negative
TEQ Rn, Op2 Test Equivalence N,Z,C
The only effect of the comparisons is to update the
TST Rn, Op2 Test N,Z,C
condition flags.
• No need to set S bit.
• No need to specify Rd.
Operations are:
• CMP operand1 - operand2, but result not written
• CMN operand1 + operand2, but result not written
• TST operand1 & operand2, but result not written
• TEQ operand1 ^ operand2, but result not written
Examples:
• CMP r0, r1
• TST r2, #5
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CMP and CMN
CMP{cond} Rn, Operand2
CMN{cond} Rn, Operand2
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Updating Condition Flags:
CMP and CMN
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Example of CMP
𝑓 ( 𝑥 ) =¿ 𝑥∨¿
Area absolute, CODE, READONLY
EXPORT __main
ENTRY
__main PROC
CMP r1, #0
RSBLT r0, r1, #0
ENDP
END
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Unconditional Branch Instructions
Instructi Operand
Brief description
on s
B label Branch
BL label Branch with Link
BLX Rm Branch indirect with Link
BX Rm Branch indirect
B label
cause a branch to label.
BL label
copy the address of the next instruction into r14 (lr, the link register), and
cause a branch to label.
BX Rm
branch to the address held in Rm
BLX Rm:
copy the address of the next instruction into r14 (lr, the link register) and
branch to the address held in Rm
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Unconditional Branch Instructions:
A Simple Example
MOVS r1, #1
B target ; Branch to target
MOVS r2, #2 ; Not executed
MOVS r3, #3 ; Not executed
MOVS r4, #4 ; Not executed
target MOVS r5, #5
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Branch With Link
The "Branch with link (BL)" instruction
implements a subroutine call by writing PC-
4 into the LR of the current bank.
i.e. the address of the next instruction following
the branch with link (allowing for the pipeline).
To return from subroutine, simply need to
restore the PC from the LR:
MOV pc, lr
Again, pipeline has to refill before execution
continues.
The "Branch" instruction does not affect
LR.
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Condition Codes
Suffix Description Flags tested
EQ EQual
NE Not Equal
CS/HS Unsigned Higher or Same
CC/LO Unsigned LOwer
MI MInus (Negative)
PL PLus (Positive or Zero)
VS oVerflow Set
VC oVerflow Clear
HI Unsigned HIgher
LS Unsigned Lower or Same
GE Signed Greater or Equal
LT Signed Less Than
GT Signed Greater Than
LE Signed Less than or Equal
AL ALways
Note AL is the default and does not need to be specified
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Condition Codes
The possible condition codes are listed below:
Suffix Description Flags tested
EQ EQual Z=1
NE Not Equal Z=0
CS/HS Unsigned Higher or Same C=1
CC/LO Unsigned LOwer C=0
MI MInus (Negative) N=1
PL PLus (Positive or Zero) N=0
VS oVerflow Set V=1
VC oVerflow Clear V=0
HI Unsigned HIgher C=1 & Z=0
LS Unsigned Lower or Same C=0 or Z=1
GE Signed Greater or Equal N=V
LT Signed Less Than N!=V
GT Signed Greater Than Z=0 & N=V
LE Signed Less than or Equal Z=1 or N!=V
AL ALways
Note AL is the default and does not need to be specified
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Signed Greater or Equal ( N == V)
CMP r0, r1
We in fact perform subtraction r0 – r1, without saving the result.
N = 0 N = 1
V = 0 • No overflow, implying the • No overflow, implying the
result is correct. result is correct.
• The result is non-negative, • The result is negative.
• Thus r0 – r1 ≥ 0, i.e., r0 ≥ r1 • Thus r0 – r1 < 0, i.e., r0 < r1
V = 0 r0 ≥ r1 r0 < r1
V = 1 r0 < r1 r0 ≥ r1
Conclusions:
• If N == V, then it is signed greater or equal (GE).
• Otherwise, it is signed less than (LT)
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Signed Greater or Equal (N == V)
CMP r0, r1
perform subtraction r0 – r1, without saving the result
N = 0 N = 1
V = 0 1 0
V = 1 0 1
Conclusions:
• If N == V, then it is signed greater or equal (GE).
• Otherwise, it is signed less than (LT)
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Signed vs. Unsigned Comparison
Conditional codes applied
to branch instructions
Compare Signed Unsigned Compare Signed Unsigned
> GT HI > BGT BHI
≥ GE HS >= BGE BHS
< LT LO < BLT BLO
≤ LE LS <= BLE BLS
== EQ == BEQ
≠ NE != BNE
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Signed vs. Unsigned
Conditional codes applied to branch instructions
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Branch Instructions
Instruction Description Flags tested
Unconditio B label Branch to label
nal Branch
BEQ label Branch if EQual Z = 1
BNE label Branch if Not Equal Z = 0
BCS/BHS label Branch if unsigned Higher or C = 1
Same
BCC/BLO label Branch if unsigned LOwer C = 0
BMI label Branch if MInus (Negative) N = 1
BPL label Branch if PLus (Positive or N = 0
Zero)
BVS label Branch if oVerflow Set V = 1
Conditional
Branch BVC label Branch if oVerflow Clear V = 0
BHI label Branch if unsigned HIgher C = 1 & Z = 0
BLS label Branch if unsigned Lower or C = 0 or Z = 1
Same
BGE label Branch if signed Greater or N = V
Equal
BLT label Branch if signed Less Than N != V
21 BGT label Branch if signed Greater Than Z = 0 & N = V
BLE label Branch if signed Less than or Z = 1 or N = !
Number Interpretation
Which is greater?
0xFFFFFFFF or 0x00000001
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Which is Greater: 0xFFFFFFFF or
0x00000001?
software’s responsibility to tell computer how to interpret data:
written in C, declare the signed vs unsigned variable
written in Assembly, use signed vs unsigned branch instructions
signed int x, y ; MOVS r6,
x = -1; #0xFFFFFFFF
y = 1; MOVS r5,
if (x > y) #0x00000001
... CMP r5, r6
BLE: Branch if less thanBLE Then_Clause
or equal, signed ≤
...
unsigned int x, MOVS r6,
y ; #0xFFFFFFFF
x = 4294967295; MOVS r5,
y = 1; #0x00000001
if (x > y) CMP r5, r6
BLS unsigned
... BLS: Branch if lower or same, Then_Clause
≤
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If-then Statement
C Program
if (a < 0 ) {
a = 0 – a;
}
x = x + 1;
Implementation 1:
; r1 = a, r2 = x
CMP r1, #0 ; Compare a with 0
BGE endif ; Go to endif if a
≥ 0
then RSB r1, r1, #0 ; a = - a
endif ADD r2, r2, #1 ; x = x + 1
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If-then Statement
C Program
if (a < 0 ) {
a = 0 – a;
}
x = x + 1;
Implementation 2:
; r1 = a, r2 = x
CMP r1, #0 ; Compare a with 0
RSBLT r1, r1, #0 ; a = 0 - a if a <
0
ADD r2, r2, #1 ; x = x + 1
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Compound Boolean Expression
x > 20 && x < 25
x == 20 || x == 25
!(x == 20 || x == 25)
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If-then-else
C Program
if (a ==
1)
b = 3;
else
b = 4;
; r1 = a, r2 = b
CMP r1, #1 ; compare a and 1
BNE else ; go to else if a ≠
1
then MOV r2, #3 ; b = 3
B endif ; go to endif
else MOV r2, #4 ; b = 4
endif
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For Loop
C Program
int i;
int sum = 0;
for(i = 0; i < 10; i+
+){
sum += i;
}
Implementation 1:
MOV r0, #0 ; i
MOV r1, #0 ; sum
B check
loop ADD r1, r1, r0
ADD r0, r0, #1
check CMP r0, #10
BLT loop
28 endloop
For Loop
C Program
int i;
int sum = 0;
for(i = 0; i < 10; i+
+){
sum += i;
}
Implementation 2:
MOV r0, #0 ; i
MOV r1, #0 ; sum
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
Overflow flag
Carry/Borrow flag
Zero flag
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Combined Program Status Registers
(xPSR)
Application PSR Reserved
(APSR)
N Z C V Q
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Conditional Execution
a ⟶ r0
y ⟶ r1
CMP r0, #1
if (a==1 || a==7 || a==11)
CMPNE r0, #7 ; executed if r0 !
y = 1;
= 1
else
CMPNE r0, #11 ; executed if r0 !
y = -1;
= 7
MOVEQ r1, #1
MOVNE r1, #-1
NE: Not Equal
EQ: Equal
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Compound Boolean Expression
C Program Assembly Program
// x is a signed ; r0 = x, r1 = a
integer CMP r0, #20 ; compare x and 20
if(x <= 20 || x >= 25) MOVLE r1, #1 ; a=1 if less or
{ equal
a = 1; CMP r0, #25 ; CMP if greater than
} MOVGE r1, #1 ; a=1 if greater or
equal
CMP r1, #20 endif
BLE islem
CMP r1, #25
BLO son
islem
MOV r2, #1
son
end1 B end1
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Example 1: Greatest Common Divider
(GCD)
Euclid’s Algorithm
uint32_t a, b;
while (a != b ) { gcd CMP r0, r1
if (a > b) SUBHI r0, r0, r1
a = a – b; SUBLO r1, r1, r0
else BNE gcd
b = b – a;
}
; suppose r0 = a and r1 = b
gcd CMP r0, r1 ; a >
b?
BEQ end ; if a = b,
done
BLO less ; a < b
SUB r0, r0, r1 ; a = a – b
B gcd
less SUB r1, r1, r0 ; b = b – a
B gcd
end
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Example 2
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Combination
Instructi Fla
Operands Brief description
on gs
CBZ Rn, label Compare and Branch if Zero -
Compare and Branch if Non
CBNZ Rn, label -
Zero
Except that it does not change the condition code flags, CBZ
Rn, label is equivalent to:
CMP Rn, #0
BEQ label
Except that it does not change the condition code flags,
CBNZ Rn, label is equivalent to:
CMP Rn, #0
BNE label
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Break and Continue
Output: ?? Output: ??
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Break and Continue
Output: 0, 1, Output: 0, 1, 3, 4
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Break and Continue
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Branch Instructions
Instructio Flag
Operands Brief description
n s
B label Branch -
BL label Branch with Link -
BLX Rm Branch indirect with Link -
BX Rm Branch indirect -
B label: causes a branch to label.
BL label: instruction copies the address of the next
instruction into r14 (lr, the link register), and causes a
branch to label.
BX Rm: branch to the address held in Rm
BLX Rm: copies the address of the next instruction into r14
(lr, the link register) and branch to the address held in Rm
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Reference:
Embedded Systems with ARM Cortex-
M Microcontrollers in Assembly
Language and C 3rd
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