![1
Mathematical Modelling of Semiconductor
Devices and circuits: A Review
Sanjay Kumar Roy1
, Manwinder Singh2
, Kamal Kumar Sharma3
, Brahmadeo Prasad Singh
1
Ph.D. Scholar, Head (Power Distribution), OMQ Division, TATASTEEL Ltd.
2
Assoc Professor, Electronics and Communication Engineering, Lovely Professional University,
Phagwara, Punjab, (India)
3
Professor, Electronics and Communication Engineering, Lovely Professional University,
Phagwara, Punjab, (India)
4
Professor Adjunct, Netaji Subhas University of Technology, New Delhi (India)
Abstract:
The objective of the article is to prepare a lucid mathematical model of circuits containing semiconductor devices
(MOSFET & BJT) to analyse the circuits with much of ease. The mathematical modelling, using partitioning method of
matrix, can be used to analyse the complicated circuits of amplifiers.
Key Words: Mathematical Modelling, BJT, MOSFET, Op amp, Floating Admittance Matrix.
1. Introduction:
Mathematical modelling should form the basis of any educational system, especially, the engineering
education, because it indicates the proper place with suitable tools to achieve the desired result for a
set of given input variables. Thus, it plays very big role in the engineering education considering the
views of all stake holders to improve the quality of the outcome. It is needless to say that stake holders
are students, guardians, faculty positions, management groups, and very importantly; the industrialist
as employers and others. These variables are properly set in the mathematical model to achieve the
desired outcome. If the desired result is not achieved, a relook in the mathematical modelling with fine
tuning of increasing or decreasing any one or more variables, is done to achieve the set goal. Thus, the
variables of mathematical modelling should be tuned such that the set goal should be achieved very
easily and neatly.
There are numerous methods of mathematical modelling available in the literature based on
equivalent circuit approach [1-9]. Chirlian [1] suggested very general approach; wherein any three
terminal devices can fit in it. Mitra [5], Gray [7], and Millman [3,9] have provided more particular
equivalent circuit approaches for BJTs and MOSFETs. One has to select the proper mathematical
modelling scheme in a given constraint to achieve the best result with ease. As an instance, the transfer
function of linear, time-invariant, differential equation system is best suited for the Laplace transform
method. The nullor [10-11] and admittance matrix [12] methods have been used in the symbolic form
extensively in the past. We have suggested an elegant mathematical modelling approach for both active
devices and passive circuits and components, called the floating admittance matrix model. As the word
spelt floating, it does not have any reference terminal in the analysis and design of any circuit whether
active or passive or mixed of the active devices and passive components. The floating admittance
matrix (FAM) model has been developed for the BJT or MOSFET to demonstrate the beauty of the
method over other conventional techniques. The outcome of the developed mathematical models has
been tested on any amplifier configuration that corroborates the result obtained in the available
literature and over rides in the simplicity.
The floating admittance matrix model presented here is so simple that even a pure
mathematician without the knowledge of electronic devices, can work and analyse all transfer
functions of any circuits, provided the parameters of devices are known to him. The analysis and design
of any circuit using floating admittance matrix model is based on pure mathematical maneuvering of
matrices. The transfer functions are expressed as ratio of minors with proper signs, called cofactors of
first and or second order. The mathematical modelling using FAM approach provides a leverage to the
designer to adjust their style of design comfortably.
The conventional approach to mathematical model of the actives devices such as BJT and
FET/MOSFET [1-9] uses its equivalent circuit as per the requirement of (a) either large signal or small
signal models, (b) low frequency or high frequency modes so and so forth. For cascaded or cascoded
connections of many devices (BJTs and MOSFETs) or the combinations of both BJTs and MOSFETs,
in any circuit, the conventional method of equivalent circuit approach becomes very cumbersome. All](https://image.slidesharecdn.com/easychair-preprint-2954-200406121504/85/Easy-chair-preprint-2954-2-320.jpg)
![2
types of transfers functions such as voltage gain, current gain, input resistance (impedance), output
resistance (impedance), and power gains of any complicated circuit are obtained very easily based on
the matrix partitioning method using the floating admittance matrix approach. This FAM technique
very well satisfies the superposition theorem. The computer can very well be used for complicated
networks, because the method uses only cofactors of the developed FAM.
The analysis becomes lucid and corroborates the transfer functions obtained in literatures.
These transfer functions depend only on the cofactors of the FAM of any circuit; active and or passive
or a combination of both. The outstanding merit of the floating admittance matrix is that it can be
written by inspection for simple circuits.
2. Concept of nullor:
The circuit symbols of the active devices ‘nullator’ and ‘norator’ [5] are shown in Fig. 1. It is evident
from Fig. 1 that the nullator [10-11] is a two-pole network with no current and voltage, whereas norator
is also a two-pole network without any restriction on its voltage and current.
The nullor is an active two port network consisting of nullator and norator. The circuit symbol
of the nullor in the most basic form is depicted in Fig. 2. Thus, the nullator is connected as the input
port of the nullor whereas the norator forms its output port.
Fig. 1 Symbolic form of nullator and norator
Fig. 2 Two port symbol of nullor
Fig. 3 shows the approximate equivalent of ideal active devices such as BJT, MOSFET, and
Op amp in the form of nullor. The use of the symbolic form of nullor is almost extinct from the analysis
of active network in the current scenario. The use of symbolic form of BJT, MOSFET, and Op amp in
place of the nullor, as per the circuit requirement, is the current trends in the circuit analysis.
Fig. 3 practical symbols nullor
Replacing each of the non-ideal Op amp or transistor as finite gain voltage controlled current
source (VCCS) is tantamount of task. This is possible only in the case, when the active element falls
in the category of the metal oxide field effect transistor (MOSFET) or a transconductance Op amp. On
the contrary, when an active device is supposed to function as voltage control voltage source (VCVS),
or current controlled current source (CCCS), or a transresistance type of device, then Op amp and BJT
are particularly suitable active devices.](https://image.slidesharecdn.com/easychair-preprint-2954-200406121504/85/Easy-chair-preprint-2954-3-320.jpg)
![3
The nullor based analysis and synthesis use ideal Op amp and BJT/ MOSFET as the dependent
source and impedance (resistor) converter. The scaling technique of the elements of a matrix and its
movement within itself is permissible provided the port equivalence is maintained.
The single four-terminal floating nullor in the form of a current conveyer can realize a single
resistor controlled sinusoidal oscillator [12]. The frequency of oscillation and the condition of
oscillation are independently controlled by separate resistors. The major advantage of this oscillator
lies in the use of only one four terminals floating nullor in contrast to the others using more numbers
of four terminal floating nullor. The model permits topological method of solution of the network.
A network analysis problem can be solved unequivocally [11], if an unambiguous relationship
can be established between currents and voltages of the two-poles forming the network. The nullator,
in turn, represents two restrictions, namely, the insertion of a nullator into a real circuit makes the
analysis problem redundant and the number of the possible independent Kirchhoff equations is being
increased by one; while the number of relationships of voltages and currents are increased by two. The
insertion of a narrator into the circuit adds another independent Kirchhoff equation leaving the number
of restrictions for voltages and currents unchanged. Accordingly, the insertion of a narrator makes the
problem indefinite. For an equal number of inserted nullators and narrators, the network calculation
problem can be solved.
Though a number of circuits are available in the literature for capacitance multiplier, but the
scheme presented [14] uses only one differential ideal Op amp to realize the frequency dependent
resistance in the form of capacitance multiplier. The scheme facilitates the on-demand realization of
both negative as well as positive values of resistances. The value of realized capacitance is proportional
to the gain of the Op amp. Higher the value of gain of the Op amp, higher will be the capacitance
multiplication factor.
The ideal transistor and the ideal Op amp represent an active nullor as the small signal circuit
element. For the gain of the nullor tending towards infinity, results into dependent source of any of the
four possible types i.e. voltage-controlled current-source, current-controlled voltage-source, voltage-
controlled voltage-source, and current-controlled current-source. The input admittance and output
impedance for a VCVS should strictly be zero.
The book [15] stresses fundamental theory of circuit analysis for professional applications with
the reinforcement by using frequent examples. The book defines and demonstrate the schematic
symbol and corresponding notation of (a) resistors, (b) capacitors, (c) inductors, (d) voltage sources,
and (e) current sources etc. very well. The circuit schematic symbols for (a) voltage-controlled voltage-
source (VCVS), (b) current-controlled voltage-source (CCVS), (c) voltage-controlled current-source
(VCCS), and (d) current-controlled current-source (CCCS) are also available along with many
examples in the book. The circuit symbol for a voltage mode operational amplifier, first-order linear
model of the Op amp, a voltage amplifier as the gain element, equivalent circuit of the voltage amplifier
are available [15] as symbolic models.
Any value of input and output resistances (impedances) of both positive and negative
magnitude can be realized, has been demonstrated[14].
3. Concept of floating admittance
A very simple circuit of an admittance Y connected between two voltage sources V1 and V2 is shown
in Fig. 4 without any reference point.
Fig. 4 Series connected Y
These floating terminal voltages V1 and V2 results in the currents I1 and I2. The relationships
between current I1 and I2 and voltages V1 and V2 are expressed in the 2x2 matrix form as;
[
I1
I2
] = [
𝑌
−𝑌
−𝑌
𝑌
] [
V1
V2
] (1)
The coefficient matrix in Eq. (1), is called the floating admittance matrix. To have better sense
of floating admittance matrix method of modelling [13-14, 16-20], let us have a practical circuit called](https://image.slidesharecdn.com/easychair-preprint-2954-200406121504/85/Easy-chair-preprint-2954-4-320.jpg)
![4
bridge-T attenuation [21]. The bridge-T attenuator is very versatile circuit used in communication
network as shown in Fig. 5.
The coefficient floating admittance matrix of Fig. 5 can be written by inspection very easily by
inspection in the form of 4x4 matrix as;
[
1
𝐺1 + 𝐺3
−𝐺1
−𝐺3
0
2
−𝐺1
2𝐺1 + 𝐺2
−𝐺1
−𝐺2
3
−𝐺3
−𝐺1
𝐺1 + 𝐺3 + 𝐺0
−𝐺0
4
0
−𝐺2
−𝐺0
𝐺2 + 𝐺0
0
1
2
3
4]
(2)
Fig. 5 Bridge-T passive attenuator
The input resistance [13, 16-18] of the bridge-T between its terminals 1 & 4 in Fig. 5 is expressed as;
𝑅𝑖𝑛 = 𝑅𝑖(14) =
|𝑌14
14|
|𝑌4
4|
𝑔 𝑠=0
(3)
|𝑌14
14| = (2𝐺1 + 𝐺2)(𝐺1 + 𝐺3 + 𝐺0) − 𝐺1
2
For 𝐺1
2
= 𝐺0
2
= 𝐺2 𝐺3
|𝑌14
14| =
2𝐺0
𝐺2
(𝐺0
2
+ 2𝐺0 𝐺2 + 𝐺2
2) =
2𝐺0
𝐺2
(𝐺0 + 𝐺2)2
|𝑌4
4| =
2𝐺0
2
𝐺2
(𝐺0 + 𝐺2)2
𝑅𝑖𝑛 = 𝑅𝑖(14) =
2𝐺0
𝐺2
(𝐺0+𝐺2)2
2𝐺0
2
𝐺2
(𝐺0+𝐺2)2
= 𝑅0 (4)
Equation (4) indicates that the input and output ports of Fig. 5 are matched under the condition
𝐺1
2
= 𝐺0
2
= 𝐺2 𝐺3.
The voltage transfer function between terminals 3 and 4 and 1 and 4 of the bridge-T network in
Fig. 5 is expressed as;
𝐴 𝑣|14
34
= 𝑠𝑔𝑛(3 − 4)𝑠𝑔𝑛(1 − 4)(−1)12 |𝑌34
14|
|𝑌14
14|
=
|𝑌34
14|
|𝑌14
14|
(5)
|𝑌34
14| =
2𝐺0
2
𝐺2
(𝐺0 + 𝐺2)
𝐴 𝑣|14
34
=
𝑣34
𝑣14
=
2𝐺0
2
𝐺2
(𝐺0+𝐺2)
2𝐺0
𝐺2
(𝐺0+𝐺2)2
=
𝐺0
𝐺0+𝐺2
=
𝑅2
𝑅2+𝑅0
(6)
The propagation constant (N) [21] of the bridge-T network in Fig. 5 is described as;
𝑒 𝛾
=
𝑣14
𝑣34
= 1 +
𝑅0
𝑅2
= 𝑁,
𝑅0
𝑅2
= 𝑁 − 1 (7)
𝑅2 =
𝑅0
𝑁−1
, 𝑅3 =
𝑅0
2
𝑅2
= (𝑁 − 1)𝑅0, 𝑅2 = 𝑅0 (8)
For a given value of propagation constant (N) and the normal value of characteristic impedance
(𝑅0 = 600 ), the other components of the bridge-T attenuator can be designed very easily using FAM
approach.](https://image.slidesharecdn.com/easychair-preprint-2954-200406121504/85/Easy-chair-preprint-2954-5-320.jpg)
Easy chair preprint-2954
- 1. EasyChair Preprint № 2954 Mathematical Modelling of Semiconductor Devices and Circuits: A Review Sanjay Kumar Roy, Manwinder Singh, Kamal Kumar Sharma and Brahmadeo Prasad Singh EasyChair preprints are intended for rapid dissemination of research results and are integrated with the rest of EasyChair. March 14, 2020
- 2. 1 Mathematical Modelling of Semiconductor Devices and circuits: A Review Sanjay Kumar Roy1 , Manwinder Singh2 , Kamal Kumar Sharma3 , Brahmadeo Prasad Singh 1 Ph.D. Scholar, Head (Power Distribution), OMQ Division, TATASTEEL Ltd. 2 Assoc Professor, Electronics and Communication Engineering, Lovely Professional University, Phagwara, Punjab, (India) 3 Professor, Electronics and Communication Engineering, Lovely Professional University, Phagwara, Punjab, (India) 4 Professor Adjunct, Netaji Subhas University of Technology, New Delhi (India) Abstract: The objective of the article is to prepare a lucid mathematical model of circuits containing semiconductor devices (MOSFET & BJT) to analyse the circuits with much of ease. The mathematical modelling, using partitioning method of matrix, can be used to analyse the complicated circuits of amplifiers. Key Words: Mathematical Modelling, BJT, MOSFET, Op amp, Floating Admittance Matrix. 1. Introduction: Mathematical modelling should form the basis of any educational system, especially, the engineering education, because it indicates the proper place with suitable tools to achieve the desired result for a set of given input variables. Thus, it plays very big role in the engineering education considering the views of all stake holders to improve the quality of the outcome. It is needless to say that stake holders are students, guardians, faculty positions, management groups, and very importantly; the industrialist as employers and others. These variables are properly set in the mathematical model to achieve the desired outcome. If the desired result is not achieved, a relook in the mathematical modelling with fine tuning of increasing or decreasing any one or more variables, is done to achieve the set goal. Thus, the variables of mathematical modelling should be tuned such that the set goal should be achieved very easily and neatly. There are numerous methods of mathematical modelling available in the literature based on equivalent circuit approach [1-9]. Chirlian [1] suggested very general approach; wherein any three terminal devices can fit in it. Mitra [5], Gray [7], and Millman [3,9] have provided more particular equivalent circuit approaches for BJTs and MOSFETs. One has to select the proper mathematical modelling scheme in a given constraint to achieve the best result with ease. As an instance, the transfer function of linear, time-invariant, differential equation system is best suited for the Laplace transform method. The nullor [10-11] and admittance matrix [12] methods have been used in the symbolic form extensively in the past. We have suggested an elegant mathematical modelling approach for both active devices and passive circuits and components, called the floating admittance matrix model. As the word spelt floating, it does not have any reference terminal in the analysis and design of any circuit whether active or passive or mixed of the active devices and passive components. The floating admittance matrix (FAM) model has been developed for the BJT or MOSFET to demonstrate the beauty of the method over other conventional techniques. The outcome of the developed mathematical models has been tested on any amplifier configuration that corroborates the result obtained in the available literature and over rides in the simplicity. The floating admittance matrix model presented here is so simple that even a pure mathematician without the knowledge of electronic devices, can work and analyse all transfer functions of any circuits, provided the parameters of devices are known to him. The analysis and design of any circuit using floating admittance matrix model is based on pure mathematical maneuvering of matrices. The transfer functions are expressed as ratio of minors with proper signs, called cofactors of first and or second order. The mathematical modelling using FAM approach provides a leverage to the designer to adjust their style of design comfortably. The conventional approach to mathematical model of the actives devices such as BJT and FET/MOSFET [1-9] uses its equivalent circuit as per the requirement of (a) either large signal or small signal models, (b) low frequency or high frequency modes so and so forth. For cascaded or cascoded connections of many devices (BJTs and MOSFETs) or the combinations of both BJTs and MOSFETs, in any circuit, the conventional method of equivalent circuit approach becomes very cumbersome. All
- 3. 2 types of transfers functions such as voltage gain, current gain, input resistance (impedance), output resistance (impedance), and power gains of any complicated circuit are obtained very easily based on the matrix partitioning method using the floating admittance matrix approach. This FAM technique very well satisfies the superposition theorem. The computer can very well be used for complicated networks, because the method uses only cofactors of the developed FAM. The analysis becomes lucid and corroborates the transfer functions obtained in literatures. These transfer functions depend only on the cofactors of the FAM of any circuit; active and or passive or a combination of both. The outstanding merit of the floating admittance matrix is that it can be written by inspection for simple circuits. 2. Concept of nullor: The circuit symbols of the active devices ‘nullator’ and ‘norator’ [5] are shown in Fig. 1. It is evident from Fig. 1 that the nullator [10-11] is a two-pole network with no current and voltage, whereas norator is also a two-pole network without any restriction on its voltage and current. The nullor is an active two port network consisting of nullator and norator. The circuit symbol of the nullor in the most basic form is depicted in Fig. 2. Thus, the nullator is connected as the input port of the nullor whereas the norator forms its output port. Fig. 1 Symbolic form of nullator and norator Fig. 2 Two port symbol of nullor Fig. 3 shows the approximate equivalent of ideal active devices such as BJT, MOSFET, and Op amp in the form of nullor. The use of the symbolic form of nullor is almost extinct from the analysis of active network in the current scenario. The use of symbolic form of BJT, MOSFET, and Op amp in place of the nullor, as per the circuit requirement, is the current trends in the circuit analysis. Fig. 3 practical symbols nullor Replacing each of the non-ideal Op amp or transistor as finite gain voltage controlled current source (VCCS) is tantamount of task. This is possible only in the case, when the active element falls in the category of the metal oxide field effect transistor (MOSFET) or a transconductance Op amp. On the contrary, when an active device is supposed to function as voltage control voltage source (VCVS), or current controlled current source (CCCS), or a transresistance type of device, then Op amp and BJT are particularly suitable active devices.
- 4. 3 The nullor based analysis and synthesis use ideal Op amp and BJT/ MOSFET as the dependent source and impedance (resistor) converter. The scaling technique of the elements of a matrix and its movement within itself is permissible provided the port equivalence is maintained. The single four-terminal floating nullor in the form of a current conveyer can realize a single resistor controlled sinusoidal oscillator [12]. The frequency of oscillation and the condition of oscillation are independently controlled by separate resistors. The major advantage of this oscillator lies in the use of only one four terminals floating nullor in contrast to the others using more numbers of four terminal floating nullor. The model permits topological method of solution of the network. A network analysis problem can be solved unequivocally [11], if an unambiguous relationship can be established between currents and voltages of the two-poles forming the network. The nullator, in turn, represents two restrictions, namely, the insertion of a nullator into a real circuit makes the analysis problem redundant and the number of the possible independent Kirchhoff equations is being increased by one; while the number of relationships of voltages and currents are increased by two. The insertion of a narrator into the circuit adds another independent Kirchhoff equation leaving the number of restrictions for voltages and currents unchanged. Accordingly, the insertion of a narrator makes the problem indefinite. For an equal number of inserted nullators and narrators, the network calculation problem can be solved. Though a number of circuits are available in the literature for capacitance multiplier, but the scheme presented [14] uses only one differential ideal Op amp to realize the frequency dependent resistance in the form of capacitance multiplier. The scheme facilitates the on-demand realization of both negative as well as positive values of resistances. The value of realized capacitance is proportional to the gain of the Op amp. Higher the value of gain of the Op amp, higher will be the capacitance multiplication factor. The ideal transistor and the ideal Op amp represent an active nullor as the small signal circuit element. For the gain of the nullor tending towards infinity, results into dependent source of any of the four possible types i.e. voltage-controlled current-source, current-controlled voltage-source, voltage- controlled voltage-source, and current-controlled current-source. The input admittance and output impedance for a VCVS should strictly be zero. The book [15] stresses fundamental theory of circuit analysis for professional applications with the reinforcement by using frequent examples. The book defines and demonstrate the schematic symbol and corresponding notation of (a) resistors, (b) capacitors, (c) inductors, (d) voltage sources, and (e) current sources etc. very well. The circuit schematic symbols for (a) voltage-controlled voltage- source (VCVS), (b) current-controlled voltage-source (CCVS), (c) voltage-controlled current-source (VCCS), and (d) current-controlled current-source (CCCS) are also available along with many examples in the book. The circuit symbol for a voltage mode operational amplifier, first-order linear model of the Op amp, a voltage amplifier as the gain element, equivalent circuit of the voltage amplifier are available [15] as symbolic models. Any value of input and output resistances (impedances) of both positive and negative magnitude can be realized, has been demonstrated[14]. 3. Concept of floating admittance A very simple circuit of an admittance Y connected between two voltage sources V1 and V2 is shown in Fig. 4 without any reference point. Fig. 4 Series connected Y These floating terminal voltages V1 and V2 results in the currents I1 and I2. The relationships between current I1 and I2 and voltages V1 and V2 are expressed in the 2x2 matrix form as; [ I1 I2 ] = [ 𝑌 −𝑌 −𝑌 𝑌 ] [ V1 V2 ] (1) The coefficient matrix in Eq. (1), is called the floating admittance matrix. To have better sense of floating admittance matrix method of modelling [13-14, 16-20], let us have a practical circuit called
- 5. 4 bridge-T attenuation [21]. The bridge-T attenuator is very versatile circuit used in communication network as shown in Fig. 5. The coefficient floating admittance matrix of Fig. 5 can be written by inspection very easily by inspection in the form of 4x4 matrix as; [ 1 𝐺1 + 𝐺3 −𝐺1 −𝐺3 0 2 −𝐺1 2𝐺1 + 𝐺2 −𝐺1 −𝐺2 3 −𝐺3 −𝐺1 𝐺1 + 𝐺3 + 𝐺0 −𝐺0 4 0 −𝐺2 −𝐺0 𝐺2 + 𝐺0 0 1 2 3 4] (2) Fig. 5 Bridge-T passive attenuator The input resistance [13, 16-18] of the bridge-T between its terminals 1 & 4 in Fig. 5 is expressed as; 𝑅𝑖𝑛 = 𝑅𝑖(14) = |𝑌14 14| |𝑌4 4| 𝑔 𝑠=0 (3) |𝑌14 14| = (2𝐺1 + 𝐺2)(𝐺1 + 𝐺3 + 𝐺0) − 𝐺1 2 For 𝐺1 2 = 𝐺0 2 = 𝐺2 𝐺3 |𝑌14 14| = 2𝐺0 𝐺2 (𝐺0 2 + 2𝐺0 𝐺2 + 𝐺2 2) = 2𝐺0 𝐺2 (𝐺0 + 𝐺2)2 |𝑌4 4| = 2𝐺0 2 𝐺2 (𝐺0 + 𝐺2)2 𝑅𝑖𝑛 = 𝑅𝑖(14) = 2𝐺0 𝐺2 (𝐺0+𝐺2)2 2𝐺0 2 𝐺2 (𝐺0+𝐺2)2 = 𝑅0 (4) Equation (4) indicates that the input and output ports of Fig. 5 are matched under the condition 𝐺1 2 = 𝐺0 2 = 𝐺2 𝐺3. The voltage transfer function between terminals 3 and 4 and 1 and 4 of the bridge-T network in Fig. 5 is expressed as; 𝐴 𝑣|14 34 = 𝑠𝑔𝑛(3 − 4)𝑠𝑔𝑛(1 − 4)(−1)12 |𝑌34 14| |𝑌14 14| = |𝑌34 14| |𝑌14 14| (5) |𝑌34 14| = 2𝐺0 2 𝐺2 (𝐺0 + 𝐺2) 𝐴 𝑣|14 34 = 𝑣34 𝑣14 = 2𝐺0 2 𝐺2 (𝐺0+𝐺2) 2𝐺0 𝐺2 (𝐺0+𝐺2)2 = 𝐺0 𝐺0+𝐺2 = 𝑅2 𝑅2+𝑅0 (6) The propagation constant (N) [21] of the bridge-T network in Fig. 5 is described as; 𝑒 𝛾 = 𝑣14 𝑣34 = 1 + 𝑅0 𝑅2 = 𝑁, 𝑅0 𝑅2 = 𝑁 − 1 (7) 𝑅2 = 𝑅0 𝑁−1 , 𝑅3 = 𝑅0 2 𝑅2 = (𝑁 − 1)𝑅0, 𝑅2 = 𝑅0 (8) For a given value of propagation constant (N) and the normal value of characteristic impedance (𝑅0 = 600 ), the other components of the bridge-T attenuator can be designed very easily using FAM approach.
- 6. 5 Hence, we conclude that the design of bridge-T attenuator becomes very simple using floating admittance matrix approach in comparison to the conventional method. 4. CONCLUSION: In principle, the proposed technique can be used to model any circuit, whether active or passive or the combination of both. The proposed “floating admittance matrix” is an elegant approach to mathematical modelling of active and passive devices and circuits. The specific advantage of the floating admittance matrix approach lies in the fact that the algebraic sum of all elements of any row or of any column yielding zero provides first check that the process of analysis and design is in the correct direction of any circuit. Once the floating admittance matrix of the active device is known, the rest of the floating admittance matrix of the complete circuit containing passive components, can be written by inspection without any difficulty. The rigorous equivalent circuit analysis with more active devices in any circuit can be avoided using this technique. REFRENCES 1. Chirlian, P., Electronic Circuits-Physical Principles Analysis and Design, McGraw-Hill. 2. Millman J. and Halkias C.C; Electronic Devices and Circuits; McGraw–Hill, New York, 1967. 3. Millman, J. and Halkias C.C., Integrated Electronics: Analog and Digital Circuit and System, McGraw–Hill, 1972. 4. Balbanian, N. and Bickart, T. A., Electrical Network Theory, McGraw–Hill, 1969. 5. Mitra, S. K., Analysis and Synthesis of Linear Active Networks, John Wiley, 1969. 6. Ramey, R.L. and White E., Matrices and Computers in Electronic Circuit Analysis, McGraw–Hill, 1971. 7. Paul R. Gray, Paul J. Hurst, Stephen H. Lewis and Robert G. Meyer, Analysis and Design of Analog Integrated Circuits, John Wiley, 2008. 8. D. A. Neamen, Semiconductor Physics and Devices– Basic Principles, McGraw-Hill, 2010. 9. Jacob Millman and Arvin Gabel, Microelectronics, Tata McGraw-Hill Education, 10. Haigh, David G., and Paul M. Radmore. "Admittance matrix models for the nullor using limit variables and their application to circuit design", IEEE Transactions on Circuits and Systems I: Regular Papers 53, no. 10 (2006): 2214-2223. 11. Vago, I., and E. Hollos. "Two-port models with nullators and norators", Periodica Polytechnica Electrical Engineering 17, no. 4 (1973): 301-309. 12. Kumar, Pragati, and Raj Senani. "Improved grounded-capacitor SRCO using only a single PFTFN", Analog Integrated Circuits and Signal Processing 50, no. 2 (2007): 147-149. 13. DBSJ Prasad Rao, B.P. Singh, Dikshitulu Kaluri, “A note on the measurement of FET parameters” Int. J., pp 521-524, vol. 41, 1976. 14. B. P. SINGH, "On demand realization of a frequency-dependent negative resistance and an infinite input impedance" International Journal of Electronics Theoretical and Experimental, Taylor & Francis, Vol.44, no. 3 (1978): 243-249. 15. Chen, Wai-Kai. Circuit analysis and feedback amplifier theory. CRC Press, 2005. 16. Meena Singh, Sanjay Roy, and B. P. Singh, "On Demand Realization of Input and Output Resistances of MOSFET Amplifier" In American Institute of Physics Conference Proceedings, vol. 1414, no. 1, pp. 266-270. AIP, 2011. 17. B. P. Singh, “A Null Method for Measuring the Parameters of a FET”, Int. J. Electronics, Vol.44, pp.251-256, Feb.1978, ISSN: 0020-7217. 18. B. P. Singh, “Minimum Sensitive FET Filter”, Indian J. Pure & Appl. Phys. (India), Vol.20. pp. 389, May 1982, ISSN: 0019-5596. 19. B. P. Singh, “Null Method for measuring h-Parameter”, Indian J. Pure & Appl. Phys., Vol.16, pp.337-339, 1982, ISSN: 0019-5596. 20. B. P. Singh, “Active Bridge for Measurements of the Admittance Parameters of the Transistor”, Indian Journal of Pure & Applied Physics, Vol. 15, pp. 783, Nov. 1976, ISSN: 0019-5596. 21. W. L. Everitt and G.E. Anner, "Communication Engineering", McGraw–Hill, 1937.