2016/12/10: Ourense MakersLab workshop
- 1. Workshop - Open FPGA tools Jesús Arroyo Torrens OurenseMakersLab December 10, 2016 La Molinera, Ourense https://github.com/FPGAwars/workshops https://github.com/Jesus89
- 2. Field Programmable Gate Array
- 3. Open FPGA toolchain IceStorm Project by Clifford Wolf
- 4. Open FPGA boards Icestick iCE40-HX8K Breakout Board IceZUM Alhambra
- 5. Open FPGA tool stack
- 6. Open FPGA tool stack
- 7. Requirements 1. Python 2.7 Check installation: open a console and type python Windows Users: DON’T FORGET to select Add python.exe to Path feature on the “Customize” stage https://www.python.org
- 8. Icestudio Experimental graphic editor for open FPGAs. Created with HTML and JS https://github.com/FPGAwars/icestudio
- 9. 1. Install ● Copy icestudio-0.2.4-dev.zip ● Unzip the file ● Execute icestudio 2. Setup ● Install toolchain Tools > Toolchain > Install ● Install drivers Tools > Drivers > Enable Drivers configuration requires administrative privileges Follow the instructions in each OS Icestudio
- 10. 3. Hello, world! ● Load example 1. Basic > 1. Led on ● Select board Board > IceZUM ● Select I/O pin Edit the combo ● Upload bit stream Tools > Upload Enter in a block and edit a I/O label by double clicking Icestudio
- 11. 4. More leds on ● Create a project File > New project ● Add blocks Bit > 1 Basic > Output ● Connect wires ● Upload bit stream Tools > Upload Multiple I/O blocks can be created, e.g. “led0, led1, led2” Icestudio
- 12. 5. Blink ● Import DIV block File > Import block ● Add clock input Basic > Input ● Connect wires ● Upload bit stream Tools > Upload Icestudio The clock is a 12 MHz signal
- 13. 6. Custom blink ● Add constant Basic > Constant ● Insert a value 6000000 ● Connect wires ● Upload bit stream Tools > Upload Icestudio The clock is a 12 MHz signal
- 14. 7. Counter ● Import counter block File > Import block ● Reconnect wires ● Upload bit stream Tools > Upload Icestudio
- 15. 8. Let’s code ● Create a project File > New project ● Add blocks Basic > Code Basic > Input Basic > Output ● Connect wires ● Verify the design Tools > Verify Icestudio
- 16. 9. Custom block ● Load a project File > Open project ● Save project as block File > Export as block Input / Output pins will become in/out block ports Icestudio
- 17. 10. Using buttons ● Create a project File > New project ● Add blocks Basic > Input Basic > Output Config > Pull up inv ● Connect wires ● Upload bit stream Tools > Upload Icestudio
- 18. Apio Experimental open source ecosystem for open FPGAs. Created with Python https://github.com/FPGAwars/apio
- 19. 1. Install ● Open the console and execute $ pip install U apio ● Check apio $ apio 2. Setup ● Install toolchain $ apio install all ● Install drivers $ apio drivers enable Drivers configuration requires administrative privileges Follow the instructions in each OS Apio
- 20. 3. Hello, world! ● Load example $ apio examples d icezum/leds ● Move to example $ cd icezum/leds ● Verify and simulate $ apio verify $ apio sim ● Build and upload $ apio build $ apio upload ● Time analysis and clean $ apio time $ apio clean Apio
- 22. Workshop - Open FPGA tools Jesús Arroyo Torrens OurenseMakersLab December 10, 2016 La Molinera, Ourense https://github.com/FPGAwars/workshops https://github.com/Jesus89