Electronic and Communication Engineering 4th Semester (2012-june) Question Papers

USN O6MAT41

Fourth Semester B.E. Degree Examination, Ju,ne 2012
Engineering Mathematics - lV
Time: 3 hrs. Max. Marks:100
Note: 7. Answer FIVE full questions, selecting
at least TWO questions from each part.
2. Use of statistical tables is pennified.

PART -A
I a. Employ Taylor's method to obtain approximate value of y at x = 0.1 and x = 0.2 for the
E differential equation y' = x2y - I , y(0) = I considering upto the fourth degree term.(06 Marks)

6. Using Runge-Kutta method of fourth order, s61vg ; !I = I;+ with y(0) =I at
dx y'+x'
?4) O.4.
x -- O.2, (07 Marks)

c. Given 9=*'tt +y)andy(I)= l,!(l.l)= 1.233, y(l .2) = 1 .548, y( I .3) = 1.979, evaluate
dx
y(l.a) by Adams - Bashforth method. (07 Marks)

Yo)
a. Obtain the Cauchy-Riemann equations in polar form. (06 Marks)
b. Verify that v = e* (x Sin y + y Cos y) is harmonic. Find u such that f(z) = u + iv is an
ci analytic function. Also find f(z). (07 Marks)
o,
Find the region in the W-plane bounded by the lines x = l, y = l, x + y = 1 under the
transformation W = 22.Indicate the region with sketches. (07 Marks)

3a. State and prove Cauchy's integral formula. (06 Marks)
1

.g.d b. Find the Laurent's expansion for f(z) =
(z-1)(z-3)
Z
in the region i) l< lzl <3i
ii) lz - tl 2. (07 Mar*s)
-.i
Sinnz2 + Cosnz2
C. Evaluate
I where C is the circle lzl = :, Uy Cauchy's residue theorem.
66
! {r-t)'{r-z)
(07 Marks)

4a. Obtain the series solution of the equation 4xy" + 2 (l - x) y' - y = 0.
:* b. Obtain the series solution ofLegendre's differential equation
(l - *2) y" - 2xy' + n(n + l)y =Q. /s/
c. Express 4x3 - 3^ + 8 interms ofLegendre polynomial. i2t
^'-
6g PART
---- - B
5a. Fit a parabola ofthe form y = x+cx to the followin
a + bx +cx'to me ro
-i ..i x 0 I 4 2 5-l

c v 3 l
r3 2l 31
z b. Obtain the lines ofregression and hence find the coefficient of correlation for the data :

x I 3 4 2 -5 8 9 l0 13 15
o
a v 8 6 l0 8 l2 16 l6 10 32 32
(07 Marks)
c. State and prove Baye's theorem. (07 Malks)

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O6MAT41

6a. Find mean and standard deviation ofthe binomial distribution. (06 Marks)
b. The probability that an individual suffers a bad reaction fiom a certain injection is 0.001.
Using Poisson disfribution, determine the probability that out of2000 individuals :
i) Exactly 3 and
ii) More than 2 will suffer a bad reaction. (07 Marks)
The weekly wages of workers in a company are normally distributed with mean of Rs.700/-
and standard deviation of Rs.50. Find the probability that the weekly wage of a randomly
chosen worker is i) between Rs.650 and Rs.750, and ii) more than Rs.750. (07 Marks)

7a. The mean and standand deviation of marks scored by a sample of 100 students are67.45 arrd
2.92.Find, : i) 95?o afi ii) 99?o confidence intervals for estimating the mean marks of the
shrdent population. (06 Marks)
b. Ten individuals are chosen at random from a population and their heights in inches are
foundtobe63,63,66,67,68,69,70,70,71,71.Testthehypothesisthatthemeanheightof
the universe is 66 inches. (to.s = 2.262 for 9 d.f). (07 Marks)
c. Explain the following terms :
i) Null hypothesis
ii) Confidence limits
iii) Type I and type II errors. (07 Mart<s)

8a. A fair coin is tossed thrice. The random variables x and y are defined as follows :
x = 0 or I according as head or tail occurs on the first toss. y = number ofheads.
i) Determine the marginal probability dishibution of x and y.
iD Determine the joint distribution of x and y.
iii) Determine E(x), E(y), E(xy).
iv) Determine o*, or. (06 Marks)
b. Define Stochastic matrix. Show that the matrix P is a regular Stochastic matrix and also find
'its unique
fixed probability vector.
[o.s o.zs o.zs'l
r=lo.s o o.s (07 Marks)

L0 1 0l
I

c. A software engineer goes to his office everyday by motor bike or by car. He never goes by
bike on two consecutive days. But if he goes by car on a day then he is equally likely to go
by car or by bike the next day. Find the transition probability matrix of the Markov chain.
If car is used on the first day of the week, find the probability that after 4 days
i) Bike is used
ii) Car is used. (07 Ma*s)

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USN 06ES42

Fourth Semester B.E. Degree Examination, Jtne 2012
Microcontrollers
Notez Answer FIVE full questions, selecting
atleast TWO questions from each part.

PART - A
E
E I a. Differentiate between RISC and CISC cpu architectures. (06 Marks)
b. What is the intemal memory capacity of 8051? Show the neat schematic of interface of
extemal 8 K ROM and 16 K RAM to 8051. (08 Marks)

ty c. Explain briefly a machine cycle. What is the time taken to execute a two -cycle instruction
ANL A, #n if crystal frequency is
i) I 1.0592 MHz ii) 16 MHz. (06 Marks)

2 a. What is addressing mode? Put the number lAh in registers R:, Rl and Rs in four different
addressing modes? (07 Marks)
b. List bit-addressable instructions and their operation in 8051. Which flags are effected in
such instructions. (07 Marks)
o; c, The number ECh is placed some where in extemal Ram, between locations 2000 h and
2020h. Write program to find the address of that location and put that address in R6(LSB)
and R;(MSB). (06 Marks)

3 a. Explain different ranges in jump instructions, with figure. (08 Marks)
b. Compare jump and call instructions. (04 Marks)
c. Two multibyte numbers numl and num2 are stored at locations }Oh,2lh, - - - - and
30h, 3lh, 32h, - - - -, Add numl and num2 storc the result at locations 40h,41h,42h, ----,
NL Use CALL and RET instructions in the ALP. (08 Mar*s)
E-
4 a. What are the reasons for writing programs in C language instead ofassembly language?
(04 Marks)
b. What are the ways to create a time delay in 8051C? Write C program to toggle all bits of
pofts p0 and p2 continuously, with a delay offew ms. (08 Marks)
a; c. List bit-wise logical operators in C, with examples. Write C program to read P1.0 and P1 .l
bits and issue an ASCII character to P0, to the table
Pl.l Pl.0
0 0 Send '0' to P0
0 Send 'l ' to P0
0 Send '2' to P0
...i c.i Send '3' to P0

Z
PART - B

E
5 a. Explain the different modes of operation of timer/counter with relevant block diagrams.
(12 Marks)
b. Write ALP to generate a square - wave of 2KHz, with a duty cycle of 667o. Use timer 0,
mode 2. (08 Marks)
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068S42

6a. What is serial communication? How serial communication is canied- out with RS232 in
8051 . (06 Marks)
b. Explain the bit pattem of SCON register. (06 Marks)
c. Write :
i) ALP to transfer serially letter 'A' continuously
ii) C program to receive bytes of data and put them in Pl. Use baud rate of9600, 8 bits and
1 stop bit, for both transmission and reception. Use timer 1, mode2.

ta. What are intemrpts? Explain the intem.rpt system of 805 I . (08 Ma*s)
b. With reference to Fig. Q7(b), normal status of INTI is high. Normal status of LED is OFF.
When INT I goes low, it tums ON LED and it remains ON for a fraction of second. Write
program to perform the above function. (06 Marks)

To LED.

Fie. Q7(b)
c. Write C program that continuously gets a single bit of data from Pl.7 and sends it to P1.0,
while continuously creating a square wave of 200 ps period on P2.3. Use timer 0, mode2 to
create square wave, assume XTAL = I 1.0592 MHz. (06 Marks)

8a. With a neat schematic diagram, show the interfacing of 8051 to ADC 0808 and write the
steps to program 8051, to get data from ADC. (10 Marks)
b. Interface LCD module to 8051 and write program to display the word LCD. (10 Marks)

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['
USN

Fourth Semester B.E. Degree Examination, Jane 2Ot2
Signals and Systems
Time: 3 hrs. Max. Marks: l oo
Note': Answer FIVE full questions, selecting
atleast TWO questions from each part.
PART -A
1 a. Find the even and odd components ofthe following signals :

E i)

av
- I a'
zh pie. eria)
ii) x[n]=tl,2,9, l,-21 . (04 Marks)

b. Detemine if following signals are energy or power signals :
i) x(t) = a; -'t /2 < t <TD ii) x [n] = tl/41'ulnl
(06 Marks)
= 0; elsewhere
3c c. Given x(t) as shown in Fig. Q1(c), plot x(2t + 2) and x( -t -l ). (04 Ma*s)

>LCO A
I

ora 3b
Fig. Ql(c)
.-a d. The input -output relationship inasystem is givenbyY[n] = x[n-5] + x[n-7], where x[n]
n- is the input and y[n] the output. Determine the properties ofthe system. (06 Marks)

2 a. Prove that if the impulse response h(t) and the input x(t) are unit step functions the output is
a ramp. (05 Marks)
b. Ifh(t)= u(t) - u(t-3) and x(0 = u(t) = u(t- l), determine the output y(t). (08 Marks)
'! C. If the input of a discrete LTI system is
:* xIn] - [,3,2,2] and the impulse response is,

6=
h[n] - [1,
f,
2,1). fincl the output. (07 Marks)

3 a. Theoutputofan LTI system is given by ylnl = xln + ll + 2x Lnl - xln- l]. Find the impulse
response if x[n] is the input. Is the system stable? (04 Marks)

--.i .i b. Obtain the natural response of a system described by the differential equation :
* r..,+ --r..,+v(t)= dx(t) ,(0) . dv(r)l
d2v(t) 2dv(t) -.-.-,: - ^ = l::l-:-1l =1. (06 Marks)
z dt
dr' dt dt Ln
c. Determine the impulse response ofan LTI system described by the difference equation :
E y[n] - 0.6y[n - l] + 0.08yln - 2l = xlnl. (06 Marks)

d. Draw the direct form I and II representations for a system described by the equation :
(04 Marks)

I of i

068C44 I

l

4a. Find x(t) if the Fourier - Series coefficients are as shown in Fig. Qa(a). The phase spectrum
is a null spectrum.
:
(06 Marks)

-3-l -t o I A K -->
Fig. Qa(a)

b. Determine the Fourier - Series of the signal x(t) = f ]t +11. ltot ttre magnitude and
"or[l? ?l
phase spectra. (07Marks)
c. Show that if x[n] is real and even, its Fourier coefficients are real. Hence find the DTFS

coefficients for the signat = ia[, - zp] . (07 Marks)
^tnl

PART-B

a. Find the FT of the sig-function sg!(t) defined by,
+l r>0
sgn(t)=0 t=0
-l r<0
plot the magnitude and phase spectrum. (07 Marks)
b. If the Fourier transform ofx(0 isX(w)then, find the Fourier transform ofx(at). (06 Marks)
c. Find the DTFI of the signal x[n] = uln + 2l - u4[n - 3]. (07 Marks)

a. Find the Ff of the train of unit impulses shown in Fig. Q6(a). (07 Marks)

-3T -a.T -T D
.tl 5t' t
Fig.6(a)
h. Determine the difference equation description for the system with the impulse response
htnl = 51n] + 2(1)' u[n] + Cl)' ulnl. (06 Marks)
C. Find the fiequency response and impulse response of the system described by the
differential equation :
2dY(t)*3rrtr = 7x(t). (07 Marks)
dr

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06rC44

7a. Determine the Ztransform of
x[n] = -u1-.-11+ (1)" utnl.
Determine the ROC and pole - zero locations of x(t). (05 Marks)

b. If the z{ransform of x[n] is X(Z), derive the Z - transform of a[n]. (05 Marks)

Using Z-transform, find the convolution of x[n] = t1,2,-1,0,31 and y[n] = 11,2,-11. (05 Marks)
d.
Find the inverse Z - transform of
x(z) = (05 Marks)
1- l,
Ea. Given the Z -transform of the impulse response h[n] is
1
H(z) = --------------- ,.----------- . (0,6 Mart(s)
(l -lz-'.[l -]z-',f
What are the possible ROC? Comment on the stability and causality in each case.
h. Determine the transfer function and impulse response ofthe system described by

ytnl - lytn - 1l = 2xln - ll . (07 Marks)

c. If the impulse response is given by htnl = ($)" utnl +(l)'-2uln-t l, find the difference equation
of the system. (07 Marks)

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USN 10EC44

Fourth Semester B.E. Degree Examination, June 2Ol2
Signals and Systems
Time: 3 hrs. Max. Marks: 100
Note: Answer FIVE full questions, selecting

PART-A
a. Give a brief classification of signals. (04 Marks)
b. Check whether the following systems are linear, causal and time invariant or not.

tlo'I,(t) *
. dt'
zy<O
dv,ft) +3ty(t)
dt
= x(t) ii)y(n)=x'z(n)*-1.
x'(n-l)
(08 Marks)

3e c. Classify the following signals or energy signals or power signals:
i) x (n) = 2" u (-n) ii) x (n) = U)" + ()-". (0s Marks)
d. A system consists of several sub-systems connected as shown in Fig.Q(l) d. Find the
operator H relating x (t) to y (t) for the following sub-system operators:
H1: yr (t) = xi (t) xr (t-l) H3:Y(t)=l+2x3(t)
! c'r
Hz: y: (t) = | x: (t) Ha: ya (r) = cos ( x+ (r) ). (03 Marks)
I

grle)

lrlt).61 9r1s2

t+,-i--l Ue{t }
,€b
Fie.Q 1(d)

2a. Find the continuous-time convolution integral given below:
Y (t) = cos (7rt) [u (t + l) - u (t - 3)]x u (t). (06 Marks)
b. Consider the i/p signal x (n) and impulse responses (n) given below:
9i x(n)={
.
[t o< n <+ l"' 0<n<6. lcrl <l
h1n1=1
10. otherw ise [0 otherwise
Obtain the convolution sum y (n) = x(n) + h (n). (08 Marks)
C. Derive the following properties:
-= i) x (n) x h (n) = h 1n) ii) x(n)x [h(n) x g(n)] =[x(n)xh(n)]xg(n). (06 Marks)
"*1r1
3a. For each impulse response listed below, determine whether the corresponding system is

-l .i memoryless, causal and stable:
i) h (n) = (0.99)' u (n + 3)
h(0=e-3'u(t- 1).
ii) (08 Marks)
z b. Evaluate the step response for the LTI system represented by the following impulse
response: h (t) = u (t + l)-u (t- l). (04 Marks)
C. Draw direct form I implementation of the corresponding systems:
d y(t) 5{yr ,4yfi}-xrtr -34x1r.1
dr' dr' - dr
(04 Marks)

I of 4

108C44

Determine the forced response for the system given by:
5 dy(l)
dr-- t0y(r) = 2x11).withinputx(t)=2u(t). (04 Marks)

4a. State and prove time shift and periodic time convolution properties of DTFS. (06 Marks)
b. Evaluate the DTFS representation for the signal x (n) shown in Fig.Q4(b) and sketch the
spectra. (0E Marks)

rn) ?

Il-t-.a oI 2 3' s b'l
Fie.QaG)
Determine the time signal conesponding to the magnitude and phase spectra shown in
Fig.Q4(c), with Wo = 71. (06 Marks)

I t-3 +
,
,t t7
4--xlt)

-, :, -l ol>
' "/tt
Fig.Qa(c)

PART-B
5a. State and prove the frequency-differentiation property of DTFI. (06 Marks)
b. Find the time-domain signal corresponding to the DTFT shown in Fig.Q5(b). (05 Marks)

xtc-)
-Sb
e

-xf -2F -fr
Fie.Qs(b)

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toBC44

c- For the signal x (t) shown in Fig.Q 5(c), evaluate the following quantities without explicitly
computing x (w). (09 Marks)

it Jx
twr dw ii) llx twrl'ow iiir .Jx
twte' . dw.

Fig.Q5(c)

6 a. The input and output of causal LTI system are described by the differential equation.
d'ytt) *3dy(o *2y(r)= x (0
dt'? dt
i) Find the frequency response of the system
ii) Find impulse response of the system
iiD What is the response of the system if x (t) = 1ga u (t;. (10 Marks)
b. Find the frequency response of the RC circuit shown in Fig.Q6(b). Also find the impulse
response of the circuit. (10 Marks)

+

Fie.Q6(b)

7 a. Briefly list the properties of Z-Transform. (04 Marks)

b. Using appropriate properties, find the Z-transfbrm x (n) = n'|,f]" u tn - Zt. (06 Marks)
(31
c. Determine the inverse Z-transfo rm of x@)=+, by long division method of:
i) ROC; lzl > 1. (O4 Marks)
d. Determine all possible signals x (n) associated with Z-transform. (06 Marks)

rrr- wl,'
, '''
l-wl,.l.u)..1
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10EC44

8 a. An LTI system is described by the equation ^.-
v(n)=x(n)+0'81^('J:'0:8i*Gzl-o+s.v(n-2)Determinethetransferfunctionof
Assess the stability' (05 Marks)
itre system.'sketch the poles and zeros on the Z-plane'
transfer function' Also
b. A systems has impulse response h (n) 01)" u (n) Determine the
is given by:
determine the input to the system if the output
I !/r"..
y(n)=ru (n)+;[ - :.J, t,t'
(05 Marks)

A linear shift invariant system is described by the difference equatlon'
1l (n- l)
vrnr-l vtn- ll+5){n-2)=x (n)+x
with y (-1) = 0 and Y (-2) = -1.
Find:
i) The natural response of the system'
ii) The forced response of the system and (10 Marks)
iii) The frequency response ofthe system for a step'

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USN 06EC4s

Fourth Semester B.E. Degree Examination, June 2Ol2
Fundamentals of HDL
Time: 3 hrs. Max. Marks: 100

Note'. Answer any FIVE full questions, selecting

,
PART -A
1, 1 a. Describe verilog data t)?es with an example. (0E Marks)
.9
I b. For the following VHDL code, determine legal and illegal operations between data of
different t1pes.
SIGNAL a BIT:
SIGNAL b BrT_VECTOR (7 DOWNTO 0);
-t SIGNAL c STD_LOGIC;
!,. SIGNAL d STD_LOGIC-VECTOR (7 DOWN TO O);
SIGNAL e INTEGER RANGE O TO 255:
H(J -;--;1-:

a<=b(5) ;. o:"*--"'tu, .

t,s b(0)<=a /,&- .,.,]-lt'
t-'
c<=d(5) l?i ,1it" '
d(0)<=c
a<=C
'i-o,,.

*'' i i
4.,-*- t: z

b<=d '
. ''
.-3,; 1,.
---'
..

'a
e<=b
'e<=d (05 Marks)
c. Find the value of the expressions X t . . ..X8, for the following VHDL signal declarations.
-i' i
E^
!=
SIGNAI- a BIT: ='l' :
SIGNAL b BIT_VECTOR (3 DOWNTO 0) : = "1100";
4..
SIGNAL c BIT_VECTOR (3 DOWNTO 0) : = "0010";
69 SIGNAL d BrT_VECTOR (7 DOWNTO 0) ;
a<, i) Xl<=aandc; v) X5<=bsll 2;
ii) X2<=candb; vi) X6<=bsla2;
iii) X3<=bXORc; vii) X7<=brol 2;
iv) X4<=aNORb(3); viii) X8 < = a AND NOT b(0) AND NOT c(l); (07 Marks)

,- Write a data - flow description in both VHDL and verilog of a system that has three 1 - bit
d>
e< input, a(l), a(2) and a(3) ; and one I - bit output b. The least significant bit is a(l); and b is I
only when (a(3) a(2) a(l) = 1, 3, 6, or 7 (all in decimal), otherwise b is 0. Derive a
o minimized Boolean function of the system and write the data flow description. (I2 Marks)
z b. Write VHDL code using a data flow description of a full adder with enable. If the enable is
low (0), the sum and carry are zero; otherwise, the sum and carry are the usual output ofthe
o. adder. Draw the truth table of this adder, and derive the simplified Boolean function.
(08 Marks)

I nf ?

06EC45

3 a. Develop a VHDL model for a pipelined circuit that computes the average of corresponding
l

values in three streams of input values, a, b and c. The pipeline consists of three stages :
The first stage sums values of a and b and saves the value of c ; the second stage adds on the
saved value ofc, and third stage divides by three. The inputs and output are all signed fixed
- point numbers indexed from 5 down to - 8. (12 Marks)
b. Explain the structure of the HDL behavioral description, with an example. (08 Marks)

4a. Write a VHDL code, using structural description of a 3-bit comparator using adders.
(10 Marks)
b. Develop a verilog model of a switch debouncer for a push button that uses a debounce
interval of 10 ms. Assume the system clock frequency is 50 MHz. (06 Marks)
Write a verilog code of a pulse triggered master-slave JK flip flop, using structural
description. (04 Marks)

PART - B

5a. Explain how functions are described in VHDL and verilog. (06 Marks)
b. Develop VHDL code for signed vector multiplication, using procedure and tasks. (14 Marks)

6a. Describe procedure for invoking a vHDL entity from a verilog module and a verilog module
from a VHDL module. (08 Marks)
b. Develop mixed-language description of a 9-bit adder. (08 Marks)
c. Write a note on VHDL packages. (04 Marks)

ta. List limitations of mixed-language description. (04 Marks)
b. Write mixed - language description of a simple RC filter. (12 Marks)
c. Describe instantiating CASEX in VHDL. (04 Marks)

8a. With the help of flow chart. Explain synthesis steps in HDL. (08 Marks)
b. With an example, explain how mapping of procedure and task takes place in VHDL and
verilog synthesis respectively. (12 Marks)

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/

USN
10EC45

Fourth Semester B.E. Degree Examination, June 2012
Fundamentals of HDL

c- at least TWO questions from each part.
I
PART-A
1 a. Explain the structure of VHDL module and verilog module. (06 Marks)
b. Explain verilog data types. (06 Marks)
c. Discuss different logical operators used in HDLs. (08 Marks)

2 a. Explain the execution of signal assignment statement in HDL with example. (06 Marks)
b. Write VHDL code for 2x I multiplexer with active low enable in data flow description.
.=..r (07 Marks)
gu c. Write verilog code for 2x2 unsigned combinational array multiplier. (07 Marks)

3 a. With the suitable example, explain the case statement in both VHDL and verilog. (06 Marks)
b. Explain the flowchart of booth multiplier algorithm with example. Also write VHDL code
for 4x4 bit booth algorithm.

4 a. What is binding in VHDL? Explain.
i) Binding between entity and architecture in VHDL.
ii) Binding between entity and component in VHDL.
iii) Binding between library and module in VHDL.
3t) b. Write verilog structural description of full adder. Use this
comparator and write the verilog structural code for the same. (12 Marks)

PART -B
vi 5 a. Write HDL code for converting an unsigned binary to an integer using procedure and task.
(10 Marks)
b. Explain built-in procedures for file-processing in VHDL. (10 Marks)

6a. Why mixed type description needed? Explain. (04 Marks)
b. Write HDL code (both VHDL and verilog) for finding the greatest element of an array.
(12 Marks)
U< c. Discuss VHDL package with example. (04 Marks)

o
z a. How to invoke a VHDL entity from verilog module? Explain with an example. (08 Marks)
b. Write mixed language description of a 3-bit adder with zero flag. If the output of the adder is
o zero, the zero flag is set to l; otherwise it is set to 0. (12 Marks)

l of 2

10EC45

8a. Explain synthesis steps with flow chart. (10 Marks)
b. Find the gate level mapping for the following verilog code:
module if_st(a, y);
input [2:0] a;
output y ;
reg y I
always @ (a)
begin
if (a < 3'b101)
' Y = 1'b1;
else
Y = l'b0;
end
end module (06 Marks)

c. Discuss synthesis information extraction from entity in VHDL. (04 Marks)

2ol2

06EC46
USN

Fourth Semester B.E. Degree Examination, Jtu:l.e 2Ol2
Linear lG's and Applications

Time: 3 hrs.

E
PART -A
la.
39 b. Write the circuit diagram of 3 input inverting summing amplifier and derive the expression
for the out put voltage. Explain how you can convert it into an adder and averager. (08 Marks)
C. A direct coupled non inverting amplifier is to amplify a 200mV signal to a level of 6V using
an op-amp. Design a suitable circuit using op-amp 741. Given: For 741 lor,m"r = 500nA and
V.. = +15V. (05 Marks)

d. An op-amp with slew rate of 0.5 V/pts is used. Find the minimum time required for the
eF circuit to change the output by lOV. (02 Marks)

3z
i.9 2a. Write the circuit diagram of a capacitor coupled voltage follower. Explain how you can
incrcase the input impedance of that circuit and obtain the expression for the input
impedance. (07 Marks)
b. Design a capacitor coupled inverting amplifier to have a gain of 100 and to operate in
between 100H2 to 10 kHz. Assume signal voltage of 20mV' load resistance of 3.9 KO and
=E Iu,,a*r = 500nA. (06 Marks)
C. .Design a capacitor coupled non-inverting amplifier using single polarity power supply. The
.L
specifications are V." = 20V, Gain =100, Vo = 4V, fr = l00Hz, Rr = 4.7KO, Ib(,,,",) = 500nA.
(07 Marks)
c-A

;6 3a. Explain 21,, mod technique of frcquency compensation in op-amp. (07 Marks)

b. List 5 precautions to be taken for op-amp circuit stability. (05 Marks)
C. Explain slewrate effect on band width and output amplitude ofan op-amp circuit. (06 Marks)
d. The gain-band width product of an op-amp circuit is 800 kHz. Calculate the upper cut off
frequency if the closed loop gain is 100. (02 Marks)

4 a. Write the circuit diagram of three op-amp instrumentation amplifier and explain the working
by deriving the expression fol gain. (07 Marks)
;.i b. Explain the working of peak clipper circuit using op-amp. (05 Marks)
C. Design a precission full-wave rectifier to produce a 2V peak output ftom a sinewave input
Z with a peak value of 0.5V and a frequency of I MHz. Use supply of +15V.
Given I61,,u*1 = 500nA. (08 Marks)

E

1of 2

06EC46

PART - B

a. Explain the working of positive clamper circuit using op-amp. (04 Marks)

b. using block diagram of log and antilog amplifier explain the working of analog multiplier
circuit. How you can conveft it into a squarer? Explain. (08 Marks)

c. Design aphase shift oscillatorusing op-amp 741 to have an output frequency of l5kHz.The
output amplitude is to be stabilized at +14v, for the given op-amp Iur,no*t = 500nA.(05 Marks)
d. Write the circuit diagram of triangular rectangular wave generator with duty cycle and
frequency controls. (03 Marks)

a. write the circuit diagram and derive the expression for the voltage gain of the first order
high pass filter using op-amp. Hence explain its working. (08 Marks)

b. Explain the working of inverting Schmitt trigger circuit. Explain how you can modify this
circuit to get different trigger level with llTP + LTP. (07 Marks)
c. Design an astable multivibrator to have 19V output with a frequency of lkHz, for the given
op-amp lur,nu*t = 500nA. (05 Marks)

a. Write the functional diagram and explain the low voltage regulator using general purpose
regulator IC723. (06 Marks)

b. State and explain the following terms with respect to 3 pin IC regulators:
i) Load regulation
ii) Source regulation
iii) Drop out voltage. (06 Marks)

c. Describe how you can use 3 pin IC regulator as a curent source. (04 Marks)

d. Design an adjustable voltage regulator circuit to get Vo =7.5V with load current of 25 mA
using 7805 regulator IC. Given Iq = 4.2 mA. (04 Marks)

8a. Explain the principle of switch type analog phase detector.
'
(06 Marks)

b. With circuit diagram, explain the working of Schmitt trigger using 555 timer IC. (04 Mart<s)
C. Explain basic DAC techniques. Hence describe the construction and working ofR-2R ladder
DAC. (06 Marks)

d. Explain the working of servo tracking A/P converter. (04 Marks)

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Electronic and Communication Engineering 4th Semester (2012-june) Question Papers

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