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admission.edhole.com
Registers 
 Today we’ll see another common sequential device: registers. 
 They’re a good example of sequential analysis and design. 
 They are also frequently used in building larger sequential 
circuits. 
 Registers hold larger quantities of data than individual flip-flops. 
 Registers are central to the design of modern processors. 
 There are many different kinds of registers. 
 We’ll show some applications of 
these special registers. 
Registers 2 
admission.edhole.com
What good are registers? 
 Flip-flops are limited because they can store only one bit. 
 We had to use two flip-flops for our two-bit counter examples. 
 Most computers work with integers and single-precision floating-point 
numbers that are 32-bits long. 
 A register is an extension of a flip-flop that can store multiple bits. 
 Registers are commonly used as temporary storage in a processor. 
 They are faster and more convenient than main memory. 
 More registers can help speed up complex calculations. 
 We’ll discuss RAM next time, and later we’ll also see how registers 
are used in designing and programming CPUs. 
Registers 3 
admission.edhole.com
A basic register  Basic registers are easy to build. We can store multiple bits 
just by putting a bunch of flip-flops together! 
 A 4-bit register from LogicWorks, Reg-4, is on the right, and 
its internal implementation is below. 
 This register uses D flip-flops, so it’s easy to store data 
without worrying about flip-flop input equations. 
 All the flip-flops share a common CLK and CLR signal. 
Registers 4 
admission.edhole.com
Adding a parallel load operation 
 The input D3-D0 is copied to the output Q3-Q0 on every clock cycle. 
 How can we store the current value for more than one cycle? 
 Let’s add a load input signal LD to the register. 
 If LD = 0, the register keeps its current contents. 
 If LD = 1, the register stores a new value, taken from inputs D3- 
D0. 
Registers 5 
LD Q(t+1) 
0 Q(t) 
1 D3-D0 
admission.edhole.com
Clock gating 
 We could implement the load ability by playing games with the CLK 
input, as shown below. 
 When LD = 0, the flip-flop C inputs are held at 1. There is no 
positive clock edge, so the flip-flops keep their current values. 
 When LD = 1, the CLK input passes through the OR gate, so the 
flip-flops can receive a positive clock edge and can load a new 
value from the D3-D0 inputs. 
Registers 6 
admission.edhole.com
Clock gating is bad 
 This is called clock gating, since gates are added to the clock 
signal. 
 There are timing problems similar to those of latches. Here, LD 
must be kept at 1 for the correct length of time (one clock cycle) 
and no longer. 
 The clock is delayed a little bit by the OR gate. 
 In more complex scenarios, different flip-flops in the system 
could receive the clock signal at slightly different times. 
 This “clock skew” can lead to synchronization problems. 
Registers 7 
admission.edhole.com
A better parallel load 
 Another idea is to modify the flip-flop D inputs and not the clock 
signal. 
 When LD = 0, the flip-flop inputs are Q3-Q0, so each flip-flop just 
keeps its current value. 
 When LD = 1, the flip-flop inputs are D3-D0, and this new value is 
“loaded” into the register. 
Registers 8 
admission.edhole.com
Shift registers 
 A shift register “shifts” its output once every clock cycle. 
 SI is an input that supplies a new bit to shift “into” the register. 
 For example, if on some positive clock edge we have: 
SI = 1 
Q0-Q3 = 0110 
then the next state will be: 
Q0-Q3 = 1011 
Q0(t+1) = SI 
Q1(t+1) = Q0(t) 
Q2(t+1) = Q1(t) 
Q3(t+1) = Q2(t) 
 The current Q3 (0 in this example) will be lost on the next cycle. 
Registers 9 
admission.edhole.com
Shift direction 
Q0(t+1) = SI 
Q1(t+1) = Q0(t) 
Q2(t+1) = Q1(t) 
Q3(t+1) = Q2(t) 
Present Q0-Q3 SI Next Q0-Q3 
 The circuit and example make it look like the register shifts “right.” 
ABCD X XABC 
 But it really depends on your interpretation of the bits. If you 
Present Q3-Q0 SI Next Q3-Q0 
consider Q3 to be the most significant bit instead, then the register 
is shifting in the opposite direction! 
DCBA X CBAX 
Registers 10 
admission.edhole.com
Shift registers with parallel load 
 We can add a parallel load, just like we did for regular registers. 
 When LD = 0, the flip-flop inputs will be SIQ0Q1Q2, so the 
register shifts on the next positive clock edge. 
 When LD = 1, the flip-flop inputs are D0-D3, and a new value is 
loaded into the shift register, on the next positive clock edge. 
Registers 11 
admission.edhole.com
Shift registers in 
LogicWorks 
 Here is a block symbol for the Shift Reg-4 from LogicWorks. The 
implementation is shown on the previous page, except the LD input 
here is active-low instead. 
Registers 12 
admission.edhole.com
i-clicker 
How do you implement using the Shift Reg 4 the sequence 1, 3, 7, 15, 
1, 3, … that is, the sequence 0001, 0011, 0111, 1111, 0001, …. 
 A) D0 =1, D1=1, D2=1, D3=1, SI=1, LD’ = 1 
 B) D0 =1, D1=0, D2=0, D3=0, SI=1, LD’ = 1 
 C) D0 =1, D1=0, D2=0, D3=0, SI=1, LD’ = Q3’ 
 D) D0 =1, D1=0, D2=0, D3=0, SI=0, LD’ = Q3’ 
Registers 13 
admission.edhole.com
Other types of shift registers 
 Logical shifts – Standard shifts like we just saw. In the absence of a SI 
input, 0 occupies the vacant position. 
 Left: 0110 -> 1100 
 Right: 0110 -> 0011 
 Circular shifts (also called ring counters or rotates) – The shifted out bit 
wraps around to the vacant position. 
 Left: 1001 -> 0011 
 Right: 1001 -> 1100 
 Switch-tail ring counter (aka Johnson counter) – Similar to the ring 
counter, but the serial input is the complement of the serial output. 
 Left: 1001 -> 0010 
 Right: 1001 -> 0100 
 Arithmetical shifts – Left shifting is the same as a logical shift. Right 
shifting however maintains the MSB. 
 Left: 0110 -> 1100 
 Right: 0110 -> 0011; 1011 -> 1101 
Registers 14 
admission.edhole.com
i-clicker 
A switch-tail ring counter is similar to the ring counter, but the serial 
input is the complement of the serial output. 
List the sequence of states after each right shift until the register returns 
to 1001 
Register content 1001 
 A) 0101, 1011, 1100, 0111, 1010, 0100, 0011, 1001 
 B) 1100, 0110, 0011, 1001 
 C) 0100, 1010, 1101, 0110, 1011, 0101, 0010, 1001 
 D) 1100, 0010, 0101, 1110, 0011, 1101, 1010, 1001 
Registers 15 
admission.edhole.com
Serial data transfer 
 One application of shift registers is converting between “serial data” 
and “parallel data.” 
 Computers typically work with multiple-bit quantities. 
 ASCII text characters are 8 bits long. 
 Integers, single-precision floating-point numbers, and screen 
pixels are up to 32 bits long. 
 But sometimes it’s necessary to send or receive data serially, or 
one bit at a time. Some examples include: 
 Input devices such as keyboards and mice. 
 Output devices like printers. 
 Any serial port, USB or Firewire device transfers data serially. 
 Recent switch from Parallel ATA to Serial ATA in hard drives. 
Registers 16 
admission.edhole.com
Receiving serial data 
 To receive serial data using a shift register: 
 The serial device is connected to the register’s SI input. 
 The shift register outputs Q3-Q0 are connected to the computer. 
 The serial device transmits one bit of data per clock cycle. 
 These bits go into the SI input of the shift register. 
 After four clock cycles, the shift register will hold a four-bit word. 
 The computer then reads all four bits at once from the Q3-Q0 
outputs. 
Registers 17 
serial device 
computer 
admission.edhole.com
Sending data serially 
 To send data serially with a shift register, you do the opposite: 
 The CPU is connected to the register’s D inputs. 
 The shift output (Q3 in this case) is connected to the serial 
device. 
 The computer first stores a four-bit word in the register, in one 
cycle. 
 The serial device can then read the shift output. 
 One bit appears on Q3 on each clock cycle. 
 After four cycles, the entire four-bit word will have been sent. 
serial device 
Registers 18 
computer 
admission.edhole.com
Registers in Modern Hardware 
• Registers store data in the CPU 
• Used to supply values to the ALU. 
• Used to store the results. 
• If we can use registers, why bother with RAM? 
CPU GPR's Size L1 Cache L2 Cache 
Pentium 4 8 32 bits 8 KB 512 KB 
Athlon XP 8 32 bits 64 KB 512 KB 
Athlon 64 16 64 bits 64 KB 1024 KB 
PowerPC 970 (G5) 32 64 bits 64 KB 512 KB 
Itanium 2 128 64 bits 16 KB 256 KB 
MIPS R14000 32 64 bits 32 KB 16 MB 
Answer: Registers are expensive! 
• Registers occupy the most expensive space 
on a chip – the core. 
• L1 and L2 cache are very fast RAM – but not 
as fast as registers. 
Registers 19 
Dunnington. Source INtel 
admission.edhole.com
Shift versus Multiply and Divide 
 You can multiply by powers of two by shifting to the left 
 A left shift by n is equivalent to multiplying by 2n 
 Example: 
 3 * 2 = 6; 3*22 = 12 
 0011 << 1 = 0110; 0011 << 2 = 1100 
 You can divide by powers of two by shifting to the right 
 A right shift by n is equivalent to dividing by 2n 
 Example 
 8 / 2 = 4; 8 / 22 = 2; 4 / 2= 2; -4 / 2 = -2 
 1000 >> 1 = 0100; 1000 >> 2 = 0010; 0100 >> 1 = 0010; 1100 
>> 1= 1110 
-4 en two’s 
complement 
-2 en two’s 
complement 
Registers 20 
admission.edhole.com
Why should I user shift instead 
of multiply? Program 1: Multiplication 
#include .. 
main() { 
scanf(“%d”,&mul); 
start = _rdtsc(); 
for (i=0;i<60;i++){ 
b=b*mul; 
} 
end = _rdtsc(); 
printf("It took %llu cyclesn", 
end-start); 
return 0; 
} 
Output: It took 1056 cycles 
Program 2:Shift 
#include .. 
main() { 
scanf(“%d”,&mul); 
start = _rdtsc(); 
for (i=0;i<60;i++){ 
b=b << mul; 
} 
end = _rdtsc(); 
printf("It took %llu cyclesn", 
end-start); 
return 0; 
} 
Output: It took 896 cycles 
Registers 21 
admission.edhole.com
Why should I user shift instead 
of integer division? Program 1: Division 
#include .. 
main() { 
scanf(“%d”,&mul); 
start = _rdtsc(); 
for (i=0;i<60;i++){ 
b=b/mul; 
} 
end = _rdtsc(); 
printf("It took %llu cyclesn", 
end-start); 
return 0; 
} 
Output: It took 29328 cycles 
Program 2:Shift 
#include .. 
main() { 
scanf(“%d”,&mul); 
start = _rdtsc(); 
for (i=0;i<60;i++){ 
b=b >> mul; 
} 
end = _rdtsc(); 
printf("It took %llu cyclesn", 
end-start); 
return 0; 
} 
Output: It took 912 cycles 
Registers 22 
admission.edhole.com
Registers summary 
 A register is a special state machine that stores multiple bits 
of data. 
 Several variations are possible: 
 Parallel loading to store data into the register. 
 Shifting the register contents either left or right. 
 Counters are considered a type of register too! 
 One application of shift registers is converting between serial 
and parallel data. 
 Most programs need more storage space than registers 
provide. 
 We’ll introduce RAM to address this problem. 
 Registers are a central part of modern processors, as we will 
see in coming weeks. 
Registers 23 
admission.edhole.com

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Celine George
 

Admission in india 2015

  • 2. Registers  Today we’ll see another common sequential device: registers.  They’re a good example of sequential analysis and design.  They are also frequently used in building larger sequential circuits.  Registers hold larger quantities of data than individual flip-flops.  Registers are central to the design of modern processors.  There are many different kinds of registers.  We’ll show some applications of these special registers. Registers 2 admission.edhole.com
  • 3. What good are registers?  Flip-flops are limited because they can store only one bit.  We had to use two flip-flops for our two-bit counter examples.  Most computers work with integers and single-precision floating-point numbers that are 32-bits long.  A register is an extension of a flip-flop that can store multiple bits.  Registers are commonly used as temporary storage in a processor.  They are faster and more convenient than main memory.  More registers can help speed up complex calculations.  We’ll discuss RAM next time, and later we’ll also see how registers are used in designing and programming CPUs. Registers 3 admission.edhole.com
  • 4. A basic register  Basic registers are easy to build. We can store multiple bits just by putting a bunch of flip-flops together!  A 4-bit register from LogicWorks, Reg-4, is on the right, and its internal implementation is below.  This register uses D flip-flops, so it’s easy to store data without worrying about flip-flop input equations.  All the flip-flops share a common CLK and CLR signal. Registers 4 admission.edhole.com
  • 5. Adding a parallel load operation  The input D3-D0 is copied to the output Q3-Q0 on every clock cycle.  How can we store the current value for more than one cycle?  Let’s add a load input signal LD to the register.  If LD = 0, the register keeps its current contents.  If LD = 1, the register stores a new value, taken from inputs D3- D0. Registers 5 LD Q(t+1) 0 Q(t) 1 D3-D0 admission.edhole.com
  • 6. Clock gating  We could implement the load ability by playing games with the CLK input, as shown below.  When LD = 0, the flip-flop C inputs are held at 1. There is no positive clock edge, so the flip-flops keep their current values.  When LD = 1, the CLK input passes through the OR gate, so the flip-flops can receive a positive clock edge and can load a new value from the D3-D0 inputs. Registers 6 admission.edhole.com
  • 7. Clock gating is bad  This is called clock gating, since gates are added to the clock signal.  There are timing problems similar to those of latches. Here, LD must be kept at 1 for the correct length of time (one clock cycle) and no longer.  The clock is delayed a little bit by the OR gate.  In more complex scenarios, different flip-flops in the system could receive the clock signal at slightly different times.  This “clock skew” can lead to synchronization problems. Registers 7 admission.edhole.com
  • 8. A better parallel load  Another idea is to modify the flip-flop D inputs and not the clock signal.  When LD = 0, the flip-flop inputs are Q3-Q0, so each flip-flop just keeps its current value.  When LD = 1, the flip-flop inputs are D3-D0, and this new value is “loaded” into the register. Registers 8 admission.edhole.com
  • 9. Shift registers  A shift register “shifts” its output once every clock cycle.  SI is an input that supplies a new bit to shift “into” the register.  For example, if on some positive clock edge we have: SI = 1 Q0-Q3 = 0110 then the next state will be: Q0-Q3 = 1011 Q0(t+1) = SI Q1(t+1) = Q0(t) Q2(t+1) = Q1(t) Q3(t+1) = Q2(t)  The current Q3 (0 in this example) will be lost on the next cycle. Registers 9 admission.edhole.com
  • 10. Shift direction Q0(t+1) = SI Q1(t+1) = Q0(t) Q2(t+1) = Q1(t) Q3(t+1) = Q2(t) Present Q0-Q3 SI Next Q0-Q3  The circuit and example make it look like the register shifts “right.” ABCD X XABC  But it really depends on your interpretation of the bits. If you Present Q3-Q0 SI Next Q3-Q0 consider Q3 to be the most significant bit instead, then the register is shifting in the opposite direction! DCBA X CBAX Registers 10 admission.edhole.com
  • 11. Shift registers with parallel load  We can add a parallel load, just like we did for regular registers.  When LD = 0, the flip-flop inputs will be SIQ0Q1Q2, so the register shifts on the next positive clock edge.  When LD = 1, the flip-flop inputs are D0-D3, and a new value is loaded into the shift register, on the next positive clock edge. Registers 11 admission.edhole.com
  • 12. Shift registers in LogicWorks  Here is a block symbol for the Shift Reg-4 from LogicWorks. The implementation is shown on the previous page, except the LD input here is active-low instead. Registers 12 admission.edhole.com
  • 13. i-clicker How do you implement using the Shift Reg 4 the sequence 1, 3, 7, 15, 1, 3, … that is, the sequence 0001, 0011, 0111, 1111, 0001, ….  A) D0 =1, D1=1, D2=1, D3=1, SI=1, LD’ = 1  B) D0 =1, D1=0, D2=0, D3=0, SI=1, LD’ = 1  C) D0 =1, D1=0, D2=0, D3=0, SI=1, LD’ = Q3’  D) D0 =1, D1=0, D2=0, D3=0, SI=0, LD’ = Q3’ Registers 13 admission.edhole.com
  • 14. Other types of shift registers  Logical shifts – Standard shifts like we just saw. In the absence of a SI input, 0 occupies the vacant position.  Left: 0110 -> 1100  Right: 0110 -> 0011  Circular shifts (also called ring counters or rotates) – The shifted out bit wraps around to the vacant position.  Left: 1001 -> 0011  Right: 1001 -> 1100  Switch-tail ring counter (aka Johnson counter) – Similar to the ring counter, but the serial input is the complement of the serial output.  Left: 1001 -> 0010  Right: 1001 -> 0100  Arithmetical shifts – Left shifting is the same as a logical shift. Right shifting however maintains the MSB.  Left: 0110 -> 1100  Right: 0110 -> 0011; 1011 -> 1101 Registers 14 admission.edhole.com
  • 15. i-clicker A switch-tail ring counter is similar to the ring counter, but the serial input is the complement of the serial output. List the sequence of states after each right shift until the register returns to 1001 Register content 1001  A) 0101, 1011, 1100, 0111, 1010, 0100, 0011, 1001  B) 1100, 0110, 0011, 1001  C) 0100, 1010, 1101, 0110, 1011, 0101, 0010, 1001  D) 1100, 0010, 0101, 1110, 0011, 1101, 1010, 1001 Registers 15 admission.edhole.com
  • 16. Serial data transfer  One application of shift registers is converting between “serial data” and “parallel data.”  Computers typically work with multiple-bit quantities.  ASCII text characters are 8 bits long.  Integers, single-precision floating-point numbers, and screen pixels are up to 32 bits long.  But sometimes it’s necessary to send or receive data serially, or one bit at a time. Some examples include:  Input devices such as keyboards and mice.  Output devices like printers.  Any serial port, USB or Firewire device transfers data serially.  Recent switch from Parallel ATA to Serial ATA in hard drives. Registers 16 admission.edhole.com
  • 17. Receiving serial data  To receive serial data using a shift register:  The serial device is connected to the register’s SI input.  The shift register outputs Q3-Q0 are connected to the computer.  The serial device transmits one bit of data per clock cycle.  These bits go into the SI input of the shift register.  After four clock cycles, the shift register will hold a four-bit word.  The computer then reads all four bits at once from the Q3-Q0 outputs. Registers 17 serial device computer admission.edhole.com
  • 18. Sending data serially  To send data serially with a shift register, you do the opposite:  The CPU is connected to the register’s D inputs.  The shift output (Q3 in this case) is connected to the serial device.  The computer first stores a four-bit word in the register, in one cycle.  The serial device can then read the shift output.  One bit appears on Q3 on each clock cycle.  After four cycles, the entire four-bit word will have been sent. serial device Registers 18 computer admission.edhole.com
  • 19. Registers in Modern Hardware • Registers store data in the CPU • Used to supply values to the ALU. • Used to store the results. • If we can use registers, why bother with RAM? CPU GPR's Size L1 Cache L2 Cache Pentium 4 8 32 bits 8 KB 512 KB Athlon XP 8 32 bits 64 KB 512 KB Athlon 64 16 64 bits 64 KB 1024 KB PowerPC 970 (G5) 32 64 bits 64 KB 512 KB Itanium 2 128 64 bits 16 KB 256 KB MIPS R14000 32 64 bits 32 KB 16 MB Answer: Registers are expensive! • Registers occupy the most expensive space on a chip – the core. • L1 and L2 cache are very fast RAM – but not as fast as registers. Registers 19 Dunnington. Source INtel admission.edhole.com
  • 20. Shift versus Multiply and Divide  You can multiply by powers of two by shifting to the left  A left shift by n is equivalent to multiplying by 2n  Example:  3 * 2 = 6; 3*22 = 12  0011 << 1 = 0110; 0011 << 2 = 1100  You can divide by powers of two by shifting to the right  A right shift by n is equivalent to dividing by 2n  Example  8 / 2 = 4; 8 / 22 = 2; 4 / 2= 2; -4 / 2 = -2  1000 >> 1 = 0100; 1000 >> 2 = 0010; 0100 >> 1 = 0010; 1100 >> 1= 1110 -4 en two’s complement -2 en two’s complement Registers 20 admission.edhole.com
  • 21. Why should I user shift instead of multiply? Program 1: Multiplication #include .. main() { scanf(“%d”,&mul); start = _rdtsc(); for (i=0;i<60;i++){ b=b*mul; } end = _rdtsc(); printf("It took %llu cyclesn", end-start); return 0; } Output: It took 1056 cycles Program 2:Shift #include .. main() { scanf(“%d”,&mul); start = _rdtsc(); for (i=0;i<60;i++){ b=b << mul; } end = _rdtsc(); printf("It took %llu cyclesn", end-start); return 0; } Output: It took 896 cycles Registers 21 admission.edhole.com
  • 22. Why should I user shift instead of integer division? Program 1: Division #include .. main() { scanf(“%d”,&mul); start = _rdtsc(); for (i=0;i<60;i++){ b=b/mul; } end = _rdtsc(); printf("It took %llu cyclesn", end-start); return 0; } Output: It took 29328 cycles Program 2:Shift #include .. main() { scanf(“%d”,&mul); start = _rdtsc(); for (i=0;i<60;i++){ b=b >> mul; } end = _rdtsc(); printf("It took %llu cyclesn", end-start); return 0; } Output: It took 912 cycles Registers 22 admission.edhole.com
  • 23. Registers summary  A register is a special state machine that stores multiple bits of data.  Several variations are possible:  Parallel loading to store data into the register.  Shifting the register contents either left or right.  Counters are considered a type of register too!  One application of shift registers is converting between serial and parallel data.  Most programs need more storage space than registers provide.  We’ll introduce RAM to address this problem.  Registers are a central part of modern processors, as we will see in coming weeks. Registers 23 admission.edhole.com