Complex instruction set computer ppt
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This document provides an overview of complex instruction set computers (CISC). It defines CISC as having a microprocessor architecture that aims to achieve complex operations with single instructions and favors instruction set richness over speed of individual instructions. It discusses typical CISC architectures like x86, characteristics like variable length instructions and powerful assembly instructions. It also covers addressing modes, performance considerations, pros and cons of CISC, and recent developments like explicitly parallel instruction computing (EPIC) being a potential future of CISC and RISC architectures.
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10111010100011110101001011011010
Two major schools of ISA: CISC & RISC.
5. CISC Philosophy (Complex Instruction Set Computing). The primary goal is to complete a task in as few lines as possible. Used on PCs and laptops that need to process heavy graphics and computations. Each instruction consist of one step.
(ex: MULT 2:3, 5:2, load the two values into registers, multiplies the operands, and then stores the product in appropriate register).
6. CISC Pros & Cons. Instruction size is different from one operation to another. Operation size is smaller but no of cycles are more. Needs better hardware and powerful processing. Performance is slow due to the amount of clock time taken by different instructions.
7. RISC Philosophy (Reduced Instruction Set Computing). Use only simple instructions that can be executed within one clock cycle. Keep all instructions of same size. Allow only load/store instruction to access the memory.
(ex: MULT command divided into three separate commands: LOAD, PROD, and STORE).
8. RISC Pros & Cons. Allow free use of microprocessors space because of its simplicity. Needs large memory caches on the chip itself so require very fast memory. Give support for high level languages (like C, C++, Java). Performance depends on the programmer or compiler.
9. CPU Performance Equation. The following equation is commonly used for expressing a computer's performance ability:
퐶푃푈 푇푖푚푒=푆푒푐표푛푑푠/푃푟표푔푟푎푚=퐼푛푠푡푟푢푐푡푖표푛푠/푃푟표푔푟푎푚 푥 퐶푦푐푙푒푠/퐼푛푠푡푟푢푐푡푖표푛푠 푥 푆푒푐표푛푑푠/퐶푦푐푙푒
CISC minimize the number of instructions per program.
RISC does the opposite, reduce the cycles per instruction.
10. Summary.
Instruction Set Architecture
Instruction Set ArchitectureJaffer Haadi The document discusses instruction set architecture (ISA), which defines the interface between software and hardware. It describes ISA as specifying storage locations, operations, and how to invoke and access them. The document then compares ISA to human language and discusses program compilation. It outlines the basic instruction execution model of fetching, decoding, executing and writing instructions. The document also describes different types of instruction sets like stack, accumulator and register-set architectures. Finally, it contrasts complex instruction set computers (CISC) with reduced instruction set computers (RISC).
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Complex instruction set computer ppt
- 1. G. H. RAISONI COLLEGE OF ENGINEERING AND MANAGEMENT, WAGHOLI, PUNE Present by: Venkatesh pensalwar (SCOB20) Omkar sawant (SCOB24) Guided By: Prof. Padma Kartik Subject: CAO Topic :complexinstructionsetcomputer
- 2. INDEX • What is CISC • Architecture • Typical x86 design • Characteristics • Addressing modes • The Performance Equation • CISC pros and cons • Recent Developments & Future Scope • Resources • end
- 3. WHAT IS CISC? • Definition: Pronounced "sisk" and standing for Complex Instruction Set Computer, is a Microprocessor Architecture that aims at achieving complex operations with single instructions and favors the richness of the instruction set (typically as many as 200 unique instructions) over the speed with which individual instructions are executed.
- 5. CHARACTERISTICS o CISC are Mostly Von Neumann Architecture (There are few exceptions) o Same bus for program memory, data memory, I/O, registers, etc o Generally Micro-coded ,Variable length instructions o Segmentation is possible with Segment Register s like DS, ES and an offset which can be common to all segments. o Many powerful instructions are supported, making the assembly language programmer’s job much easier. o Physical Memory Extension Possible
- 6. ADDRESSING MODES o Register Addressing Mode o Memory Addressing Modes o Displacement Only Addressing Mode o Register Indirect Addressing Modes o Indexed Addressing Modes o Based Indexed Addressing Modes o Based Indexed Plus Displacement Addressing
- 7. THE PERFORMANCE EQUATION The following equation is commonly used for expressing a computer's performance ability: 1 2 The CISC approach • minimizes the number of instructions per program (2) • sacrificing the number of cycles per instruction. (1)
- 8. CISC PROS & CONS The advantages of CISC • Microprogramming is as easy as assembly language to implement, and much less expensive than hardwiring a control unit. • As each instruction became more capable, fewer instructions could be used to implement a given task. This made more efficient use of the relatively slow main memory. The disadvantages of CISC • Earlier generations of a processor family generally were contained as a subset in every new version --- so instruction set & chip hardware become more complex with each generation of computers. • individual instructions could be of almost any length---this means that different instructions will take different amounts of clock time to execute, slowing down the overall performance of the machine.
- 9. RECENT DEVELOPMENTS & FUTURE SCOPE EPIC : The biggest threat for CISC and RISC might not be each other, but a new technology called EPIC. EPIC stands for Explicitly Parallel Instruction Computing. EPIC can do many instruction executions in parallel to one another. EPIC is a created by Intel and is in a way a combination of both CISC and RISC. This will in theory allow the processing of Windows-based as well as UNIX-based applications by the same CPU. Intel is working on it under code-name Merced. Microsoft is already developing their Win64 standard for it. Like the name says, Merced will be a 64-bit chip.
- 11. Thank you