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Computer architecture addressing modes and formats
- 1. + Addressing modes and formats Submitted by Haitham
- 2. + Addressing Modes Immediate Direct Indirect Register Register indirect Displacement Stack The address field or fields in a typical instruction format are relatively small. We would like to be able to reference a large range of locations in main memory or, for some systems, virtual memory. To achieve this objective, a variety of addressing techniques has been employed
- 3. + Effective address Usefulness of addressing modes • virtually all computer architectures provide more than one of these addressing modes. • To reduce the period the implementation of programs the effective address (EA). In a system without virtual memory, the effective address will be either a main memory address or a register. In a virtual memory system the effective address is a virtual address or a register.
- 4. + Relationship ( CISC) and (RISC) of addressing modes Complex Instruction Set Computer (CISC) designs provide a large number of addressing modes. The main motivations are (1) To support complex data structures (2) To provide flexibility to access operands Reduced Instruction Set Computer(RISC) Typically, a RISC machine, unlike a CISC machine, uses a simple and relatively straightforward set of addressing modes.
- 5. + Immediate Addressing Simplest form of addressing Operand = A Operand is part of instruction Operand = address field e.g. ADD 5 Add 5 to contents of accumulator 5 is operand No memory reference to fetch data Fast Limited range
- 7. + Direct Addressing Simple form of addressing Address field contains address of operand Effective address (EA) = address field (A) e.g. ADD A Add contents of cell A to accumulator Look in memory at address A for operand Single memory reference to access data No additional calculations to work out effective address Limited address space
- 8. + Direct Addressing Diagram Address AOpcode Instruction Memory Operand
- 9. + Indirect Addressing Reference to the address of a word in memory which contains a full-length address of the operand EA = (A) Parentheses are to be interpreted as meaning contents of Advantage: For a word length of N an address space of 2N is now available Disadvantage: Instruction execution requires two memory references to fetch the operand One to get its address and a second to get its value
- 10. + Indirect Addressing Diagram Address AOpcode Instruction Memory Operand Pointer to operand
- 11. + Register (Direct) Addressing Address field refers to a register rather than a main memory address EA = R Limited number of registers Very small address field needed Shorter instructions Faster instruction fetch No memory access Very limited address space Multiple registers helps performance
- 12. + Register Addressing Diagram Register Address ROpcode Instruction Registers Operand
- 13. + Register Indirect Addressing Analogous to indirect addressing The only difference is whether the address field refers to a memory location or a register EA = (R) Large address space (2n) One fewer memory access than indirect addressing
- 14. + Register Address ROpcode Instruction Memory OperandPointer to Operand Registers Register Indirect Addressing Diagram
- 15. + Displacement Addressing Combines the capabilities of direct addressing and register indirect addressing EA = A + (R) Requires that the instruction have two address fields, at least one of which is explicit The value contained in one address field (value = A) is used directly The other address field refers to a register whose contents are added to A to produce the effective address Most common uses: Relative addressing Base-register addressing Indexing
- 16. + Displacement Addressing Diagram Register ROpcode Instruction Memory OperandPointer to Operand Registers Address A +
- 17. + Relative Addressing The implicitly referenced register is the program counter (PC) The next instruction address is added to the address field to produce the EA Typically the address field is treated as a twos complement number for this operation Thus the effective address is a displacement relative to the address of the instruction R = Program counter, PC EA = A + (PC) PC contains the main address EA = PC+ D-address Operand = D-address PC + D-address = Data
- 18. + Base-Register Addressing A holds displacement R holds pointer to base address R may be explicit or implicit e.g. segment registers in 80x86
- 19. + Indexed Addressing The address field references a main memory address and the referenced register contains a positive displacement from that address The method of calculating the EA is the same as for base-register addressing Autoindexing Automatically increment or decrement the index register after each reference to it EA = A + (R) (R) (R) + 1 Postindexing Indexing is performed after the indirection EA = (A) + (R) Preindexing Indexing is performed before the indirection EA = (A + (R))
- 20. + A = base R = displacement EA = A + R Good for accessing arrays EA = A + R R++ Indexed Addressing
- 21. + Stack Addressing A stack is a linear array of locations Sometimes referred to as a pushdown list or last-in-first-out queue A stack is a reserved block of locations Items are appended to the top of the stack so that the block is partially filled Associated with the stack is a pointer whose value is the address of the top of the stack The stack pointer is maintained in a register Thus references to stack locations in memory are in fact register indirect addresses Is a form of implied addressing The machine instructions need not include a memory reference but implicitly operate on the top of the stack
- 22. + Autoincrement /Autodecrement Mode A special case of indirect register mode. The register whose number is included in the instruction code, contains the address of the operand. Autoincrement Mode = after operand addressing , the contents of the register is incremented. Decrement Mode = before operand addressing, the contents of the register is decrement. load reg baes (Effective address = contents of base register)
- 23. + Pentium Addressing Modes Virtual or effective address is offset into segment Starting address plus offset gives linear address 12 addressing modes available Immediate Register operand Displacement Base Base with displacement Scaled index with displacement Base with index and displacement Base scaled index with displacement Relative
- 24. Pentium Addressing Mode Calculation
- 25. + PowerPC Addressing Modes Load/store architecture Indirect Instruction includes 16 bit displacement to be added to base register (may be GP register) Can replace base register content with new address Indirect indexed Instruction references base register and index register (both may be GP) EA is sum of contents Branch address Absolute Relative Indirect Arithmetic Operands in registers or part of instruction
- 26. + PowerPC Memory Operand Addressing Modes