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PRESENTATIONTOPICS :1. COMPUTER INSTRUCTIONS.2.TIMING & CONTROL.3. INSTRUCTION CYCLE.BY :- PAAWAN GUPTA109-38126B.SC.(C.SCIENCE)2ND YEAR
Computer  InstructionsThe basic computer has three instruction code formats which are :-MEMORY- REFERENCE INSTRUCTION           A memory – reference instruction uses 12 bits to specify an address and 1 bit to specify the addressing mode I. I is equal to 0 for direct address and to 1 for indirect addressREGISTER- REFERENCE INSTRUCTION        A  register reference instruction specifies an operation on or a test of the AC register .An operand from the memory is not needed therefore the other 12 bits are used to specify the operation to be executed.INPUT-OUTPUT INSTRUCTION      An input-output instruction does not need a reference to memory and is recognized by operational code 111 with a 1 in the left most bit of the instruction the remaining 12 bits are used to specify the type of input output operation or test performed.
15 12 110Register operation0    1    1    115 12 110I/O operation1    1    1    1 Basic Computer Instruction FormatMemory-Reference Instructions 	(OP-code = 000 ~ 110)15     1412 110OpcodeAddressIRegister-Reference Instructions 	(OP-code = 111, I = 0) Input-Output Instructions		(OP-code =111, I = 1)
Basic Computer Instruction 15  14           12    11                                            0 15  14           12    11                                            0 15  14           12    11                                            0I    Opcode                 Address0    1    1    1         Register Operation1    1    1    1            I/O  Operation3 Instruction Code Formats :Memory-reference instruction
Register-reference instruction
Input-Output instructionI=0 : Direct,  I=1 : Indirect
INSTRUCTION  SET  COMPLETENESSA computer should have a set of instructions so that the user can construct machine language programs to evaluate any function that is known to be computable.Instruction Types :-
Functional Instructions      - Arithmetic, logic, and shift instructions		      - ADD, CMA, INC, CIR, CIL, AND, CLATransfer Instructions      - Data transfers between the main memory 		and the processor registers	      - LDA, STAControl Instructions      - Program sequencing and control		      - BUN, BSA, ISZInput/OutputInstructions      - Input and output      - INP, OUT
The timing for all register in basic computer is controlled by a master clock generator.Clock pulses – The clock pulses are applied to all flip-flops and   registers in the system , including the flip-flops in the control unit . The clock pulses do not change the state of a register unless the register is unable by a control signal. There are two types of control organisations  :-Hardwired control – In hardwired organization, the control logic is implemented with gates , flip-flops , decoders , and other digital circuits. It has the advantage that it can be optimized to produce a fast mode of operation.2. Microprogramme control– The control information is stored in the control memory . The control memory is programmed to initiate the required sequence of microperations. TIMING AND CONTROLTIMING  AND  CONTROLControl unit of Basic ComputerInstruction register (IR)14    13    121511 - 0Other inputs3 x 8decoder 7  6 5 4 3  2 1 0D0CombinationalControllogicIDControlsignals7T15T015   14  . . . .  2  1  04 x 16decoderIncrement (INR)4-bitsequenceClear (CLR)counterClock(SC)
INSTRUCTION CYCLEIn basic computer each instruction cycle consist of following phases:-1.   Fetch an instruction from the memory.2.   Decode the instruction. 3.   Read the effective address from the memory if the instruction has an indirect address. 4.   Execute the instruction.Fetch & decode ->Initially, the PC is loaded with the address of the  first incrementer in the program.      The SC(sequence counter) is cleared to 0,providing a decoded time signal T0.After each clock pulse ,SC is incremented by1 so that the timing go through a sequenceT0,T1,T3 and so on . The microperations for fetch & decode phases are:-                   T0: AR<-PC                   T1: IR<-M[AR],PC<-PC+1                   T2: D0…..,D7<-Decode IR(12-14),AR<-IR(0-11),I<-IR(15)
FETCH and DECODE• Fetch and DecodeT0: AR PC  (S0S1S2=010, T0=1)T1: IR  M [AR],  PC  PC + 1   (S0S1S2=111, T1=1)T2: D0, . . . , D7 Decode IR(12-14), AR  IR(0-11), I  IR(15)T1S2BusT0S1S0Memory7unitAddressReadAR1LDPC2INRIR5LDClockCommon bus
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Computer instruction

  • 1. PRESENTATIONTOPICS :1. COMPUTER INSTRUCTIONS.2.TIMING & CONTROL.3. INSTRUCTION CYCLE.BY :- PAAWAN GUPTA109-38126B.SC.(C.SCIENCE)2ND YEAR
  • 2. Computer InstructionsThe basic computer has three instruction code formats which are :-MEMORY- REFERENCE INSTRUCTION A memory – reference instruction uses 12 bits to specify an address and 1 bit to specify the addressing mode I. I is equal to 0 for direct address and to 1 for indirect addressREGISTER- REFERENCE INSTRUCTION A register reference instruction specifies an operation on or a test of the AC register .An operand from the memory is not needed therefore the other 12 bits are used to specify the operation to be executed.INPUT-OUTPUT INSTRUCTION An input-output instruction does not need a reference to memory and is recognized by operational code 111 with a 1 in the left most bit of the instruction the remaining 12 bits are used to specify the type of input output operation or test performed.
  • 3. 15 12 110Register operation0 1 1 115 12 110I/O operation1 1 1 1 Basic Computer Instruction FormatMemory-Reference Instructions (OP-code = 000 ~ 110)15 1412 110OpcodeAddressIRegister-Reference Instructions (OP-code = 111, I = 0) Input-Output Instructions (OP-code =111, I = 1)
  • 4. Basic Computer Instruction 15 14 12 11 0 15 14 12 11 0 15 14 12 11 0I Opcode Address0 1 1 1 Register Operation1 1 1 1 I/O Operation3 Instruction Code Formats :Memory-reference instruction
  • 6. Input-Output instructionI=0 : Direct, I=1 : Indirect
  • 7. INSTRUCTION SET COMPLETENESSA computer should have a set of instructions so that the user can construct machine language programs to evaluate any function that is known to be computable.Instruction Types :-
  • 8. Functional Instructions - Arithmetic, logic, and shift instructions - ADD, CMA, INC, CIR, CIL, AND, CLATransfer Instructions - Data transfers between the main memory and the processor registers - LDA, STAControl Instructions - Program sequencing and control - BUN, BSA, ISZInput/OutputInstructions - Input and output - INP, OUT
  • 9. The timing for all register in basic computer is controlled by a master clock generator.Clock pulses – The clock pulses are applied to all flip-flops and registers in the system , including the flip-flops in the control unit . The clock pulses do not change the state of a register unless the register is unable by a control signal. There are two types of control organisations :-Hardwired control – In hardwired organization, the control logic is implemented with gates , flip-flops , decoders , and other digital circuits. It has the advantage that it can be optimized to produce a fast mode of operation.2. Microprogramme control– The control information is stored in the control memory . The control memory is programmed to initiate the required sequence of microperations. TIMING AND CONTROLTIMING AND CONTROLControl unit of Basic ComputerInstruction register (IR)14 13 121511 - 0Other inputs3 x 8decoder 7 6 5 4 3 2 1 0D0CombinationalControllogicIDControlsignals7T15T015 14 . . . . 2 1 04 x 16decoderIncrement (INR)4-bitsequenceClear (CLR)counterClock(SC)
  • 10. INSTRUCTION CYCLEIn basic computer each instruction cycle consist of following phases:-1. Fetch an instruction from the memory.2. Decode the instruction. 3. Read the effective address from the memory if the instruction has an indirect address. 4. Execute the instruction.Fetch & decode ->Initially, the PC is loaded with the address of the first incrementer in the program. The SC(sequence counter) is cleared to 0,providing a decoded time signal T0.After each clock pulse ,SC is incremented by1 so that the timing go through a sequenceT0,T1,T3 and so on . The microperations for fetch & decode phases are:- T0: AR<-PC T1: IR<-M[AR],PC<-PC+1 T2: D0…..,D7<-Decode IR(12-14),AR<-IR(0-11),I<-IR(15)
  • 11. FETCH and DECODE• Fetch and DecodeT0: AR PC (S0S1S2=010, T0=1)T1: IR  M [AR], PC  PC + 1 (S0S1S2=111, T1=1)T2: D0, . . . , D7 Decode IR(12-14), AR  IR(0-11), I  IR(15)T1S2BusT0S1S0Memory7unitAddressReadAR1LDPC2INRIR5LDClockCommon bus
  • 12. REGISTER REFERENCE INSTRUCTIONSRegister Reference Instructions are identified when- D7 = 1, I = 0- Register Ref. Instr. is specified in b0 ~ b11 of IR- Execution starts with timing signal T3r = D7 IT3 => Register Reference InstructionBi = IR(i) , i=0,1,2,...,11 r: SC  0CLA rB11: AC  0CLE rB10: E  0CMA rB9: AC  AC’CME rB8: E  E’CIR rB7: AC  shr AC, AC(15)  E, E  AC(0)CIL rB6: AC  shl AC, AC(0)  E, E  AC(15)INC rB5: AC  AC + 1SPA rB4: if (AC(15) = 0) then (PC  PC+1)SNA rB3: if (AC(15) = 1) then (PC  PC+1)SZA rB2: if (AC = 0) then (PC  PC+1)SZE rB1: if (E = 0) then (PC  PC+1)HLT rB0: S  0 (S is a start-stop flip-flop)