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Computer Architecture & Assembly Language
SubmittedTo: Shweta Singh ma’am
Submitted By: Sheetal Singh
BCA 2nd year
1590409046
Instruction Cycle
INSTRUCTION CYCLE
• A instruction cycle(sometimes called fetch decode cycle)
• It is basic operational process of computer
in which a computer retrieves a program instruction
from its memory that determines what actions
the instruction dictates and carries out those action
FETCH
INDIRECT
EXECUTE
INTERUPT
COMPONENT OF INSTRUCTION CYCLE
• PROGRAM COUNTER (PC)
• MEMORY ADDRESS REGISTER (MAR)
• MEMORY DATA REGISTER (MDR)
• INSTRUCTION REGISTER (IR)
• CONTROL UNIT (CU)
• ARITHEMETIC LOGIC UNIT (ALU)
Flow chart of instruction cycle
instruction cycle ppt
STEPS OF INSTRUCTION CYCLE
•Fetch the Instruction:The next instruction is fetched
from the memory address that is currently stored in
the program counter (PC), and stored in the instruction
register(IR).
•Decode the Instruction: During this cycle the encoded
instruction present in the IR (instruction register) is
interpreted by the decoder..
•Read the Effective Address:
Direct Memory Instruction - Nothing is being done in clock
plus.
Indirect Memory Instruction -The effective address is
being read from the memory.
•Execute the Instruction:The control unit of the CPU passes
the decoded information as a sequence of control signals to
the relevant function units of the CPU to perform the
actions required by the instruction.
instruction cycle ppt

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instruction cycle ppt

  • 1. Computer Architecture & Assembly Language SubmittedTo: Shweta Singh ma’am Submitted By: Sheetal Singh BCA 2nd year 1590409046
  • 3. INSTRUCTION CYCLE • A instruction cycle(sometimes called fetch decode cycle) • It is basic operational process of computer in which a computer retrieves a program instruction from its memory that determines what actions the instruction dictates and carries out those action FETCH INDIRECT EXECUTE INTERUPT
  • 4. COMPONENT OF INSTRUCTION CYCLE • PROGRAM COUNTER (PC) • MEMORY ADDRESS REGISTER (MAR) • MEMORY DATA REGISTER (MDR) • INSTRUCTION REGISTER (IR) • CONTROL UNIT (CU) • ARITHEMETIC LOGIC UNIT (ALU)
  • 5. Flow chart of instruction cycle
  • 7. STEPS OF INSTRUCTION CYCLE •Fetch the Instruction:The next instruction is fetched from the memory address that is currently stored in the program counter (PC), and stored in the instruction register(IR). •Decode the Instruction: During this cycle the encoded instruction present in the IR (instruction register) is interpreted by the decoder..
  • 8. •Read the Effective Address: Direct Memory Instruction - Nothing is being done in clock plus. Indirect Memory Instruction -The effective address is being read from the memory. •Execute the Instruction:The control unit of the CPU passes the decoded information as a sequence of control signals to the relevant function units of the CPU to perform the actions required by the instruction.