Instruction level parallelism
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This document discusses instruction level parallelism (ILP) and how it can be used to improve performance by overlapping the execution of instructions through pipelining. ILP refers to the potential overlap among instructions within a basic block. Factors like dynamic branch prediction and compiler dependence analysis can impact the ideal pipeline CPI and number of data hazard stalls. Loop level parallelism refers to the parallelism available across iterations of a loop. Data dependencies between instructions, if not properly handled, can limit parallelism and require instructions to execute in order. The three types of data dependencies are data, name, and control dependencies.
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![Loop Level parallelism(LLP)
• The amount of parallel is available instruction
to interaction of loop is called LLP.
• Example:
for(i=1;i<=1000;i=i+1)
x[i]=x[i]+y[i];
• Loop either – statically by the compiler
dynamically by the hardware](https://image.slidesharecdn.com/instructionlevelparallelism-160119053456/85/Instruction-level-parallelism-4-320.jpg)
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physiology and Regulation of pulse
Characteristics of pulse
factors affecting pulse
Sites of pulse
Alteration of pulse
for BSC Nursing 1st semester
for Gnm Nursing 1st year
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Instruction level parallelism
- 1. Advanced Computer Architecture Instruction Level Parallelism By S.Divya M.E/CSE
- 2. Instruction Level Parallelism(IPL) • It uses pipelining to overlap the execution of instructions and improve performance. • This potential overlap among instruction is called ILP. • Pipeline CPI=ideal pipeline CPI + Structural stall + Data Hazard Stall + Control stall
- 3. What is ILP? • The amount of parallelism available with in a basic block. • EXAMPLE: • Dynamic branch predication=control stall • Compiler dependence analysis=Ideal CPI,data hazard stall
- 4. Loop Level parallelism(LLP) • The amount of parallel is available instruction to interaction of loop is called LLP. • Example: for(i=1;i<=1000;i=i+1) x[i]=x[i]+y[i]; • Loop either – statically by the compiler dynamically by the hardware
- 5. Data dependence and Hazard • It two instruction is not parallel & must be executed in order , though they may be partialy overlapped • There are three type of dependence. Data dependence Name dependence Control dependence
- 6. Contd… • Data dependence: • The data dependence is called True data dependence. • Instruction i produces a result that may be used by instruction j.
- 7. Example • Loop: L.D F0,0(R1) ; F0=Array element ADD.D F4,F0,F2 ; add scalar in F2 S.D F4,0(R1) ;store result • So data dependence they can’t execute simultaneously or be completely overlapped.
- 8. Name dependence • It occurs when two instruction use the same register or memory location is called name dependence. • They are two types: • Anti dependence - j write after i read • Output dependence – j write before i read
- 9. Data hazard • Data hazard may be classified as one of three types , depending on the order of read and write accesses in the instruction. RAW(read after write) WAW(write after write) WAR(write after read)