INTERFACING2 [Autosaved] interfacing in Computer system

• Whether simple or complex, every
microprocessor-based system has a memory
system. The Intel family of microprocessors is no
different from any other in this respect. Almost
all systems contain two main types of memory:
read-only memory (ROM) and random access
memory (RAM) or read/write memory.
Read-only memory contains system software
and permanent system data, while RAM
contains temporary data and application
software

Memory Pin Connections
• Pin connections common to all memory
devices are the address inputs, data outputs
or input/outputs, some type of selection
input, and at least one control input used to
select a read or write operation

Address Connections
• All memory devices have address inputs that select
a memory location within the memory device.
Address inputs are almost always labeled from A0,
the least significant address input, to An where
subscript n can be any value but is always labeled
as one less than the total number of address pins.
For example, a memory device with 10 address
pins has its address pins labeled from A0 to A9.
The number of address pins found on a memory
device is determined by the number of memory
locations found within it

• Today, the more common memory devices have between 1K
(1024) to 1G (1,073,741,824) memory locations, with 4G
and larger memory location devices on the horizon.
A 1K memory device has 10 address pins (A0–A9);
therefore, 10 address inputs are required to select any of its
1024 memory locations. It takes a 10-bit binary number
(1024 different combinations) to select any single location
on a 1024-location device.

If a memory device has 11 address connections (A0–
A11), it has 2048 (2K) internal memory locations. The
number of memory locations can thus be extrapolated
from the number of address pins.
• For example, a 4K memory device has 12 address
connections, an 8K device has 13, and so forth. A device
that contains 1M locations requires a 20-bit address
(A0–A19).

Data Connections.
• All memory devices have a set of data outputs or
input/outputs. The device illustrated in Figure 10–
1 has a common set of input/output (I/O)
connections.
Today, many memory devices have bidirectional
common I/O pins.
• The data connections are the points at which data
are entered for storage or extracted for reading.
Data pins on memory devices are labeled D0
through D7 for an 8-bit-wide memory device

• In this sample memory device there are 8 I/O connections, meaning
that the memory device stores 8 bits of data in each of its memory
locations. An 8-bit-wide memory device is often called a byte-wide
memory.
• Although most devices are currently 8 bits wide, some devices
are 16 bits, 4 bits, or just 1 bit wide. Catalog listings of memory devices
often refer to memory locations times bits per location.
• For example, a memory device with 1K memory locations and 8 bits in
each location is often listed as a 1K × 8 by the manufacturer
• A 16K × 1 is a memory device containing 16K 1-bit memory locations.
Memory devices are often classified according to total bit capacity. For
example, a 1K × 8-bit memory device is sometimes listed as an 8K
memory device, or a 64K × 4 memory is listed as a 256K device. These
variations occur from one manufacturer to another

Selection Connections
• Each memory device has an input—sometimes more than
one—that selects or enables the memory device. This type
of input is most often called a chip select(CS ), chip enable
(CE ), or simply select (S ) input.
• RAM memory generally has at least one CS or S input, and
ROM has at least one CE. If the CE,CS , or S input is active (a
logic 0, in this case, because of the over bar),
• the memory device performs a read or write operation; if it
is inactive (a logic 1, in this case), the memory device cannot
do a read or a write because it is turned off or disabled. If
more than one CS connection is present, all must be
activated to read or write data.

Control Connections
• All memory devices have some form of control input or
inputs. A ROM usually has only one control input, while a
RAM often has one or two control inputs.
• The control input most often found on a ROM is the
output enable (OE ) or gate ( g) connection, which allows
data to flow out of the output data pins of the ROM.
• If OE and the selection input ( CE) are both active, the
output is enabled; if OE is inactive, the output is disabled
at its high-impedance state.
• The OE connection enables and disables a set of three-
state buffers located within the memory device and must
be active to read data.

ADDRESS DECODING
• In order to attach a memory device to the
microprocessor, it is necessary to decode the
address
sent from the microprocessor. Decoding makes
the memory function at a unique section or
partition of the memory map.
Without an address decoder, only one memory
device can be connected to a microprocessor,
which would make it virtually useless.

Why Decode Memory?
• When the 8088 microprocessor is compared to the 2716 EPROM, a
difference in the number of address connections is apparent—the
EPROM has 11 address connections and the microprocessor has 20.
• This means that the microprocessor sends out a 20-bit memory address
whenever it reads or writes data. Because the EPROM has only 11
address pins, there is a mismatch that must be corrected. If only 11 of
the 8088’s address pins are connected to the memory, the 8088 will see
only 2K bytes of memory instead of the 1M bytes that it “expects” the
memory to contain.
• The decoder corrects the mismatch by decoding the address pins that do
not connect to the memory component.

Interfacing Flash Memory
• Flash memory (EEPROM) is becoming commonplace for storing
setup information on video cards, as well as for storing the
system BIOS in the personal computer. It even finds application
in MP3 audio players and USB pen drives. Flash memory is also
found in many other applications to store information that is
only changed occasionally.
• The only difference between a flash memory device and SRAM is
that the flash memory device requires a 12V programming
voltage to erase and write new data.
• The 12V can be available either at the power supply or a 5V to
12V converter designed for use with flash memory can be
obtained. The newest versions of flash memory are erased with
a 5.0V or even a 3.3V signal so that a converter is not needed.

• EEPROM is available as either a memory
device with a parallel interface or as devices
that are serial. The serial device is extremely
small and is not suited for memory expansion,
but as an I/O device it can store information
such as in a flash drive.

Basic I/O Interface
• A microprocessor is great at solving problems,
but if it can’t communicate with the outside
world, it is of little worth. In this section of the
text I/O instructions (IN, INS, OUT, and OUTS)
are explained. Also explained here is the
concept of isolated (sometimes called direct
orI/O mapped I/O) and memory-mapped I/O,
the basic input and output interfaces, and
handshaking.

The I/O Instructions
• The instruction set contains one type of
instruction that transfers information to an I/O
device(OUT) and another to read information
from an I/O device (IN). Instructions (INS and
OUTS, found on all versions except the
8086/8088) are also provided to transfer
strings of data between the memory and an
I/O device.

• Instructions that transfer data between an I/O device and the
microprocessor’s accumulator (AL, AX, or EAX) are called IN
and OUT.
• The I/O address is stored in register DX as a 16-bit I/O
address or in the byte (p8) immediately following the opcode
as an 8-bit I/O address.
• Intel calls the 8-bit form (p8) a fixed address because it is
stored with the instruction, usually in a ROM. The 16-bit I/O
address in DX is called a variable address because it is stored
in a DX, and then used to address the I/O device. Other
instructions that use DX to address I/O are the INS and OUTS
instructions.
• I/O ports are 8 bits in width so whenever a 16-bit port is
accessed two consecutive 8-bit ports are actually addressed.

Isolated and Memory-Mapped I/O
• There are two different methods of interfacing I/O to the
microprocessor: isolated I/O and memory-mapped I/O.
• In the isolated I/O scheme, the IN, INS, OUT, and OUTS
instructions transfer data between the microprocessor’s
accumulator or memory and the I/O device.
• In the memory-mapped I/O scheme, any instruction
that references memory can accomplish the transfer.
• Both isolated and memory-mapped I/O are in use.
• The PC does not use memory-mapped I/O.

Isolated I/O.
• The most common I/O transfer technique used in the
Intel microprocessor-based system is isolated I/O.
• The term isolated describes how the I/O locations are
isolated from the memory system in a separate I/O
address space.
• (Figure11-1 isolated and memory-mapped address)
• The addresses for isolated I/O devices, called ports, are
separate from the memory. Because the ports are
separate, the user can expand the memory to its full
size without using any of memory space for I/O
devices.

• A disadvantage of isolated I/O is that the data transferred between
I/O and the microprocessor must be accessed by the IN, INS, OUT,
and OUTS instructions.
• Separate control signals for the I/O space are developed (using
M/IO and W/R ), which indicate an I/O read (IORC ) or an I/O write
( IOWC) operation. These signals indicate that an I/O port address,
which appears on the address bus, is used to select the I/O device.
• In the personal computer, isolated I/O ports are used for
controlling peripheral devices. An 8-bit port address is used to
access devices located on the system board, such as the timer and
keyboard interface, while a 16-bit port is used to access serial and
parallel ports as well as video and disk drive systems.

Memory-Mapped I/O.
• Unlike isolated I/O, memory-mapped I/O does not use the IN, INS,
OUT, or OUTS instructions. Instead, it uses any instruction that
transfers data between the microprocessor and memory. A
memory-mapped I/O device is treated as a memory location in the
memory map.
• The main advantage of memory-mapped I/O is that any memory
transfer instruction can be used to access the I/O device. The main
disadvantage is that a portion of the memory system is used as the
I/O map. This reduces the amount of memory available to
applications.
• Another advantage is that the and signals have no function in a
memory mapped I/O system and may reduce the amount of
circuitry required for decoding.

Handshaking
• Many I/O devices accept or release information at a much
slower rate than the microprocessor.
• Another method of I/O control, called handshaking or
polling, synchronizes the I/O device with the microprocessor.
• An example of a device that requires handshaking is a parallel
printer that prints a few hundred characters per second
(CPS).
• It is obvious that the microprocessor can send more than a
few hundred CPS to the printer, so a way to slow the
microprocessor down to match speeds with the printer must
be developed

I/O PORT ADDRESS DECODING
• I/O port address decoding is very similar to memory
address decoding, especially for memory mapped
I/O devices.
• Memory-mapped I/O decoding is treated the same
as memory (except that the IORC and IOWC are not
used because there is no IN or OUT instruction).
• The decision to use memory-mapped I/O is often
determined by the size of the memory system and
the placement of the I/O devices in the system.

• The main difference between memory
decoding and isolated I/O decoding is the
number of address pins connected to the
decoder.
• We decode A31–A0, A23–A0, or A19–A0 for
memory, and A15–A0 for isolated I/O.
Sometimes, if the I/O devices use only fixed
I/O addressing, we decode only A7–A0.

INTERFACING2 [Autosaved] interfacing in Computer system

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