It's Time to ROCm!
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The document introduces AMD's ROCm (Radeon Open Compute) software platform which enhances high-performance computing (HPC) through advanced GPU programming capabilities. It discusses the innovations in AMD's CPU and GPU technologies, funding, and the development of open-source tools for efficient compute applications. Additionally, it highlights features like HIP for converting CUDA code for multi-platform use and emphasizes collaboration in the development of ROCm.
It's Time to ROCm!
- 1. 1 It’s Time To ROCm!
- 2. 1 AMD INNOVATIONS AND SUPERCOMPUTING AMD has been a leading innovator in high-performance systems ‒ First with 64-bit x86 architecture, HyperTransport™, integrated memory controllers, multi-core socket compatible upgrades, SSE FMAC extensions AMD processors have been in many leading DOE supercomputers ‒ In 2008, seven of the top ten supercomputers used AMD Opteron processors AMD will lead again with systems incorporating advanced CPUs, GPUs, memory, and networks
- 3. 2 >$50M funding Memory, Programming, APUs, Network, more 2012-2016 HBM High Bandwidth Memory 14 NM Radeon RX480 June 2016 Driving Innovation Not Waiting For Miracles Extreme Perf/Watt Efficacy Radeon R9 Nano 46 GFLOP/Watt Sept 2015 Open GPU Computing Platform ROCm 1.0 April 2016 DOE Invests in AMD The first GPU devices to use HBM and CoWoS Radeon R9 Fury X, June 2015
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- 5. 4 INTRODUCING ROCm SOFTWARE PLATFORM Graphics Core Next Headless Linux® 64-bit Driver • Multi-GPU Shared Virtual Memory • Large Memory Single Allocation • Peer to Peer Multi-GPU • Peer to Peer with RDMA • Systems Management API and Tools HSA drives rich capabilities into the ROCm hardware and software • User Mode Queues • Architected Queuing Language • Flat memory Addressing • Atomic Memory Transactions • Process Concurrency & Preemption Rich Compiler Foundation for HPC Developer • LLVM Native GCN ISA Code Generation • Offline Compilation Support • Standardized loader and Code Object • GCN ISA Assembler and Disassembler A New Fully Open Source Foundation for HPC Class GPU computing Open Source Tools and Libraries • Rich Set of Open Source Math Libraries • Tuned Deep Learning Library • Optimized Parallel Programing Frameworks • CodeXL Profiler and GDB Debugging
- 6. 5 HIP Convert CUDA to portable C++ • Single-source Host+Kernel • C++ Kernel Language • C Runtime (CUDA-like) • Platforms: AMD GPU, NVIDIA (same perf as native CUDA) When to use it? • Port existing CUDA code • Developers familiar with CUDA • New project that needs portability to AMD and NVIDIA ROCm PROGRAMMING MODEL OPTIONS HCC True single-source C++ accelerator language • Single-source Host+Kernel • C++ Kernel Language • C++ Runtime • Platforms: AMD GPU When to use it? • New projects where true C++ language preferred • Use features from latest ISO C++ standards OpenCL Khronos Industry Standard accelerator language • Split Host/Kernel • C99-based Kernel Language • C Runtime • Platforms: CPU, GPU, FPGA When to use it? • Port existing OpenCL code • New project that needs portability to CPU,GPU,FPGA
- 7. 6 Where you get your “Song Sheets” • Overview, Install, Docs, Code, Links: https://radeonopencompute.github.io/install.html • Blogs: http://gpuopen.com/
- 8. 7 WE ARE LOOKING TO BUILD OUT A WORLDWIDE BAND Get started today developing with ROCm - GPUOpen ROCm Getting Started http://bit.ly/1ZTlk82 Engage In the develop of ROCm @ GitHub RadeonOpenCompute Show case your applications, libraries and tools on to ROCm via GPUOpen How to Join “The power of one, if fearless and focused, is formidable, but the power of many working together is better.” – Gloria Macapagal Arroyo
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- 10. 9 CUDA PORTING WITH HIPIFY hipify Developer Cleanup and Tuning 95%+ Automatic Conversion Portable HIP C++ Developer maintains HIP port Resulting C++ code runs on NVIDIA (same performance) or AMD GPUs
- 11. 10 HIP COMPILATION PROCESS HIP->HC Header HCC Portable HIP C++ (Kernels + HIP API) HCC C++ (Kernels + HC) HIP API implemented with lightweight HIP runtime Uses HCC’s hc::accelerator, hc::accelerator_view, hc::completion_future Some calls directly into ROCR Compute kernels mostly unchanged Code compiled with HCC Can use CodeXL HIP->CUDA Header NVCC CUDA (Kernels + CUDA API) HIP API implemented as inlined calls to CUDA Runtime Compute kernels mostly unchanged Code compiled with NVCC (same as CUDA) Can use nvprof, CUDA debugger, other tools AMDNVIDIA