Lecture-digital-27_T_and_JK_Flip-Flops.ppt

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This document discusses T flip-flops and JK flip-flops in the context of a digital logic class at Iowa State University. T flip-flops toggle their state based on their input, while JK flip-flops can function as both SR and T flip-flops depending on their inputs. The document includes circuit diagrams, truth tables, and a brief explanation of how each flip-flop operates.

Engineering

Instructor: Alexander Stoytchev
http://www.ece.iastate.edu/~alexs/classes/
CprE 281:
Digital Logic

T Flip-Flops
&
JK Flip-Flops
CprE 281: Digital Logic
Iowa State University, Ames, IA
Copyright © Alexander Stoytchev

Administrative Stuff
• HW 8 is out
• It is due next Monday (Oct 27)

Motivation
A slight modification of the D flip-flop that can be used
for some nice applications.
In this case, T stands for Toggle.

[ Figure 5.15a from the textbook ]
T Flip-Flop

[ Figure 5.15a from the textbook ]
T Flip-Flop
Positive-edge-triggered
D Flip-Flop

[ Figure 5.15a from the textbook ]
T Flip-Flop
What is this?

T Flip-Flop
(How it Works)
If T=0 then it stays in its current state
If T=1 then it reverses its current state
In other words the circuit “toggles” its state
when T=1. This is why it is called T flip-flop.

[ Figure 5.15a,b from the textbook ]
T Flip-Flop
(circuit and truth table)

[ Figure 5.15a,c from the textbook ]
T Flip-Flop
(circuit and graphical symbol)

[ Figure 5.15d from the textbook ]
T Flip-Flop (Timing Diagram)

[ Figure 5.16a from the textbook ]
JK Flip-Flop
D = JQ + KQ

[ Figure 5.16 from the textbook ]
JK Flip-Flop
J Q
Q
K
0
1
Q t 1
+
 
Q t
 
0
(b) Truth table (c) Graphical symbol
J
0
0
0 1
1
1 Q t
 
1
K
D Q
Q
Q
Q
J
Clock
(a) Circuit
K

JK Flip-Flop
(How it Works)
A versatile circuit that can be used both as a SR
flip-flop and as a T flip flop
If J=0 and S =0 it stays in the same state
Just like SR It can be set and reset
J=S and K=R
If J=K=1 then it behaves as a T flip-flop

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Lecture-digital-27_T_and_JK_Flip-Flops.ppt

1. Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ CprE 281: Digital Logic

3. Administrative Stuff • HW 8 is out • It is due next Monday (Oct 27)

4. T Flip-Flop

5. Motivation A slight modification of the D flip-flop that can be used for some nice applications. In this case, T stands for Toggle.

6. [ Figure 5.15a from the textbook ] T Flip-Flop

7. [ Figure 5.15a from the textbook ] T Flip-Flop Positive-edge-triggered D Flip-Flop

8. [ Figure 5.15a from the textbook ] T Flip-Flop What is this?

9. What is this? Q Q T D

10. Q Q T D What is this? + = ?

11. T 0 1 D Q Q Clock T Flip-Flop

12. What is this? Q T D

13. What is this? Q T D D = QT + QT

14. What is this? Q T D D = Q + T

15. What is this? D = Q + T D Q T

16. What is this? + = ?

17. T D Q Q Clock T Flip-Flop

18. T Flip-Flop (How it Works) If T=0 then it stays in its current state If T=1 then it reverses its current state In other words the circuit “toggles” its state when T=1. This is why it is called T flip-flop.

19. [ Figure 5.15a,b from the textbook ] T Flip-Flop (circuit and truth table)

20. [ Figure 5.15a,c from the textbook ] T Flip-Flop (circuit and graphical symbol)

21. [ Figure 5.15d from the textbook ] T Flip-Flop (Timing Diagram)

22. JK Flip-Flop

23. [ Figure 5.16a from the textbook ] JK Flip-Flop D = JQ + KQ

24. [ Figure 5.16 from the textbook ] JK Flip-Flop J Q Q K 0 1 Q t 1 +   Q t   0 (b) Truth table (c) Graphical symbol J 0 0 0 1 1 1 Q t   1 K D Q Q Q Q J Clock (a) Circuit K

25. JK Flip-Flop (How it Works) A versatile circuit that can be used both as a SR flip-flop and as a T flip flop If J=0 and S =0 it stays in the same state Just like SR It can be set and reset J=S and K=R If J=K=1 then it behaves as a T flip-flop

26. Questions?

27. THE END

Lecture-digital-27_T_and_JK_Flip-Flops.ppt

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