Microprocessor and Interfacing Notes

Aug 29, 201341 likes26,726 views

The document contains notes on microprocessors and interfacing prepared by Akshansh Chaudhary for a course at BITS Pilani in 2013. It includes content on microprocessors, microcontroller basics, assembly language programming, and interfacing concepts. The notes were prepared based on a course by Susanna S. Henry and include copyright information and disclaimers regarding use of the content.

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Microprocessor and Interfacing Notes, First Edition
Copyright © 2013 Akshansh
ALL RIGHTS RESERVED.
Presented by: Akshansh Chaudhary
Graduate of BITS Pilani, Dubai Campus
Batch of 2011
Course content by: Ms. Susanna S. Henry
Then Faculty, BITS Pilani, Dubai Campus
Layout design by: AC Creations © 2013
The course content was prepared during Spring, 2013.
More content available at: www.Akshansh.weebly.com

The document discusses the minimum and maximum mode systems of the 8086 microprocessor. In minimum mode, the 8086 generates all control signals and a single processor is used. In maximum mode, an external bus controller chip generates control signals and multiple processors can be used. It describes the components, address latching, read and write cycles, and I/O interfacing for both minimum and maximum mode 8086 systems.

Minimum and Maximum Modes of microprocessor 8086anil_gaur

System bus timing 8086mpsrekha83

The document summarizes the timing of the system bus for the 8086 microprocessor. It describes that a machine cycle consists of at least four clock periods called T1, T2, T3, and T4. For a read bus cycle, the address is sent out in T1, read/write signals appear in T2 along with data for a write, T3 can be a wait state if ready is low, and data is sampled in T4. A write bus cycle outputs the address in T1, data in T2, and a write signal to memory.

Direct memory access (dma)Zubair Khalid

Direct memory access (DMA) allows certain hardware subsystems to access computer memory independently of the central processing unit (CPU). During DMA transfer, the CPU is idle while an I/O device reads from or writes directly to memory using a DMA controller. This improves data transfer speeds as the CPU does not need to manage each memory access and can perform other tasks. DMA is useful when CPU cannot keep up with data transfer speeds or needs to work while waiting for a slow I/O operation to complete.

Addressing modes of 8086Dr. AISHWARYA N

This document discusses various addressing modes of the 8086 microprocessor. It defines addressing modes as how operands are specified in an instruction. There are 8 main addressing modes - immediate, direct, register, register indirect, indexed, register relative, based indexed, and relative based indexed. Each mode is explained with examples of how operand values are accessed from memory or registers to perform operations. The document also discusses intrasegment and intersegment addressing modes which specify if the source and destination locations are within the same memory segment or different segments.

Assembler directives and basic steps ALP of 8086Urvashi Singh

The document discusses various assembler directives used in assembly language programming. It describes directives like DB, DW, DD, DQ, DT for data declaration; ASSUME to define logical segments; END, ENDP, ENDS to mark ends; EQU to define constants; PROC and ENDP to define procedures; ORG to set the location counter; SEGMENT to define logical segments; GROUP, INCLUDE, EVEN, and ALIGN for segment organization; EXTRN and PUBLIC for external references; and TYPE and PTR for defining variable types. The directives provide necessary information to the assembler to understand assembly language programs and generate machine code.

DMA and DMA controllernishant upadhyay

The document discusses direct memory access (DMA) and DMA controllers. It explains that DMA allows hardware subsystems like disk drives and graphics cards to access main memory independently of the CPU. This is useful because it allows data transfers to occur in parallel with other CPU operations, improving overall system performance. A DMA controller generates memory addresses and initiates read/write cycles. It has registers that specify the I/O port, transfer direction, and number of bytes to transfer per burst. DMA controllers use different transfer modes like burst, cycle stealing, and transparent to move blocks of data efficiently between peripheral devices and memory.

Addressing modes of 8086saurav kumar

The document describes the 8 addressing modes of the 8086 microprocessor. These are: 1) Immediate, where the operand is specified in the instruction itself. 2) Register, where operands are registers. 3) Direct memory, using a segment and offset address. 4) Register indirect, using a base register address. 5) Register relative, using a base register and displacement. 6) Base indexed, using a base and index register. 7) Relative indexed, using a base, index, and displacement. 8) Implied, where operands are implied and not specified.

Architecture of 8085 microprocessorAMAN SRIVASTAVA

The document discusses the architecture of the Intel 8085 microprocessor. It describes the 8085 as an 8-bit microprocessor introduced in 1976 that uses a single +5 volt power supply. The internal architecture includes a control unit, arithmetic logic unit (ALU), registers including the accumulator, program counter, stack pointer, instruction register/decoder, and timing and control unit. The document also briefly discusses interrupts, serial I/O, and some applications of microprocessors like mobile phones, watches, and appliances.

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Instruction Set of 8086 MicroprocessorAshita Agrawal

Microprocessor architecture-IDr.YNM

Interfacing memory with 8086 microprocessorVikas Gupta

This document discusses interfacing memory with the 8086 microprocessor. It begins by defining different types of memory like RAM, ROM, EPROM, and EEPROM. It then discusses memory fundamentals like capacity, organization, and standard memory ICs. The document explains two methods of address decoding - absolute and partial decoding. It provides examples of interfacing 32KB RAM, 32K words of memory, and a combination of ROM, EPROM, and RAM with the 8086 using address decoding techniques. Diagrams and tables are included to illustrate the memory mapping and generation of chip select logic.

Minimum mode and Maximum mode Configuration in 8086Jismy .K.Jose

The document discusses the minimum and maximum mode configurations of the 8086 microprocessor. In minimum mode, a single 8086 processor controls all signals and there is one microprocessor. In maximum mode, more than one microprocessor is present and status signals determine control signals from a bus controller chip. The document also provides details on the pins, signals, and timing diagrams used in read, write, and bus request cycles for both minimum and maximum mode configurations.

Instruction Set of 8051 MicrocontrollerMultisoft Virtual Academy

8237 dma controllerTech_MX

The 8237 DMA controller allows data transfer between I/O devices and memory without CPU intervention. It uses HOLD and HLDA signals to request and acknowledge DMA actions from the CPU. The 8237 contains registers like CAR, CWCR, CR, and SR to program DMA channel operations, addresses, counts, and status. It can perform DMA transfers at up to 1.6 MB/s across 4 channels. Modern systems integrate DMA controllers within chipsets rather than using discrete 8237 components.

8085 interfacing with memory chipsSrikrishna Thota

This document discusses memory interfacing with the 8085 microprocessor. It begins by describing the different types of computer memory, including primary/volatile memory (RAM and ROM) and secondary/non-volatile memory (magnetic tapes, disks, optical disks). It then discusses how the 8085 microprocessor interfaces with memory chips through an interface circuit. The interface circuit matches the memory chip signals to the microprocessor address and control signals. Memory interfacing involves selecting the appropriate memory chip, identifying the correct register using address lines, and enabling read/write buffers using control signals.

Memory mappingSnehalataAgasti

Cache memory is located between the processor and main memory. It is smaller and faster than main memory. There are two types of cache memory policies - write-back and write-through. Mapping is a technique that maps CPU-generated memory addresses to cache lines. There are three types of mapping - direct, associative, and set associative. Direct mapping maps each main memory block to a single cache line using the formula: cache line number = main memory block number % number of cache lines. This can cause conflict misses.

signal space analysis.pptPatrickMumba7

This document discusses signal-space analysis and representation of bandpass signals. It can be summarized as follows: 1) A bandpass real signal x(t) can be represented using its complex envelope x(t) and carrier frequency fc. This results in an in-phase (I) and quadrature-phase (Q) representation of the signal. 2) Signals can be viewed as vectors in a vector space. Basic algebra concepts like groups, fields, and vector spaces are introduced. 3) Key concepts discussed include orthonormal bases, projection theorems, Gram-Schmidt orthonormalization, and representing signals in inner product spaces which allows defining notions of length and angle between signals.

Interfacing 8255Anuja Bhakuni

1. The 8254 contains three independent 16-bit counters/timers that can be programmed to operate in different modes. 2. Each counter can be programmed to count from 1 to 65535 and has a programmable control word to select the operating mode. 3. The 8254 supports various timer modes like one-shot, continuous square wave, event counter, and software/hardware triggered one-shot for applications like timing, delay generation, and pulse width modulation.

(D/A) and (A/D)conversionPraveen Kumar

Instruction set of 80869840596838

The document discusses the instruction set of the 8086 microprocessor. It describes that the 8086 has over 20,000 instructions that are classified into several categories like data transfer, arithmetic, bit manipulation, program execution transfer, and string instructions. Under each category, it provides details about specific instructions like MOV, ADD, AND, CALL, etc. and explains their functionality and operand usage.

UARTNaveen Kumar

Serial Communication Interfacesanishgoel

This document discusses various serial communication protocols used in embedded systems including RS-232, RS-485, I2C, SPI, CAN, and USB. It provides details on the voltage levels, maximum speeds, cable lengths, and other specifications of each protocol. It explains how differential signaling and twisted pair cables allow RS-485 to communicate over longer distances and faster speeds compared to RS-232.

8255 PPIdeval patel

The document discusses interfacing concepts and the Intel 8255 Programmable Peripheral Interface chip. It provides information on: - Memory mapped I/O and I/O mapped I/O interfacing techniques. - The 8255 PPI chip which has 3 8-bit I/O ports (Ports A, B, and C) that can be configured as input or output ports. It operates in I/O mode or Bit Set/Reset mode. - Control word formats for configuring the ports in different modes like Mode 0, 1, and 2 for I/O mode and Bit Set/Reset mode. - Example programs to initialize the 8255 ports using control words for different

Direct Memory Access(DMA)Page Maker

Direct Memory Access (DMA) allows certain hardware subsystems to access main system memory independently of the CPU. DMA controllers temporarily borrow the address, data, and control buses from the microprocessor to transfer data directly between an I/O port and memory locations. This allows fast transfer of data to and from devices while the CPU performs other tasks, improving overall system performance. DMA transfers can occur via block transfers where the DMA controller controls the bus for an extended period, or via cycle stealing where it uses the bus for one transfer then returns control to the CPU.

Segment registersmaamir farooq

Segment registers specify the location of segments in memory and hold the starting addresses of different segments. The four main segment registers are the code segment register (CS), data segment register (DS), extra segment register (ES), and stack segment register (SS). To reference a specific location within a segment, the processor combines the starting address stored in the segment register with an offset value for that location.

Controlled Access ProtocolsPruthviraj Konu

Controlled access protocols allow only one node to send at a time to avoid message collisions. There are three main controlled access methods: reservation, polling, and token passing. Reservation methods divide time into intervals, with reservation frames preceding data frames to reserve slots. Polling methods involve a primary station periodically polling secondary stations for data. Token passing methods use a token frame that circulates between stations, with each station only allowed to transmit when holding the token.

Microprocessor ArchitectureAvijeet Negel

The document discusses the architecture of the 8085 microprocessor. It describes that the 8085 uses three separate busses - the address bus, data bus, and control bus. The address bus is 16-bits wide, allowing the 8085 to access 64K memory locations. The data bus is 8-bits wide, meaning the 8085 can only manipulate 8 bits of data at a time. Memory is organized into chips that are selected using address lines decoded by a decoder chip. The 8085 can perform read and write operations to memory and I/O devices by placing the address on the address bus and sending control signals.

Chapter5Bisrat Girma

This document discusses memory and I/O interfacing using microprocessors. It describes how memory and I/O devices are interfaced by connecting data and address lines, as well as control signals. It also discusses the three main types of data transfer between microprocessors and I/O devices: programmed I/O, interrupt-driven I/O, and direct memory access. Additionally, it provides information on common I/O interface chips like the 8255 Programmable Peripheral Interface and the 8279 Keyboard/Display Controller.

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Introduction All the materials around us are made up of elements. These elements can be broadly divided into two major groups: Metals Non-Metals Each group has its own unique physical and chemical properties. Let's understand them one by one. Physical Properties 1. Appearance Metals: Shiny (lustrous). Example: gold, silver, copper. Non-metals: Dull appearance (except iodine, which is shiny). 2. Hardness Metals: Generally hard. Example: iron. Non-metals: Usually soft (except diamond, a form of carbon, which is very hard). 3. State Metals: Mostly solids at room temperature (except mercury, which is a liquid). Non-metals: Can be solids, liquids, or gases. Example: oxygen (gas), bromine (liquid), sulphur (solid). 4. Malleability Metals: Can be hammered into thin sheets (malleable). Non-metals: Not malleable. They break when hammered (brittle). 5. Ductility Metals: Can be drawn into wires (ductile). Non-metals: Not ductile. 6. Conductivity Metals: Good conductors of heat and electricity. Non-metals: Poor conductors (except graphite, which is a good conductor). 7. Sonorous Nature Metals: Produce a ringing sound when struck. Non-metals: Do not produce sound. Chemical Properties 1. Reaction with Oxygen Metals react with oxygen to form metal oxides. These metal oxides are usually basic. Non-metals react with oxygen to form non-metallic oxides. These oxides are usually acidic. 2. Reaction with Water Metals: Some react vigorously (e.g., sodium). Some react slowly (e.g., iron). Some do not react at all (e.g., gold, silver). Non-metals: Generally do not react with water. 3. Reaction with Acids Metals react with acids to produce salt and hydrogen gas. Non-metals: Do not react with acids. 4. Reaction with Bases Some non-metals react with bases to form salts, but this is rare. Metals generally do not react with bases directly (except amphoteric metals like aluminum and zinc). Displacement Reaction More reactive metals can displace less reactive metals from their salt solutions. Uses of Metals Iron: Making machines, tools, and buildings. Aluminum: Used in aircraft, utensils. Copper: Electrical wires. Gold and Silver: Jewelry. Zinc: Coating iron to prevent rusting (galvanization). Uses of Non-Metals Oxygen: Breathing. Nitrogen: Fertilizers. Chlorine: Water purification. Carbon: Fuel (coal), steel-making (coke). Iodine: Medicines. Alloys An alloy is a mixture of metals or a metal with a non-metal. Alloys have improved properties like strength, resistance to rusting.

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Microprocessor and Interfacing Notes

2. DISCLAIMER: While the document has attempted to make the information as accurate as possible, the information on this document is for personal and/or educational use only and is provided in good faith without any express or implied warranty. There is no guarantee given as to the accuracy or currency of any individual items. The document does not accept responsibility for any loss or damage occasioned by use of the information contained and acknowledges credit of author(s) where ever due. While the document makes every effort to ensure the availability and integrity of its resources, it cannot guarantee that these will always be available, and/or free of any defects, including viruses. Users should take this into account when accessing the resources. All access and use is at the risk of the user and owner reserves that right to control or deny access. Information, notes, models, graph etc. provided about subjects, topics, units, courses and any other similar arrangements for course/paper, are an expression to facilitate ease of learning and dissemination of views/personal understanding and as such they are not to be taken as a firm offer or undertaking. The document reserves the right to discontinue or vary such subjects, topic, units, courses, or arrangements at any time without notice and to impose limitations on accessibility in any course. Microprocessor and Interfacing Notes, First Edition Copyright © 2013 Akshansh ALL RIGHTS RESERVED. Presented by: Akshansh Chaudhary Graduate of BITS Pilani, Dubai Campus Batch of 2011 Course content by: Ms. Susanna S. Henry Then Faculty, BITS Pilani, Dubai Campus Layout design by: AC Creations © 2013 The course content was prepared during Spring, 2013. More content available at: www.Akshansh.weebly.com

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