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Ok 6 alu

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This document discusses the design of arithmetic logic units (ALUs) and their components. It describes how to build 1-bit ALUs that can perform AND, OR, and addition operations using multiplexers. It then explains how to construct a 32-bit ALU by combining 32 1-bit ALUs and using the carry outputs to propagate carries between the bits. The document provides truth tables and logic equations for basic components like decoders and multiplexers. It also includes examples of 4-bit ripple carry and carry lookahead adders.

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WISNU HENDRO MARTONO,M.Sc 06/09/13 12:58 1Organisasi Komputer by TIM DOSEN STT PLN
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 2
 Sum output  Logic equation:  Circuit: 06/09/13 12:58 3Organisasi Komputer by TIM DOSEN STT PLN
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 4 • Carry output • Logic equation: • Circuit:
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 5 1 Bit Adder adder A B Carry In Sum Carry Out A B Carry In Carry Out Sum 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 6 4 Bit Ripple Carry Adder adder A0 C0 S0 B0 adder A1 S1 B1 adder A2 S2 B2 adder A3 S3 B3 C1C2C3 A3A2A1A0 + B3B2B1B0 S3S2S1S0 C3 C2 C1 C0
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 7 4 Bit Ripple Carry Adder adder A0 C0 S0 B0 adder A1 S1 B1 adder A2 S2 B2 adder A3 S3 B3 C1C2C3 A3A2A1A0 + B3B2B1B0 S3S2S1S0 C3 C2 C1 C0
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 8 4 Bit Ripple Carry Adder adder 0adderadderadder 1100 0100 0011 + 0010 1 adder 0 1 0 0 adder 1 0 1 1 adder 0 1 0 0 adder 0 0
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 9 Pengurangan • Menghitung A-B  A + (-B-1) + 1 • -B-1 seluruh bit di Inversi. • Menambah +1 dg menetapkan C0 dg 1
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 10 Subtraction adder 1adderadderadder 1010 0101 - 0011 0 adder 1 0 1 adder 0 1 0 adder 1 0 0 adder 1 0 0011 B inverted
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 11 Bilangan Kompliment Dua • Tidak ada yg berbeda! – Merupakan keuntungan menggunakan representasi kompliment dua. • Overflow: – Utk Penambahan: sign pada hasil berbeda dg sign dari operands (walaupun sama2 mempunyai sign).
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 12 -3 + 7 adder 0adderadderadder 1011 1110 1101 + 0111 0 adder 1 0 1 0 adder 1 0 1 1 adder 1 1 1 0 adder 1 0
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 13 -3 + -7 adder 0adderadderadder 1011 1001 1101 + 1001 0 adder 0 0 1 1 adder 1 1 0 1 adder 0 1 0 0 adder 1 0 Overflow!
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 14 Ripple Carry Timing • Semua adder sebenarnya beroperasi berdasar waktu (dirancang menggunakan rangkaian combinational). • Menunggu cukup lama (hingga carry terakhir dihitung) dan perhatikan pada jawaban terakhir. • Sepertinya terjadi adanya kesalahan pada nilai sementaranya!
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 15 Carry Look-ahead • Menghitung bit carry segera. • Tidak memungkinkan utk adder yg besar (32 bit), tetapi realistis utk 4 bit adder.
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 16 4 Bit Carry Look-ahead adderadderadderadder 0011 + 0010 Carry Generator 1100 1100 0100 0100 0 1 adder 0 1 0 0 adder 1 1 1 adder 0 1 0 0 adder 0 0 Carry Generator 0 0
Decoders: n input, 2n output. Masukan digunakan utk memilih Luaran mana yg akan dihidupkan. Setiap saat hanya satu Luaran yg akan hidup/on. Multiplexors: 2n input, n selection bit, 1 output. Bit yg terpilih menentukan Masukan mana yg akan menjadi Luaran. 06/09/13 12:58 17Organisasi Komputer by TIM DOSEN STT PLN
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 18 2 input Decoder Decoder I0 I1 O0 O2 O1 O3 Perlakukan I0I1 as a 2 bit integer i. The ith output will be turned on (Oi=1), all the others off. I0 I1 O0 O1 O2 O3 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 1 Decoder Truth Table
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 19 Decoder Boolean Expressions 103 102 101 100 IIO IIO IIO IIO •= •= •= •= Decoder Implementation I1I0 O0 O1 O2 O3
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 20 2 Input Multiplexor Inputs: I0 and I1 Selector: S Output: O If S is a 0: O=I0 If S is a 1: O=I1 Mux I0 I1 O S
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 21 2-Mux Truth Table S O 0 I0 1 I1 Abbreviated Truth Table S I0 I1 O0 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 22 Unit Logika Arithmatik • Peralatan yg membentuk tindakan operasi arithmatik dan operasi logika. – arithmetic ops: addition, subtraction – logic operations: AND, OR • Utk MIPS diperlukan 32 bit ALU – Yg mampu menambahkan besaran hingga 32 bit dll.
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 23 Bentuk ALU 32 bit operand 32 bit operand 32 bit result Control (operation selection)
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 24 Mesin kap.1 bit AND/OR • Merancang peralatan hitung dlm satu box menggunakan AND atau OR. • Digunakan control input utk menentukan bentuk operasi apa dihasilkan. – Nama control “Op”. • if Op==0 do an AND • if Op==1 do an OR
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 25 Truth Table For 1-bit AND/OR Op A B Result 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1 A B Op Result Op=0: Result is A•B Op=1: Result is A+B
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 26 Logic utk 1-Bit AND/OR • Dapat diturunkan dari SOP atau POS dan membangun rangkaian Logika dan yg berhubungan. • Dapat juga dilakukan seperti: – Masukan A dan B ke rangkaian OR gate. – Masukan A dan B ke rangkaian AND gate. – Menggunakan 2-input MUX utk menjemput salah satu utk digunakan. • Op menseleksi masukan ke MUX.
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 27 Logic Design utk 1-Bit AND/OR Mux Result A B Op
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 28 1 Bit ALU • Gabungan AND/OR dengan Adder. • Harus menggunakan 4-input MUX dengan 2 masukan penyeleksi. AND OR add
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 29 b 0 2 Result Operation a 1 CarryIn CarryOut This is 2 bits!
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 30 Building a 32 bit ALU • 64 inputs • 3 different Operations (AND,OR,add). • 32 bit output A0 A1 … A31 B0 B1 … B31 …… Op R0 R1 … R31 … Result
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 31 New 32-bit ALU Set a31 0 ALU0 Result0 CarryIn a0 Result1 a1 0 Result2 a2 0 Operation b31 b0 b1 b2 Result31 Overflow Binvert CarryIn Less CarryIn CarryOut ALU1 Less CarryIn CarryOut ALU2 Less CarryIn CarryOut ALU31 Less CarryIn • Masukan 0 ke Less seluruhnya tetapi LS. • Hasil penambahan pd MS ALU akan dikembalikan ke Less dr LS ALU
06/09/13 12:58 32Organisasi Komputer by TIM DOSEN STT PLN
06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 33 UNTUK LEBIH MEMAHAMI, ULANG MATERI INI DENGAN CARA MENGGUNAKAN SOAL YANG ADA PADA BUKU REFERENSI. TERIMA KASIH

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Ok 6 alu

  • 1. WISNU HENDRO MARTONO,M.Sc 06/09/13 12:58 1Organisasi Komputer by TIM DOSEN STT PLN
  • 2. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 2
  • 3.  Sum output  Logic equation:  Circuit: 06/09/13 12:58 3Organisasi Komputer by TIM DOSEN STT PLN
  • 4. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 4 • Carry output • Logic equation: • Circuit:
  • 5. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 5 1 Bit Adder adder A B Carry In Sum Carry Out A B Carry In Carry Out Sum 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1
  • 6. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 6 4 Bit Ripple Carry Adder adder A0 C0 S0 B0 adder A1 S1 B1 adder A2 S2 B2 adder A3 S3 B3 C1C2C3 A3A2A1A0 + B3B2B1B0 S3S2S1S0 C3 C2 C1 C0
  • 7. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 7 4 Bit Ripple Carry Adder adder A0 C0 S0 B0 adder A1 S1 B1 adder A2 S2 B2 adder A3 S3 B3 C1C2C3 A3A2A1A0 + B3B2B1B0 S3S2S1S0 C3 C2 C1 C0
  • 8. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 8 4 Bit Ripple Carry Adder adder 0adderadderadder 1100 0100 0011 + 0010 1 adder 0 1 0 0 adder 1 0 1 1 adder 0 1 0 0 adder 0 0
  • 9. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 9 Pengurangan • Menghitung A-B  A + (-B-1) + 1 • -B-1 seluruh bit di Inversi. • Menambah +1 dg menetapkan C0 dg 1
  • 10. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 10 Subtraction adder 1adderadderadder 1010 0101 - 0011 0 adder 1 0 1 adder 0 1 0 adder 1 0 0 adder 1 0 0011 B inverted
  • 11. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 11 Bilangan Kompliment Dua • Tidak ada yg berbeda! – Merupakan keuntungan menggunakan representasi kompliment dua. • Overflow: – Utk Penambahan: sign pada hasil berbeda dg sign dari operands (walaupun sama2 mempunyai sign).
  • 12. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 12 -3 + 7 adder 0adderadderadder 1011 1110 1101 + 0111 0 adder 1 0 1 0 adder 1 0 1 1 adder 1 1 1 0 adder 1 0
  • 13. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 13 -3 + -7 adder 0adderadderadder 1011 1001 1101 + 1001 0 adder 0 0 1 1 adder 1 1 0 1 adder 0 1 0 0 adder 1 0 Overflow!
  • 14. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 14 Ripple Carry Timing • Semua adder sebenarnya beroperasi berdasar waktu (dirancang menggunakan rangkaian combinational). • Menunggu cukup lama (hingga carry terakhir dihitung) dan perhatikan pada jawaban terakhir. • Sepertinya terjadi adanya kesalahan pada nilai sementaranya!
  • 15. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 15 Carry Look-ahead • Menghitung bit carry segera. • Tidak memungkinkan utk adder yg besar (32 bit), tetapi realistis utk 4 bit adder.
  • 16. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 16 4 Bit Carry Look-ahead adderadderadderadder 0011 + 0010 Carry Generator 1100 1100 0100 0100 0 1 adder 0 1 0 0 adder 1 1 1 adder 0 1 0 0 adder 0 0 Carry Generator 0 0
  • 17. Decoders: n input, 2n output. Masukan digunakan utk memilih Luaran mana yg akan dihidupkan. Setiap saat hanya satu Luaran yg akan hidup/on. Multiplexors: 2n input, n selection bit, 1 output. Bit yg terpilih menentukan Masukan mana yg akan menjadi Luaran. 06/09/13 12:58 17Organisasi Komputer by TIM DOSEN STT PLN
  • 18. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 18 2 input Decoder Decoder I0 I1 O0 O2 O1 O3 Perlakukan I0I1 as a 2 bit integer i. The ith output will be turned on (Oi=1), all the others off. I0 I1 O0 O1 O2 O3 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 1 Decoder Truth Table
  • 19. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 19 Decoder Boolean Expressions 103 102 101 100 IIO IIO IIO IIO •= •= •= •= Decoder Implementation I1I0 O0 O1 O2 O3
  • 20. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 20 2 Input Multiplexor Inputs: I0 and I1 Selector: S Output: O If S is a 0: O=I0 If S is a 1: O=I1 Mux I0 I1 O S
  • 21. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 21 2-Mux Truth Table S O 0 I0 1 I1 Abbreviated Truth Table S I0 I1 O0 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1
  • 22. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 22 Unit Logika Arithmatik • Peralatan yg membentuk tindakan operasi arithmatik dan operasi logika. – arithmetic ops: addition, subtraction – logic operations: AND, OR • Utk MIPS diperlukan 32 bit ALU – Yg mampu menambahkan besaran hingga 32 bit dll.
  • 23. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 23 Bentuk ALU 32 bit operand 32 bit operand 32 bit result Control (operation selection)
  • 24. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 24 Mesin kap.1 bit AND/OR • Merancang peralatan hitung dlm satu box menggunakan AND atau OR. • Digunakan control input utk menentukan bentuk operasi apa dihasilkan. – Nama control “Op”. • if Op==0 do an AND • if Op==1 do an OR
  • 25. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 25 Truth Table For 1-bit AND/OR Op A B Result 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1 A B Op Result Op=0: Result is A•B Op=1: Result is A+B
  • 26. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 26 Logic utk 1-Bit AND/OR • Dapat diturunkan dari SOP atau POS dan membangun rangkaian Logika dan yg berhubungan. • Dapat juga dilakukan seperti: – Masukan A dan B ke rangkaian OR gate. – Masukan A dan B ke rangkaian AND gate. – Menggunakan 2-input MUX utk menjemput salah satu utk digunakan. • Op menseleksi masukan ke MUX.
  • 27. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 27 Logic Design utk 1-Bit AND/OR Mux Result A B Op
  • 28. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 28 1 Bit ALU • Gabungan AND/OR dengan Adder. • Harus menggunakan 4-input MUX dengan 2 masukan penyeleksi. AND OR add
  • 29. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 29 b 0 2 Result Operation a 1 CarryIn CarryOut This is 2 bits!
  • 30. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 30 Building a 32 bit ALU • 64 inputs • 3 different Operations (AND,OR,add). • 32 bit output A0 A1 … A31 B0 B1 … B31 …… Op R0 R1 … R31 … Result
  • 31. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 31 New 32-bit ALU Set a31 0 ALU0 Result0 CarryIn a0 Result1 a1 0 Result2 a2 0 Operation b31 b0 b1 b2 Result31 Overflow Binvert CarryIn Less CarryIn CarryOut ALU1 Less CarryIn CarryOut ALU2 Less CarryIn CarryOut ALU31 Less CarryIn • Masukan 0 ke Less seluruhnya tetapi LS. • Hasil penambahan pd MS ALU akan dikembalikan ke Less dr LS ALU
  • 32. 06/09/13 12:58 32Organisasi Komputer by TIM DOSEN STT PLN
  • 33. 06/09/13 12:58Organisasi Komputer by TIM DOSEN STT PLN 33 UNTUK LEBIH MEMAHAMI, ULANG MATERI INI DENGAN CARA MENGGUNAKAN SOAL YANG ADA PADA BUKU REFERENSI. TERIMA KASIH