[email protected] | d1811bc | 2012-03-31 07:08:53 | [diff] [blame] | 1 | // Copyright (c) 2012 The Chromium Authors. All rights reserved. |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 2 | // Use of this source code is governed by a BSD-style license that can be |
| 3 | // found in the LICENSE file. |
| 4 | |
| 5 | #include "base/cpu.h" |
[email protected] | 7e6d42b | 2011-02-16 18:51:58 | [diff] [blame] | 6 | |
[email protected] | d1811bc | 2012-03-31 07:08:53 | [diff] [blame] | 7 | #include <string.h> |
| 8 | |
[email protected] | 595d159 | 2012-10-04 21:05:23 | [diff] [blame] | 9 | #include <algorithm> |
| 10 | |
[email protected] | d1811bc | 2012-03-31 07:08:53 | [diff] [blame] | 11 | #include "build/build_config.h" |
| 12 | |
[email protected] | 7e6d42b | 2011-02-16 18:51:58 | [diff] [blame] | 13 | #if defined(ARCH_CPU_X86_FAMILY) |
| 14 | #if defined(_MSC_VER) |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 15 | #include <intrin.h> |
[email protected] | 7e6d42b | 2011-02-16 18:51:58 | [diff] [blame] | 16 | #endif |
| 17 | #endif |
| 18 | |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 19 | namespace base { |
| 20 | |
| 21 | CPU::CPU() |
[email protected] | 5c8f89f69 | 2013-07-18 11:13:28 | [diff] [blame^] | 22 | : signature_(0), |
| 23 | type_(0), |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 24 | family_(0), |
| 25 | model_(0), |
| 26 | stepping_(0), |
| 27 | ext_model_(0), |
| 28 | ext_family_(0), |
[email protected] | 7e6d42b | 2011-02-16 18:51:58 | [diff] [blame] | 29 | has_mmx_(false), |
| 30 | has_sse_(false), |
| 31 | has_sse2_(false), |
| 32 | has_sse3_(false), |
| 33 | has_ssse3_(false), |
| 34 | has_sse41_(false), |
| 35 | has_sse42_(false), |
[email protected] | aa31281 | 2013-04-30 19:46:05 | [diff] [blame] | 36 | has_non_stop_time_stamp_counter_(false), |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 37 | cpu_vendor_("unknown") { |
| 38 | Initialize(); |
| 39 | } |
| 40 | |
[email protected] | 7e6d42b | 2011-02-16 18:51:58 | [diff] [blame] | 41 | #if defined(ARCH_CPU_X86_FAMILY) |
| 42 | #ifndef _MSC_VER |
| 43 | |
| 44 | #if defined(__pic__) && defined(__i386__) |
| 45 | |
| 46 | void __cpuid(int cpu_info[4], int info_type) { |
| 47 | __asm__ volatile ( |
| 48 | "mov %%ebx, %%edi\n" |
| 49 | "cpuid\n" |
| 50 | "xchg %%edi, %%ebx\n" |
| 51 | : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) |
| 52 | : "a"(info_type) |
| 53 | ); |
| 54 | } |
| 55 | |
| 56 | void __cpuidex(int cpu_info[4], int info_type, int info_index) { |
| 57 | __asm__ volatile ( |
| 58 | "mov %%ebx, %%edi\n" |
| 59 | "cpuid\n" |
| 60 | "xchg %%edi, %%ebx\n" |
| 61 | : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) |
| 62 | : "a"(info_type), "c"(info_index) |
| 63 | ); |
| 64 | } |
| 65 | |
| 66 | #else |
| 67 | |
| 68 | void __cpuid(int cpu_info[4], int info_type) { |
| 69 | __asm__ volatile ( |
| 70 | "cpuid \n\t" |
| 71 | : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) |
| 72 | : "a"(info_type) |
| 73 | ); |
| 74 | } |
| 75 | |
| 76 | void __cpuidex(int cpu_info[4], int info_type, int info_index) { |
| 77 | __asm__ volatile ( |
| 78 | "cpuid \n\t" |
| 79 | : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) |
| 80 | : "a"(info_type), "c"(info_index) |
| 81 | ); |
| 82 | } |
| 83 | |
| 84 | #endif |
| 85 | #endif // _MSC_VER |
| 86 | #endif // ARCH_CPU_X86_FAMILY |
| 87 | |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 88 | void CPU::Initialize() { |
[email protected] | 7e6d42b | 2011-02-16 18:51:58 | [diff] [blame] | 89 | #if defined(ARCH_CPU_X86_FAMILY) |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 90 | int cpu_info[4] = {-1}; |
[email protected] | 595d159 | 2012-10-04 21:05:23 | [diff] [blame] | 91 | char cpu_string[48]; |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 92 | |
| 93 | // __cpuid with an InfoType argument of 0 returns the number of |
| 94 | // valid Ids in CPUInfo[0] and the CPU identification string in |
| 95 | // the other three array elements. The CPU identification string is |
[email protected] | 52a261f | 2009-03-03 15:01:12 | [diff] [blame] | 96 | // not in linear order. The code below arranges the information |
[email protected] | 595d159 | 2012-10-04 21:05:23 | [diff] [blame] | 97 | // in a human readable form. The human readable order is CPUInfo[1] | |
| 98 | // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped |
| 99 | // before using memcpy to copy these three array elements to cpu_string. |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 100 | __cpuid(cpu_info, 0); |
| 101 | int num_ids = cpu_info[0]; |
[email protected] | 595d159 | 2012-10-04 21:05:23 | [diff] [blame] | 102 | std::swap(cpu_info[2], cpu_info[3]); |
| 103 | memcpy(cpu_string, &cpu_info[1], 3 * sizeof(cpu_info[1])); |
| 104 | cpu_vendor_.assign(cpu_string, 3 * sizeof(cpu_info[1])); |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 105 | |
| 106 | // Interpret CPU feature information. |
[email protected] | 7f081364 | 2008-09-26 23:26:34 | [diff] [blame] | 107 | if (num_ids > 0) { |
| 108 | __cpuid(cpu_info, 1); |
[email protected] | 5c8f89f69 | 2013-07-18 11:13:28 | [diff] [blame^] | 109 | signature_ = cpu_info[0]; |
[email protected] | 7f081364 | 2008-09-26 23:26:34 | [diff] [blame] | 110 | stepping_ = cpu_info[0] & 0xf; |
[email protected] | 7e6d42b | 2011-02-16 18:51:58 | [diff] [blame] | 111 | model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0); |
[email protected] | 7f081364 | 2008-09-26 23:26:34 | [diff] [blame] | 112 | family_ = (cpu_info[0] >> 8) & 0xf; |
| 113 | type_ = (cpu_info[0] >> 12) & 0x3; |
| 114 | ext_model_ = (cpu_info[0] >> 16) & 0xf; |
| 115 | ext_family_ = (cpu_info[0] >> 20) & 0xff; |
[email protected] | 7e6d42b | 2011-02-16 18:51:58 | [diff] [blame] | 116 | has_mmx_ = (cpu_info[3] & 0x00800000) != 0; |
| 117 | has_sse_ = (cpu_info[3] & 0x02000000) != 0; |
| 118 | has_sse2_ = (cpu_info[3] & 0x04000000) != 0; |
| 119 | has_sse3_ = (cpu_info[2] & 0x00000001) != 0; |
| 120 | has_ssse3_ = (cpu_info[2] & 0x00000200) != 0; |
| 121 | has_sse41_ = (cpu_info[2] & 0x00080000) != 0; |
| 122 | has_sse42_ = (cpu_info[2] & 0x00100000) != 0; |
[email protected] | 5016a9dd | 2013-02-02 01:10:02 | [diff] [blame] | 123 | has_avx_ = (cpu_info[2] & 0x10000000) != 0; |
[email protected] | 7f081364 | 2008-09-26 23:26:34 | [diff] [blame] | 124 | } |
[email protected] | 595d159 | 2012-10-04 21:05:23 | [diff] [blame] | 125 | |
| 126 | // Get the brand string of the cpu. |
| 127 | __cpuid(cpu_info, 0x80000000); |
| 128 | const int parameter_end = 0x80000004; |
[email protected] | aa31281 | 2013-04-30 19:46:05 | [diff] [blame] | 129 | int max_parameter = cpu_info[0]; |
[email protected] | 595d159 | 2012-10-04 21:05:23 | [diff] [blame] | 130 | |
| 131 | if (cpu_info[0] >= parameter_end) { |
| 132 | char* cpu_string_ptr = cpu_string; |
| 133 | |
| 134 | for (int parameter = 0x80000002; parameter <= parameter_end && |
| 135 | cpu_string_ptr < &cpu_string[sizeof(cpu_string)]; parameter++) { |
| 136 | __cpuid(cpu_info, parameter); |
| 137 | memcpy(cpu_string_ptr, cpu_info, sizeof(cpu_info)); |
| 138 | cpu_string_ptr += sizeof(cpu_info); |
| 139 | } |
| 140 | cpu_brand_.assign(cpu_string, cpu_string_ptr - cpu_string); |
| 141 | } |
[email protected] | aa31281 | 2013-04-30 19:46:05 | [diff] [blame] | 142 | |
| 143 | const int parameter_containing_non_stop_time_stamp_counter = 0x80000007; |
| 144 | if (max_parameter >= parameter_containing_non_stop_time_stamp_counter) { |
| 145 | __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter); |
| 146 | has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0; |
| 147 | } |
[email protected] | 7e6d42b | 2011-02-16 18:51:58 | [diff] [blame] | 148 | #endif |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 149 | } |
| 150 | |
[email protected] | 5016a9dd | 2013-02-02 01:10:02 | [diff] [blame] | 151 | CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const { |
| 152 | if (has_avx()) return AVX; |
| 153 | if (has_sse42()) return SSE42; |
| 154 | if (has_sse41()) return SSE41; |
| 155 | if (has_ssse3()) return SSSE3; |
| 156 | if (has_sse3()) return SSE3; |
| 157 | if (has_sse2()) return SSE2; |
| 158 | if (has_sse()) return SSE; |
| 159 | return PENTIUM; |
| 160 | } |
| 161 | |
[email protected] | de8d2667 | 2008-09-25 22:08:44 | [diff] [blame] | 162 | } // namespace base |