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Stephen Canonb1fdde12010-07-01 15:52:421/*
2 * The LLVM Compiler Infrastructure
3 *
4 * This file is distributed under the University of Illinois Open Source
5 * License. See LICENSE.TXT for details.
6 */
7
8#include <stdint.h>
9#include <limits.h>
10
11// This file implements a fairly generic conversion from a narrower to a wider
12// IEEE-754 floating-point type. The next 10 lines parametrize which types
13// are to be used as the source and destination, the actual name used for
14// the conversion, and a suitable CLZ function for the source representation
15// type.
16//
17// This routine can be trivially adapted to support conversions from
18// half-precision or to quad-precision. It does not support types that don't
19// use the usual IEEE-754 interchange formats; specifically, some work would be
20// needed to adapt it to (for example) the Intel 80-bit format or PowerPC
21// double-double format.
22//
23// Note please, however, that this implementation is only intended to support
24// *widening* operations; if you need to convert to a *narrower* floating-point
25// type (e.g. double -> float), then this routine will not do what you want it
26// to.
27//
28// It also requires that integer types at least as large as both formats
29// are available on the target platform; this may pose a problem when trying
30// to add support for quad on some 32-bit systems, for example. You also may
31// run into trouble finding an appropriate CLZ function for wide source types;
32// you will likely need to roll your own on some platforms.
33//
34// Finally, the following assumptions are made:
35//
36// 1. floating-point types and integer types have the same endianness on the
37// target platform
38//
39// 2. quiet NaNs, if supported, are indicated by the leading bit of the
40// significand field being set
41
42#define widen __extendsfdf2
43
44typedef float src_t;
45typedef uint32_t src_rep_t;
46#define SRC_REP_C UINT32_C
47static const int srcSigBits = 23;
48#define src_rep_t_clz __builtin_clz
49
50typedef double dst_t;
51typedef uint64_t dst_rep_t;
52#define DST_REP_C UINT64_C
53static const int dstSigBits = 52;
54
55// End of specialization parameters. Two helper routines for conversion to and
56// from the representation of floating-point data as integer values follow.
57
58static inline src_rep_t srcToRep(src_t x) {
59 const union { src_t f; src_rep_t i; } rep = {.f = x};
60 return rep.i;
61}
62
63static inline dst_t dstFromRep(dst_rep_t x) {
64 const union { dst_t f; dst_rep_t i; } rep = {.i = x};
65 return rep.f;
66}
67
68// End helper routines. Conversion implementation follows.
69
70dst_t widen(src_t a) {
71
72 // Various constants whose values follow from the type parameters.
73 // Any reasonable optimizer will fold and propagate all of these.
74 const int srcBits = sizeof(src_t)*CHAR_BIT;
75 const int srcExpBits = srcBits - srcSigBits - 1;
76 const int srcInfExp = (1 << srcExpBits) - 1;
77 const int srcExpBias = srcInfExp >> 1;
78 const src_rep_t srcMinNormal = SRC_REP_C(1) << srcSigBits;
79 const src_rep_t srcInfinity = (src_rep_t)srcInfExp << srcSigBits;
80 const src_rep_t srcSignMask = SRC_REP_C(1) << (srcSigBits + srcExpBits);
81 const src_rep_t srcAbsMask = srcSignMask - 1;
82 const src_rep_t srcQNaN = SRC_REP_C(1) << (srcSigBits - 1);
83 const src_rep_t srcNaNCode = srcQNaN - 1;
84 const int dstBits = sizeof(dst_t)*CHAR_BIT;
85 const int dstExpBits = dstBits - dstSigBits - 1;
86 const int dstInfExp = (1 << dstExpBits) - 1;
87 const int dstExpBias = dstInfExp >> 1;
88 const dst_rep_t dstMinNormal = DST_REP_C(1) << dstSigBits;
89
90 // Break a into a sign and representation of the absolute value
91 src_rep_t aRep = srcToRep(a);
92 src_rep_t aAbs = aRep & srcAbsMask;
93 src_rep_t sign = aRep & srcSignMask;
94 dst_rep_t absResult;
95
96 if (aAbs - srcMinNormal < srcInfinity - srcMinNormal) {
97 // a is a normal number.
98 // Extend to the destination type by shifting the significand and
99 // exponent into the proper position and rebiasing the exponent.
100 absResult = (dst_rep_t)aAbs << (dstSigBits - srcSigBits);
101 absResult += (dst_rep_t)(dstExpBias - srcExpBias) << dstSigBits;
102 }
103
104 else if (aAbs >= srcInfinity) {
105 // a is NaN or infinity.
106 // Conjure the result by beginning with infinity, then setting the qNaN
107 // bit if appropriate and then by right-aligning the rest of the
108 // trailing NaN payload field.
109 absResult = (dst_rep_t)dstInfExp << dstSigBits;
110 absResult |= (dst_rep_t)(aAbs & srcQNaN) << (dstSigBits - srcSigBits);
111 absResult |= (aAbs & srcNaNCode);
112 }
113
114 else if (aAbs) {
115 // a is denormal.
116 // renormalize the significand and clear the leading bit, then insert
117 // the correct adjusted exponent in the destination type.
118 const int scale = src_rep_t_clz(aAbs) - src_rep_t_clz(srcMinNormal);
119 absResult = (dst_rep_t)aAbs << (dstSigBits - srcSigBits + scale);
120 absResult ^= dstMinNormal;
121 const int resultExponent = dstExpBias - srcExpBias - scale + 1;
122 absResult |= (dst_rep_t)resultExponent << dstSigBits;
123 }
124
125 else {
126 // a is zero.
127 absResult = 0;
128 }
129
130 // Apply the signbit to (dst_t)abs(a).
131 dst_rep_t result = absResult | (dst_rep_t)sign << (dstBits - srcBits);
132 return dstFromRep(result);
133}