[CIR] Upstream local VectorType with 0 init elements #138346

AmrDeveloper · 2025-05-02T21:14:00Z

This change adds local zero initialization for VectorType

Issue #136487

llvmbot · 2025-05-02T21:14:38Z

@llvm/pr-subscribers-clang

@llvm/pr-subscribers-clangir

Author: Amr Hesham (AmrDeveloper)

Changes

This change adds local zero initialization for VectorType

Issue #136487

Full diff: https://github.com/llvm/llvm-project/pull/138346.diff

3 Files Affected:

(modified) clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp (+6-5)
(modified) clang/test/CIR/CodeGen/vector-ext.cpp (+9)
(modified) clang/test/CIR/CodeGen/vector.cpp (+9)

diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
index 8ead6e793b4c8..087f480bd008e 100644
--- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
@@ -1684,11 +1684,6 @@ mlir::Value ScalarExprEmitter::VisitInitListExpr(InitListExpr *e) {
     return {};
   }
 
-  if (numInitElements == 0) {
-    cgf.cgm.errorNYI(e->getSourceRange(), "InitListExpr with 0 init elements");
-    return {};
-  }
-
   if (e->getType()->isVectorType()) {
     const auto vectorType =
         mlir::cast<cir::VectorType>(cgf.convertType(e->getType()));
@@ -1710,6 +1705,12 @@ mlir::Value ScalarExprEmitter::VisitInitListExpr(InitListExpr *e) {
         cgf.getLoc(e->getSourceRange()), vectorType, elements);
   }
 
+  if (numInitElements == 0) {
+    cgf.cgm.errorNYI(e->getSourceRange(),
+                     "InitListExpr Non VectorType with 0 init elements");
+    return {};
+  }
+
   return Visit(e->getInit(0));
 }
 
diff --git a/clang/test/CIR/CodeGen/vector-ext.cpp b/clang/test/CIR/CodeGen/vector-ext.cpp
index a3880a944de1f..10431bf1c43cb 100644
--- a/clang/test/CIR/CodeGen/vector-ext.cpp
+++ b/clang/test/CIR/CodeGen/vector-ext.cpp
@@ -61,6 +61,8 @@ void foo() {
   vi4 f = { x, 5, 6, x + 1 };
 
   vi4 g = { 5 };
+
+  vi4 h = {};
 }
 
 // CIR: %[[VEC_A:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["a"]
@@ -70,12 +72,15 @@ void foo() {
 // CIR: %[[VEC_E:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["e", init]
 // CIR: %[[VEC_F:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["f", init]
 // CIR: %[[VEC_G:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["g", init]
+// CIR: %[[VEC_H:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["h", init]
 // CIR: %[[VEC_E_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>
 // CIR: cir.store %[[VEC_E_VAL]], %[[VEC_E]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
 // CIR: %[[VEC_F_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>
 // CIR: cir.store %[[VEC_F_VAL]], %[[VEC_F]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
 // CIR: %[[VEC_G_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>
 // CIR: cir.store %[[VEC_G_VAL]], %[[VEC_G]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
+// CIR: %[[VEC_H_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>
+// CIR: cir.store %[[VEC_H_VAL]], %[[VEC_H]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
 
 // LLVM: %[[VEC_A:.*]] = alloca <4 x i32>, i64 1, align 16
 // LLVM: %[[VEC_B:.*]] = alloca <3 x i32>, i64 1, align 16
@@ -84,9 +89,11 @@ void foo() {
 // LLVM: %[[VEC_E:.*]] = alloca <4 x i32>, i64 1, align 16
 // LLVM: %[[VEC_F:.*]] = alloca <4 x i32>, i64 1, align 16
 // LLVM: %[[VEC_G:.*]] = alloca <4 x i32>, i64 1, align 16
+// LLVM: %[[VEC_H:.*]] = alloca <4 x i32>, i64 1, align 16
 // LLVM: store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %[[VEC_E]], align 16
 // LLVM: store <4 x i32> {{.*}}, ptr %[[VEC_F]], align 16
 // LLVM: store <4 x i32> <i32 5, i32 0, i32 0, i32 0>, ptr %[[VEC_G]], align 16
+// LLVM: store <4 x i32> zeroinitializer, ptr %[[VEC_H]], align 16
 
 // OGCG: %[[VEC_A:.*]] = alloca <4 x i32>, align 16
 // OGCG: %[[VEC_B:.*]] = alloca <3 x i32>, align 16
@@ -95,9 +102,11 @@ void foo() {
 // OGCG: %[[VEC_E:.*]] = alloca <4 x i32>, align 16
 // OGCG: %[[VEC_F:.*]] = alloca <4 x i32>, align 16
 // OGCG: %[[VEC_G:.*]] = alloca <4 x i32>, align 16
+// OGCG: %[[VEC_H:.*]] = alloca <4 x i32>, align 16
 // OGCG: store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %[[VEC_E]], align 16
 // OGCG: store <4 x i32> {{.*}}, ptr %[[VEC_F]], align 16
 // OGCG: store <4 x i32> <i32 5, i32 0, i32 0, i32 0>, ptr %[[VEC_G]], align 16
+// OGCG: store <4 x i32> zeroinitializer, ptr %[[VEC_H]], align 16
 
 void foo2(vi4 p) {}
 
diff --git a/clang/test/CIR/CodeGen/vector.cpp b/clang/test/CIR/CodeGen/vector.cpp
index 76a85eab52380..2c7ea936e20c1 100644
--- a/clang/test/CIR/CodeGen/vector.cpp
+++ b/clang/test/CIR/CodeGen/vector.cpp
@@ -51,6 +51,8 @@ void foo() {
   vi4 e = { x, 5, 6, x + 1 };
 
   vi4 f = { 5 };
+
+  vi4 g = {};
 }
 
 // CIR: %[[VEC_A:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["a"]
@@ -59,12 +61,15 @@ void foo() {
 // CIR: %[[VEC_D:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["d", init]
 // CIR: %[[VEC_E:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["e", init]
 // CIR: %[[VEC_F:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["f", init]
+// CIR: %[[VEC_H:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["g", init]
 // CIR: %[[VEC_D_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>
 // CIR: cir.store %[[VEC_D_VAL]], %[[VEC_D]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
 // CIR: %[[VEC_E_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>
 // CIR: cir.store %[[VEC_E_VAL]], %[[VEC_E]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
 // CIR: %[[VEC_F_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>
 // CIR: cir.store %[[VEC_F_VAL]], %[[VEC_F]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
+// CIR: %[[VEC_G_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>
+// CIR: cir.store %[[VEC_G_VAL]], %[[VEC_H]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
 
 // LLVM: %[[VEC_A:.*]] = alloca <4 x i32>, i64 1, align 16
 // LLVM: %[[VEC_B:.*]] = alloca <2 x double>, i64 1, align 16
@@ -72,9 +77,11 @@ void foo() {
 // LLVM: %[[VEC_D:.*]] = alloca <4 x i32>, i64 1, align 16
 // LLVM: %[[VEC_E:.*]] = alloca <4 x i32>, i64 1, align 16
 // LLVM: %[[VEC_F:.*]] = alloca <4 x i32>, i64 1, align 16
+// LLVM: %[[VEC_G:.*]] = alloca <4 x i32>, i64 1, align 16
 // LLVM: store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %[[VEC_D]], align 16
 // LLVM: store <4 x i32> {{.*}}, ptr %[[VEC_E]], align 16
 // LLVM: store <4 x i32> <i32 5, i32 0, i32 0, i32 0>, ptr %[[VEC_F]], align 16
+// LLVM: store <4 x i32> zeroinitializer, ptr %[[VEC_G]], align 16
 
 // OGCG: %[[VEC_A:.*]] = alloca <4 x i32>, align 16
 // OGCG: %[[VEC_B:.*]] = alloca <2 x double>, align 16
@@ -82,9 +89,11 @@ void foo() {
 // OGCG: %[[VEC_D:.*]] = alloca <4 x i32>, align 16
 // OGCG: %[[VEC_E:.*]] = alloca <4 x i32>, align 16
 // OGCG: %[[VEC_F:.*]] = alloca <4 x i32>, align 16
+// OGCG: %[[VEC_G:.*]] = alloca <4 x i32>, align 16
 // OGCG: store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %[[VEC_D]], align 16
 // OGCG: store <4 x i32> {{.*}}, ptr %[[VEC_E]], align 16
 // OGCG: store <4 x i32> <i32 5, i32 0, i32 0, i32 0>, ptr %[[VEC_F]], align 16
+// OGCG: store <4 x i32> zeroinitializer, ptr %[[VEC_G]], align 16
 
 void foo2(vi4 p) {}

erichkeane · 2025-05-02T21:34:56Z

clang/test/CIR/CodeGen/vector-ext.cpp

 // CIR: %[[VEC_E_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>
 // CIR: cir.store %[[VEC_E_VAL]], %[[VEC_E]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
 // CIR: %[[VEC_F_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>
 // CIR: cir.store %[[VEC_F_VAL]], %[[VEC_F]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
 // CIR: %[[VEC_G_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>
 // CIR: cir.store %[[VEC_G_VAL]], %[[VEC_G]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
+// CIR: %[[VEC_H_VAL:.*]] = cir.vec.create({{.*}}, {{.*}}, {{.*}}, {{.*}} : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>


Does this init with zeros? Can you show the back-fill with zeros here? It would be nice for hte others to show it as well, but I see you didn't fill much of the values into the test above, which I would prefer we did.

Yes, they init with zeros

%1 = cir.const #cir.int<0> : !s32i %2 = cir.vec.create(%1, %1, %1, %1 : !s32i, !s32i, !s32i, !s32i) : !cir.vector<4 x !s32i>

It would be nice for hte others to show it as well,

I agree, I will update the test to include values

Done 👍🏻

If there are no other comments, I can merge it 🤔

andykaylor

lgtm

This change adds local zero initialization for VectorType Issue llvm#136487

[CIR] Upstream local VectorType with 0 init elemnts

821d56d

AmrDeveloper requested review from AaronBallman, xlauko, erichkeane, dkolsen-pgi and andykaylor May 2, 2025 21:14

AmrDeveloper requested review from lanza and bcardosolopes as code owners May 2, 2025 21:14

AmrDeveloper changed the title ~~[CIR] Upstream local VectorType with 0 init elemnts~~ [CIR] Upstream local VectorType with 0 init elements May 2, 2025

llvmbot added clang Clang issues not falling into any other category ClangIR Anything related to the ClangIR project labels May 2, 2025

erichkeane reviewed May 2, 2025

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Add Values before vec.create in the test

b3d2a4e

AmrDeveloper force-pushed the cir_upstream_vector_zero_elts branch from 266d3c6 to b3d2a4e Compare May 2, 2025 22:20

andykaylor approved these changes May 2, 2025

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erichkeane approved these changes May 5, 2025

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AmrDeveloper merged commit f5b7d42 into llvm:main May 5, 2025
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GeorgeARM pushed a commit to GeorgeARM/llvm-project that referenced this pull request May 7, 2025

[CIR] Upstream local VectorType with 0 init elements (llvm#138346)

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This change adds local zero initialization for VectorType Issue llvm#136487

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[CIR] Upstream local VectorType with 0 init elements #138346

[CIR] Upstream local VectorType with 0 init elements #138346

AmrDeveloper commented May 2, 2025

llvmbot commented May 2, 2025 •

edited

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[CIR] Upstream local VectorType with 0 init elements #138346

[CIR] Upstream local VectorType with 0 init elements #138346

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