Open Source VHDL/Verilog Software Development Software

We provide MATLAB and Verilog Models of GeAr, and previously proposed adders (ACA-I, ETAII, ACA-II and GDA) at http://sourceforge.net/projects/approxadderlib/ GeAr is a low latency Generic Accuracy Configurable Adder that provides a higher number of potential configurations compared to state-of-the-art approximate adders, thus enabling a high degree of flexibility and trade-off between performance and output quality. These MATALB and Verilog models can allow software programmer as well as hardware designers to evaluate their code and design. To the best of our knowledge, this is the first open-source library of approximate adders that facilitates reproducible comparisons and further research and development in this direction across various layers of design abstraction. This work is a result of collaborative effort between Chair for Embedded Systems (CES) at Karlsruhe Institute of Technology (KIT), Germany and Vision Image and Signal Processing (VISpro) Lab at SEECS-NUST, Pakistan.

This project aims to develop a colour-based vision processing system for use in RoboCup. We are using a CCD camera for input to an FPGA. The system locates coloured objects and outputs detected corners.

Video and files download for Visual trading idea to C++ or FPGA HFT Meetup File download sample: test model (Matlab 2014b with Visual Studio 2013 C++ project generated) Powerpoint MATLAB SIMULINK http://quantlabs.net/blog/2015/04/video-and-files-download-for-visual-trading-idea-to-c-or-fpga-hft-meetup/

The project goal is to develop several IP cores that would implement artificial neural networks using FPGA resources. These cores will be designed in such a way to allow easy integration in the Xilinx EDK framework.