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MLIR Teamf28e4df2018-11-01 14:26:001//===- LoopFusion.cpp - Code to perform loop fusion -----------------------===//
2//
3// Copyright 2019 The MLIR Authors.
4//
5// Licensed under the Apache License, Version 2.0 (the "License");
6// you may not use this file except in compliance with the License.
7// You may obtain a copy of the License at
8//
9// http://www.apache.org/licenses/LICENSE-2.0
10//
11// Unless required by applicable law or agreed to in writing, software
12// distributed under the License is distributed on an "AS IS" BASIS,
13// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14// See the License for the specific language governing permissions and
15// limitations under the License.
16// =============================================================================
17//
18// This file implements loop fusion.
19//
20//===----------------------------------------------------------------------===//
21
River Riddle75553832019-01-29 05:23:5322#include "mlir/AffineOps/AffineOps.h"
MLIR Teamf28e4df2018-11-01 14:26:0023#include "mlir/Analysis/AffineAnalysis.h"
Uday Bondhuguladfe07b72019-02-23 00:51:0824#include "mlir/Analysis/AffineStructures.h"
MLIR Teamf28e4df2018-11-01 14:26:0025#include "mlir/Analysis/LoopAnalysis.h"
MLIR Team3b692302018-12-17 17:57:1426#include "mlir/Analysis/Utils.h"
MLIR Teamf28e4df2018-11-01 14:26:0027#include "mlir/IR/AffineExpr.h"
28#include "mlir/IR/AffineMap.h"
29#include "mlir/IR/Builders.h"
River Riddle48ccae22019-02-20 01:17:4630#include "mlir/Pass/Pass.h"
Lei Zhang85d9b6c2019-03-01 21:48:2431#include "mlir/StandardOps/Ops.h"
Andy Davisa560f2c2019-05-24 17:54:2232#include "mlir/Transforms/LoopFusionUtils.h"
MLIR Teamf28e4df2018-11-01 14:26:0033#include "mlir/Transforms/LoopUtils.h"
34#include "mlir/Transforms/Passes.h"
MLIR Teamc4237ae2019-01-18 16:56:2735#include "mlir/Transforms/Utils.h"
MLIR Teamf28e4df2018-11-01 14:26:0036#include "llvm/ADT/DenseMap.h"
MLIR Team3b692302018-12-17 17:57:1437#include "llvm/ADT/DenseSet.h"
38#include "llvm/ADT/SetVector.h"
MLIR Team4eef7952018-12-21 19:06:2339#include "llvm/Support/CommandLine.h"
MLIR Team38c2fe32019-01-14 19:26:2540#include "llvm/Support/Debug.h"
MLIR Team3b692302018-12-17 17:57:1441#include "llvm/Support/raw_ostream.h"
Uday Bondhugula864d9e02019-01-23 17:16:2442#include <iomanip>
Stella Laurenzo1a2ad062019-05-14 01:10:4843#include <sstream>
Nicolas Vasilache258e8d92019-05-03 18:07:3744#define DEBUG_TYPE "affine-loop-fusion"
MLIR Team38c2fe32019-01-14 19:26:2545
MLIR Team3b692302018-12-17 17:57:1446using llvm::SetVector;
MLIR Teamf28e4df2018-11-01 14:26:0047
48using namespace mlir;
49
River Riddle75c21e12019-01-26 06:14:0450static llvm::cl::OptionCategory clOptionsCategory(DEBUG_TYPE " options");
51
Uday Bondhugulace7e59532019-03-08 17:21:5252/// Disables fusion profitability check and fuses if valid. Ignore any
53/// additional (redundant) computation tolerance threshold
54/// that would have prevented fusion.
MLIR Teamc4237ae2019-01-18 16:56:2755static llvm::cl::opt<bool>
Uday Bondhugulaeee85362019-03-02 01:42:1356 clMaximalLoopFusion("fusion-maximal",
River Riddle75c21e12019-01-26 06:14:0457 llvm::cl::desc("Enables maximal loop fusion"),
58 llvm::cl::cat(clOptionsCategory));
Uday Bondhugula864d9e02019-01-23 17:16:2459
60/// A threshold in percent of additional computation allowed when fusing.
61static llvm::cl::opt<double> clFusionAddlComputeTolerance(
Uday Bondhugulaeee85362019-03-02 01:42:1362 "fusion-compute-tolerance",
Uday Bondhugulaa1dad3a2019-02-20 02:17:1963 llvm::cl::desc("Fractional increase in additional "
64 "computation tolerated while fusing"),
River Riddle75c21e12019-01-26 06:14:0465 llvm::cl::cat(clOptionsCategory));
MLIR Teamc4237ae2019-01-18 16:56:2766
Uday Bondhugula8be26272019-02-02 01:06:2267static llvm::cl::opt<unsigned> clFusionFastMemorySpace(
Uday Bondhugulaeee85362019-03-02 01:42:1368 "fusion-fast-mem-space",
Uday Bondhugula8be26272019-02-02 01:06:2269 llvm::cl::desc("Faster memory space number to promote fusion buffers to"),
70 llvm::cl::cat(clOptionsCategory));
71
Uday Bondhugulace7e59532019-03-08 17:21:5272// A local buffer of size less than or equal to this size is automatically
73// promoted to fast memory after producer-consumer fusion.
Uday Bondhugulad4b3ff12019-02-27 00:10:1974static llvm::cl::opt<unsigned long long> clFusionLocalBufThreshold(
Uday Bondhugulaeee85362019-03-02 01:42:1375 "fusion-local-buf-threshold",
Uday Bondhugulad4b3ff12019-02-27 00:10:1976 llvm::cl::desc("Threshold size (KiB) for promoting local buffers to fast "
Uday Bondhugula8be26272019-02-02 01:06:2277 "memory space"),
78 llvm::cl::cat(clOptionsCategory));
79
MLIR Teamf28e4df2018-11-01 14:26:0080namespace {
81
MLIR Team3b692302018-12-17 17:57:1482/// Loop fusion pass. This pass currently supports a greedy fusion policy,
83/// which fuses loop nests with single-writer/single-reader memref dependences
84/// with the goal of improving locality.
85
86// TODO(andydavis) Support fusion of source loop nests which write to multiple
87// memrefs, where each memref can have multiple users (if profitable).
MLIR Teamf28e4df2018-11-01 14:26:0088// TODO(andydavis) Extend this pass to check for fusion preventing dependences,
89// and add support for more general loop fusion algorithms.
MLIR Team3b692302018-12-17 17:57:1490
River Riddlec6c53442019-02-27 18:59:2991struct LoopFusion : public FunctionPass<LoopFusion> {
Uday Bondhugulace7e59532019-03-08 17:21:5292 LoopFusion(unsigned fastMemorySpace = 0, uint64_t localBufSizeThreshold = 0,
93 bool maximalFusion = false)
River Riddlec6c53442019-02-27 18:59:2994 : localBufSizeThreshold(localBufSizeThreshold),
Uday Bondhugulace7e59532019-03-08 17:21:5295 fastMemorySpace(fastMemorySpace), maximalFusion(maximalFusion) {}
MLIR Teamf28e4df2018-11-01 14:26:0096
River Riddleed5fe202019-02-28 22:50:4297 void runOnFunction() override;
Uday Bondhugula864d9e02019-01-23 17:16:2498
Uday Bondhugulad4b3ff12019-02-27 00:10:1999 // Any local buffers smaller than this size (in bytes) will be created in
Uday Bondhugula8be26272019-02-02 01:06:22100 // `fastMemorySpace` if provided.
Uday Bondhugulad4b3ff12019-02-27 00:10:19101 uint64_t localBufSizeThreshold;
Uday Bondhugula8be26272019-02-02 01:06:22102 Optional<unsigned> fastMemorySpace = None;
Uday Bondhugulace7e59532019-03-08 17:21:52103 // If true, ignore any additional (redundant) computation tolerance threshold
104 // that would have prevented fusion.
105 bool maximalFusion;
Uday Bondhugula8be26272019-02-02 01:06:22106
Uday Bondhugula864d9e02019-01-23 17:16:24107 // The amount of additional computation that is tolerated while fusing
108 // pair-wise as a fraction of the total computation.
109 constexpr static double kComputeToleranceThreshold = 0.30f;
MLIR Teamf28e4df2018-11-01 14:26:00110};
111
MLIR Teamf28e4df2018-11-01 14:26:00112} // end anonymous namespace
113
Mehdi Amini926fb682019-08-13 02:12:42114std::unique_ptr<FunctionPassBase>
115mlir::createLoopFusionPass(unsigned fastMemorySpace,
116 uint64_t localBufSizeThreshold, bool maximalFusion) {
Jacques Pienaar79f53b02019-08-17 18:05:35117 return std::make_unique<LoopFusion>(fastMemorySpace, localBufSizeThreshold,
118 maximalFusion);
Uday Bondhugulad4b3ff12019-02-27 00:10:19119}
MLIR Teamf28e4df2018-11-01 14:26:00120
MLIR Team3b692302018-12-17 17:57:14121namespace {
MLIR Teamf28e4df2018-11-01 14:26:00122
MLIR Team3b692302018-12-17 17:57:14123// LoopNestStateCollector walks loop nests and collects load and store
Chris Lattner456ad6a2018-12-29 00:05:35124// operations, and whether or not an IfInst was encountered in the loop nest.
River Riddlebf9c3812019-02-05 00:24:44125struct LoopNestStateCollector {
Chris Lattnerd9b5bc82019-03-25 02:53:05126 SmallVector<AffineForOp, 4> forOps;
River Riddle99b87c92019-03-27 21:02:02127 SmallVector<Operation *, 4> loadOpInsts;
128 SmallVector<Operation *, 4> storeOpInsts;
River Riddle75553832019-01-29 05:23:53129 bool hasNonForRegion = false;
MLIR Team3b692302018-12-17 17:57:14130
River Riddle99b87c92019-03-27 21:02:02131 void collect(Operation *opToWalk) {
132 opToWalk->walk([&](Operation *op) {
River Riddled5b60ee82019-05-12 01:59:54133 if (isa<AffineForOp>(op))
River Riddleadca3c22019-05-12 00:57:32134 forOps.push_back(cast<AffineForOp>(op));
River Riddle99b87c92019-03-27 21:02:02135 else if (op->getNumRegions() != 0)
River Riddlebf9c3812019-02-05 00:24:44136 hasNonForRegion = true;
Andy Davis2e1187d2019-07-03 17:35:03137 else if (isa<AffineLoadOp>(op))
River Riddle99b87c92019-03-27 21:02:02138 loadOpInsts.push_back(op);
Andy Davis2e1187d2019-07-03 17:35:03139 else if (isa<AffineStoreOp>(op))
River Riddle99b87c92019-03-27 21:02:02140 storeOpInsts.push_back(op);
River Riddlebf9c3812019-02-05 00:24:44141 });
MLIR Team3b692302018-12-17 17:57:14142 }
143};
144
MLIR Team71495d52019-01-22 21:23:37145// TODO(b/117228571) Replace when this is modeled through side-effects/op traits
River Riddle99b87c92019-03-27 21:02:02146static bool isMemRefDereferencingOp(Operation &op) {
Andy Davis2e1187d2019-07-03 17:35:03147 if (isa<AffineLoadOp>(op) || isa<AffineStoreOp>(op) ||
148 isa<AffineDmaStartOp>(op) || isa<AffineDmaWaitOp>(op))
MLIR Team71495d52019-01-22 21:23:37149 return true;
150 return false;
151}
MLIR Teamd038e342019-03-01 19:50:25152
MLIR Team6892ffb2018-12-20 04:42:55153// MemRefDependenceGraph is a graph data structure where graph nodes are
River Riddle8c443672019-07-09 23:17:55154// top-level operations in a FuncOp which contain load/store ops, and edges
MLIR Team6892ffb2018-12-20 04:42:55155// are memref dependences between the nodes.
MLIR Teamc4237ae2019-01-18 16:56:27156// TODO(andydavis) Add a more flexible dependece graph representation.
MLIR Team6892ffb2018-12-20 04:42:55157// TODO(andydavis) Add a depth parameter to dependence graph construction.
158struct MemRefDependenceGraph {
159public:
160 // Node represents a node in the graph. A Node is either an entire loop nest
161 // rooted at the top level which contains loads/stores, or a top level
162 // load/store.
163 struct Node {
164 // The unique identifier of this node in the graph.
165 unsigned id;
Amit Sabne70a416d2019-04-09 16:17:40166 // The top-level statement which is (or contains) a load/store.
River Riddle99b87c92019-03-27 21:02:02167 Operation *op;
Chris Lattner5187cfc2018-12-28 05:21:41168 // List of load operations.
River Riddle99b87c92019-03-27 21:02:02169 SmallVector<Operation *, 4> loads;
Chris Lattner456ad6a2018-12-29 00:05:35170 // List of store op insts.
River Riddle99b87c92019-03-27 21:02:02171 SmallVector<Operation *, 4> stores;
172 Node(unsigned id, Operation *op) : id(id), op(op) {}
MLIR Team6892ffb2018-12-20 04:42:55173
174 // Returns the load op count for 'memref'.
Chris Lattner3f190312018-12-27 22:35:10175 unsigned getLoadOpCount(Value *memref) {
MLIR Team6892ffb2018-12-20 04:42:55176 unsigned loadOpCount = 0;
Chris Lattner456ad6a2018-12-29 00:05:35177 for (auto *loadOpInst : loads) {
Andy Davis2e1187d2019-07-03 17:35:03178 if (memref == cast<AffineLoadOp>(loadOpInst).getMemRef())
MLIR Team6892ffb2018-12-20 04:42:55179 ++loadOpCount;
180 }
181 return loadOpCount;
182 }
183
184 // Returns the store op count for 'memref'.
Chris Lattner3f190312018-12-27 22:35:10185 unsigned getStoreOpCount(Value *memref) {
MLIR Team6892ffb2018-12-20 04:42:55186 unsigned storeOpCount = 0;
Chris Lattner456ad6a2018-12-29 00:05:35187 for (auto *storeOpInst : stores) {
Andy Davis2e1187d2019-07-03 17:35:03188 if (memref == cast<AffineStoreOp>(storeOpInst).getMemRef())
MLIR Team6892ffb2018-12-20 04:42:55189 ++storeOpCount;
190 }
191 return storeOpCount;
192 }
MLIR Team58aa3832019-02-16 01:12:19193
MLIR Teamd038e342019-03-01 19:50:25194 // Returns all store ops in 'storeOps' which access 'memref'.
MLIR Team58aa3832019-02-16 01:12:19195 void getStoreOpsForMemref(Value *memref,
River Riddle99b87c92019-03-27 21:02:02196 SmallVectorImpl<Operation *> *storeOps) {
MLIR Team58aa3832019-02-16 01:12:19197 for (auto *storeOpInst : stores) {
Andy Davis2e1187d2019-07-03 17:35:03198 if (memref == cast<AffineStoreOp>(storeOpInst).getMemRef())
MLIR Team58aa3832019-02-16 01:12:19199 storeOps->push_back(storeOpInst);
200 }
201 }
MLIR Teamd038e342019-03-01 19:50:25202
203 // Returns all load ops in 'loadOps' which access 'memref'.
204 void getLoadOpsForMemref(Value *memref,
River Riddle99b87c92019-03-27 21:02:02205 SmallVectorImpl<Operation *> *loadOps) {
MLIR Teamd038e342019-03-01 19:50:25206 for (auto *loadOpInst : loads) {
Andy Davis2e1187d2019-07-03 17:35:03207 if (memref == cast<AffineLoadOp>(loadOpInst).getMemRef())
MLIR Teamd038e342019-03-01 19:50:25208 loadOps->push_back(loadOpInst);
209 }
210 }
211
212 // Returns all memrefs in 'loadAndStoreMemrefSet' for which this node
213 // has at least one load and store operation.
214 void getLoadAndStoreMemrefSet(DenseSet<Value *> *loadAndStoreMemrefSet) {
215 llvm::SmallDenseSet<Value *, 2> loadMemrefs;
216 for (auto *loadOpInst : loads) {
Andy Davis2e1187d2019-07-03 17:35:03217 loadMemrefs.insert(cast<AffineLoadOp>(loadOpInst).getMemRef());
MLIR Teamd038e342019-03-01 19:50:25218 }
219 for (auto *storeOpInst : stores) {
Andy Davis2e1187d2019-07-03 17:35:03220 auto *memref = cast<AffineStoreOp>(storeOpInst).getMemRef();
MLIR Teamd038e342019-03-01 19:50:25221 if (loadMemrefs.count(memref) > 0)
222 loadAndStoreMemrefSet->insert(memref);
223 }
224 }
MLIR Team6892ffb2018-12-20 04:42:55225 };
226
MLIR Teama0f3db402019-01-29 17:36:41227 // Edge represents a data dependece between nodes in the graph.
MLIR Team6892ffb2018-12-20 04:42:55228 struct Edge {
229 // The id of the node at the other end of the edge.
MLIR Team1e851912019-01-31 00:01:46230 // If this edge is stored in Edge = Node.inEdges[i], then
231 // 'Node.inEdges[i].id' is the identifier of the source node of the edge.
232 // If this edge is stored in Edge = Node.outEdges[i], then
233 // 'Node.outEdges[i].id' is the identifier of the dest node of the edge.
MLIR Team6892ffb2018-12-20 04:42:55234 unsigned id;
MLIR Teama0f3db402019-01-29 17:36:41235 // The SSA value on which this edge represents a dependence.
236 // If the value is a memref, then the dependence is between graph nodes
237 // which contain accesses to the same memref 'value'. If the value is a
238 // non-memref value, then the dependence is between a graph node which
239 // defines an SSA value and another graph node which uses the SSA value
River Riddle99b87c92019-03-27 21:02:02240 // (e.g. a constant operation defining a value which is used inside a loop
MLIR Teama0f3db402019-01-29 17:36:41241 // nest).
242 Value *value;
MLIR Team6892ffb2018-12-20 04:42:55243 };
244
245 // Map from node id to Node.
246 DenseMap<unsigned, Node> nodes;
247 // Map from node id to list of input edges.
248 DenseMap<unsigned, SmallVector<Edge, 2>> inEdges;
249 // Map from node id to list of output edges.
250 DenseMap<unsigned, SmallVector<Edge, 2>> outEdges;
MLIR Teamc4237ae2019-01-18 16:56:27251 // Map from memref to a count on the dependence edges associated with that
252 // memref.
253 DenseMap<Value *, unsigned> memrefEdgeCount;
MLIR Teama0f3db402019-01-29 17:36:41254 // The next unique identifier to use for newly created graph nodes.
255 unsigned nextNodeId = 0;
MLIR Team6892ffb2018-12-20 04:42:55256
257 MemRefDependenceGraph() {}
258
259 // Initializes the dependence graph based on operations in 'f'.
260 // Returns true on success, false otherwise.
River Riddle8c443672019-07-09 23:17:55261 bool init(FuncOp f);
MLIR Team6892ffb2018-12-20 04:42:55262
263 // Returns the graph node for 'id'.
264 Node *getNode(unsigned id) {
265 auto it = nodes.find(id);
266 assert(it != nodes.end());
267 return &it->second;
268 }
269
MLIR Team9d30b362019-03-29 15:06:25270 // Returns the graph node for 'forOp'.
271 Node *getForOpNode(AffineForOp forOp) {
272 for (auto &idAndNode : nodes)
273 if (idAndNode.second.op == forOp.getOperation())
274 return &idAndNode.second;
275 return nullptr;
276 }
277
River Riddle99b87c92019-03-27 21:02:02278 // Adds a node with 'op' to the graph and returns its unique identifier.
279 unsigned addNode(Operation *op) {
280 Node node(nextNodeId++, op);
MLIR Teama0f3db402019-01-29 17:36:41281 nodes.insert({node.id, node});
282 return node.id;
283 }
284
MLIR Teamc4237ae2019-01-18 16:56:27285 // Remove node 'id' (and its associated edges) from graph.
286 void removeNode(unsigned id) {
287 // Remove each edge in 'inEdges[id]'.
288 if (inEdges.count(id) > 0) {
289 SmallVector<Edge, 2> oldInEdges = inEdges[id];
290 for (auto &inEdge : oldInEdges) {
MLIR Teama0f3db402019-01-29 17:36:41291 removeEdge(inEdge.id, id, inEdge.value);
MLIR Teamc4237ae2019-01-18 16:56:27292 }
293 }
294 // Remove each edge in 'outEdges[id]'.
295 if (outEdges.count(id) > 0) {
296 SmallVector<Edge, 2> oldOutEdges = outEdges[id];
297 for (auto &outEdge : oldOutEdges) {
MLIR Teama0f3db402019-01-29 17:36:41298 removeEdge(id, outEdge.id, outEdge.value);
MLIR Teamc4237ae2019-01-18 16:56:27299 }
300 }
301 // Erase remaining node state.
302 inEdges.erase(id);
303 outEdges.erase(id);
304 nodes.erase(id);
305 }
306
MLIR Teamd7c82442019-01-30 23:53:41307 // Returns true if node 'id' writes to any memref which escapes (or is an
308 // argument to) the function/block. Returns false otherwise.
309 bool writesToLiveInOrEscapingMemrefs(unsigned id) {
MLIR Team71495d52019-01-22 21:23:37310 Node *node = getNode(id);
311 for (auto *storeOpInst : node->stores) {
Andy Davis2e1187d2019-07-03 17:35:03312 auto *memref = cast<AffineStoreOp>(storeOpInst).getMemRef();
River Riddle99b87c92019-03-27 21:02:02313 auto *op = memref->getDefiningOp();
MLIR Team58aa3832019-02-16 01:12:19314 // Return true if 'memref' is a block argument.
River Riddle99b87c92019-03-27 21:02:02315 if (!op)
MLIR Teamd7c82442019-01-30 23:53:41316 return true;
MLIR Team58aa3832019-02-16 01:12:19317 // Return true if any use of 'memref' escapes the function.
River Riddle8780d8d2019-05-18 18:09:07318 for (auto *user : memref->getUsers())
319 if (!isMemRefDereferencingOp(*user))
MLIR Teamd7c82442019-01-30 23:53:41320 return true;
MLIR Teamd7c82442019-01-30 23:53:41321 }
322 return false;
323 }
324
325 // Returns true if node 'id' can be removed from the graph. Returns false
326 // otherwise. A node can be removed from the graph iff the following
327 // conditions are met:
328 // *) The node does not write to any memref which escapes (or is a
329 // function/block argument).
330 // *) The node has no successors in the dependence graph.
331 bool canRemoveNode(unsigned id) {
332 if (writesToLiveInOrEscapingMemrefs(id))
333 return false;
334 Node *node = getNode(id);
335 for (auto *storeOpInst : node->stores) {
MLIR Teama0f3db402019-01-29 17:36:41336 // Return false if there exist out edges from 'id' on 'memref'.
Andy Davis2e1187d2019-07-03 17:35:03337 if (getOutEdgeCount(id, cast<AffineStoreOp>(storeOpInst).getMemRef()) > 0)
MLIR Teama0f3db402019-01-29 17:36:41338 return false;
MLIR Team71495d52019-01-22 21:23:37339 }
MLIR Teama0f3db402019-01-29 17:36:41340 return true;
MLIR Team71495d52019-01-22 21:23:37341 }
342
MLIR Teamd038e342019-03-01 19:50:25343 // Returns true iff there is an edge from node 'srcId' to node 'dstId' which
344 // is for 'value' if non-null, or for any value otherwise. Returns false
345 // otherwise.
346 bool hasEdge(unsigned srcId, unsigned dstId, Value *value = nullptr) {
MLIR Team27d067e2019-01-16 17:55:02347 if (outEdges.count(srcId) == 0 || inEdges.count(dstId) == 0) {
348 return false;
349 }
350 bool hasOutEdge = llvm::any_of(outEdges[srcId], [=](Edge &edge) {
MLIR Teamd038e342019-03-01 19:50:25351 return edge.id == dstId && (!value || edge.value == value);
MLIR Team27d067e2019-01-16 17:55:02352 });
353 bool hasInEdge = llvm::any_of(inEdges[dstId], [=](Edge &edge) {
MLIR Teamd038e342019-03-01 19:50:25354 return edge.id == srcId && (!value || edge.value == value);
MLIR Team27d067e2019-01-16 17:55:02355 });
356 return hasOutEdge && hasInEdge;
357 }
358
MLIR Teama0f3db402019-01-29 17:36:41359 // Adds an edge from node 'srcId' to node 'dstId' for 'value'.
360 void addEdge(unsigned srcId, unsigned dstId, Value *value) {
361 if (!hasEdge(srcId, dstId, value)) {
362 outEdges[srcId].push_back({dstId, value});
363 inEdges[dstId].push_back({srcId, value});
364 if (value->getType().isa<MemRefType>())
365 memrefEdgeCount[value]++;
MLIR Team27d067e2019-01-16 17:55:02366 }
MLIR Team6892ffb2018-12-20 04:42:55367 }
368
MLIR Teama0f3db402019-01-29 17:36:41369 // Removes an edge from node 'srcId' to node 'dstId' for 'value'.
370 void removeEdge(unsigned srcId, unsigned dstId, Value *value) {
MLIR Team6892ffb2018-12-20 04:42:55371 assert(inEdges.count(dstId) > 0);
372 assert(outEdges.count(srcId) > 0);
MLIR Teama0f3db402019-01-29 17:36:41373 if (value->getType().isa<MemRefType>()) {
374 assert(memrefEdgeCount.count(value) > 0);
375 memrefEdgeCount[value]--;
376 }
MLIR Team6892ffb2018-12-20 04:42:55377 // Remove 'srcId' from 'inEdges[dstId]'.
378 for (auto it = inEdges[dstId].begin(); it != inEdges[dstId].end(); ++it) {
MLIR Teama0f3db402019-01-29 17:36:41379 if ((*it).id == srcId && (*it).value == value) {
MLIR Team6892ffb2018-12-20 04:42:55380 inEdges[dstId].erase(it);
381 break;
382 }
383 }
384 // Remove 'dstId' from 'outEdges[srcId]'.
385 for (auto it = outEdges[srcId].begin(); it != outEdges[srcId].end(); ++it) {
MLIR Teama0f3db402019-01-29 17:36:41386 if ((*it).id == dstId && (*it).value == value) {
MLIR Team6892ffb2018-12-20 04:42:55387 outEdges[srcId].erase(it);
388 break;
389 }
390 }
391 }
392
MLIR Teamd038e342019-03-01 19:50:25393 // Returns true if there is a path in the dependence graph from node 'srcId'
394 // to node 'dstId'. Returns false otherwise.
395 bool hasDependencePath(unsigned srcId, unsigned dstId) {
396 // Worklist state is: <node-id, next-output-edge-index-to-visit>
397 SmallVector<std::pair<unsigned, unsigned>, 4> worklist;
398 worklist.push_back({srcId, 0});
399 // Run DFS traversal to see if 'dstId' is reachable from 'srcId'.
400 while (!worklist.empty()) {
401 auto &idAndIndex = worklist.back();
402 // Return true if we have reached 'dstId'.
403 if (idAndIndex.first == dstId)
404 return true;
405 // Pop and continue if node has no out edges, or if all out edges have
406 // already been visited.
407 if (outEdges.count(idAndIndex.first) == 0 ||
408 idAndIndex.second == outEdges[idAndIndex.first].size()) {
409 worklist.pop_back();
410 continue;
411 }
412 // Get graph edge to traverse.
413 Edge edge = outEdges[idAndIndex.first][idAndIndex.second];
414 // Increment next output edge index for 'idAndIndex'.
415 ++idAndIndex.second;
416 // Add node at 'edge.id' to worklist.
417 worklist.push_back({edge.id, 0});
418 }
419 return false;
420 }
421
MLIR Teama0f3db402019-01-29 17:36:41422 // Returns the input edge count for node 'id' and 'memref' from src nodes
MLIR Teamd038e342019-03-01 19:50:25423 // which access 'memref' with a store operation.
MLIR Teama0f3db402019-01-29 17:36:41424 unsigned getIncomingMemRefAccesses(unsigned id, Value *memref) {
MLIR Team6892ffb2018-12-20 04:42:55425 unsigned inEdgeCount = 0;
426 if (inEdges.count(id) > 0)
427 for (auto &inEdge : inEdges[id])
MLIR Teama0f3db402019-01-29 17:36:41428 if (inEdge.value == memref) {
429 Node *srcNode = getNode(inEdge.id);
430 // Only count in edges from 'srcNode' if 'srcNode' accesses 'memref'
MLIR Teamd038e342019-03-01 19:50:25431 if (srcNode->getStoreOpCount(memref) > 0)
MLIR Teama0f3db402019-01-29 17:36:41432 ++inEdgeCount;
433 }
MLIR Team6892ffb2018-12-20 04:42:55434 return inEdgeCount;
435 }
436
MLIR Teamd038e342019-03-01 19:50:25437 // Returns the output edge count for node 'id' and 'memref' (if non-null),
438 // otherwise returns the total output edge count from node 'id'.
439 unsigned getOutEdgeCount(unsigned id, Value *memref = nullptr) {
MLIR Team6892ffb2018-12-20 04:42:55440 unsigned outEdgeCount = 0;
441 if (outEdges.count(id) > 0)
442 for (auto &outEdge : outEdges[id])
MLIR Teamd038e342019-03-01 19:50:25443 if (!memref || outEdge.value == memref)
MLIR Team6892ffb2018-12-20 04:42:55444 ++outEdgeCount;
445 return outEdgeCount;
446 }
447
River Riddle99b87c92019-03-27 21:02:02448 // Computes and returns an insertion point operation, before which the
MLIR Teama0f3db402019-01-29 17:36:41449 // the fused <srcId, dstId> loop nest can be inserted while preserving
450 // dependences. Returns nullptr if no such insertion point is found.
River Riddle99b87c92019-03-27 21:02:02451 Operation *getFusedLoopNestInsertionPoint(unsigned srcId, unsigned dstId) {
MLIR Team5c5739d2019-01-25 06:27:40452 if (outEdges.count(srcId) == 0)
River Riddle99b87c92019-03-27 21:02:02453 return getNode(dstId)->op;
MLIR Teama0f3db402019-01-29 17:36:41454
455 // Build set of insts in range (srcId, dstId) which depend on 'srcId'.
River Riddle99b87c92019-03-27 21:02:02456 SmallPtrSet<Operation *, 2> srcDepInsts;
MLIR Teama0f3db402019-01-29 17:36:41457 for (auto &outEdge : outEdges[srcId])
MLIR Teama78edcd2019-02-05 14:57:08458 if (outEdge.id != dstId)
River Riddle99b87c92019-03-27 21:02:02459 srcDepInsts.insert(getNode(outEdge.id)->op);
MLIR Teama0f3db402019-01-29 17:36:41460
461 // Build set of insts in range (srcId, dstId) on which 'dstId' depends.
River Riddle99b87c92019-03-27 21:02:02462 SmallPtrSet<Operation *, 2> dstDepInsts;
MLIR Teama0f3db402019-01-29 17:36:41463 for (auto &inEdge : inEdges[dstId])
MLIR Teama78edcd2019-02-05 14:57:08464 if (inEdge.id != srcId)
River Riddle99b87c92019-03-27 21:02:02465 dstDepInsts.insert(getNode(inEdge.id)->op);
MLIR Teama0f3db402019-01-29 17:36:41466
River Riddle99b87c92019-03-27 21:02:02467 Operation *srcNodeInst = getNode(srcId)->op;
468 Operation *dstNodeInst = getNode(dstId)->op;
MLIR Teama0f3db402019-01-29 17:36:41469
470 // Computing insertion point:
River Riddle99b87c92019-03-27 21:02:02471 // *) Walk all operation positions in Block operation list in the
472 // range (src, dst). For each operation 'op' visited in this search:
473 // *) Store in 'firstSrcDepPos' the first position where 'op' has a
MLIR Teama0f3db402019-01-29 17:36:41474 // dependence edge from 'srcNode'.
River Riddle99b87c92019-03-27 21:02:02475 // *) Store in 'lastDstDepPost' the last position where 'op' has a
MLIR Teama0f3db402019-01-29 17:36:41476 // dependence edge to 'dstNode'.
477 // *) Compare 'firstSrcDepPos' and 'lastDstDepPost' to determine the
River Riddle99b87c92019-03-27 21:02:02478 // operation insertion point (or return null pointer if no such
MLIR Teama0f3db402019-01-29 17:36:41479 // insertion point exists: 'firstSrcDepPos' <= 'lastDstDepPos').
River Riddle99b87c92019-03-27 21:02:02480 SmallVector<Operation *, 2> depInsts;
MLIR Teama0f3db402019-01-29 17:36:41481 Optional<unsigned> firstSrcDepPos;
482 Optional<unsigned> lastDstDepPos;
483 unsigned pos = 0;
484 for (Block::iterator it = std::next(Block::iterator(srcNodeInst));
485 it != Block::iterator(dstNodeInst); ++it) {
River Riddle99b87c92019-03-27 21:02:02486 Operation *op = &(*it);
487 if (srcDepInsts.count(op) > 0 && firstSrcDepPos == None)
MLIR Teama0f3db402019-01-29 17:36:41488 firstSrcDepPos = pos;
River Riddle99b87c92019-03-27 21:02:02489 if (dstDepInsts.count(op) > 0)
MLIR Teama0f3db402019-01-29 17:36:41490 lastDstDepPos = pos;
River Riddle99b87c92019-03-27 21:02:02491 depInsts.push_back(op);
MLIR Teama0f3db402019-01-29 17:36:41492 ++pos;
MLIR Team5c5739d2019-01-25 06:27:40493 }
MLIR Teama0f3db402019-01-29 17:36:41494
495 if (firstSrcDepPos.hasValue()) {
496 if (lastDstDepPos.hasValue()) {
497 if (firstSrcDepPos.getValue() <= lastDstDepPos.getValue()) {
498 // No valid insertion point exists which preserves dependences.
499 return nullptr;
500 }
501 }
502 // Return the insertion point at 'firstSrcDepPos'.
503 return depInsts[firstSrcDepPos.getValue()];
504 }
505 // No dependence targets in range (or only dst deps in range), return
506 // 'dstNodInst' insertion point.
507 return dstNodeInst;
MLIR Team6892ffb2018-12-20 04:42:55508 }
509
MLIR Teama0f3db402019-01-29 17:36:41510 // Updates edge mappings from node 'srcId' to node 'dstId' after 'oldMemRef'
511 // has been replaced in node at 'dstId' by a private memref.
512 void updateEdges(unsigned srcId, unsigned dstId, Value *oldMemRef) {
MLIR Team6892ffb2018-12-20 04:42:55513 // For each edge in 'inEdges[srcId]': add new edge remaping to 'dstId'.
514 if (inEdges.count(srcId) > 0) {
515 SmallVector<Edge, 2> oldInEdges = inEdges[srcId];
516 for (auto &inEdge : oldInEdges) {
MLIR Teama0f3db402019-01-29 17:36:41517 // Add edge from 'inEdge.id' to 'dstId' if not for 'oldMemRef'.
518 if (inEdge.value != oldMemRef)
519 addEdge(inEdge.id, dstId, inEdge.value);
MLIR Team6892ffb2018-12-20 04:42:55520 }
521 }
MLIR Teamc4237ae2019-01-18 16:56:27522 // For each edge in 'outEdges[srcId]': remove edge from 'srcId' to 'dstId'.
MLIR Team6892ffb2018-12-20 04:42:55523 if (outEdges.count(srcId) > 0) {
524 SmallVector<Edge, 2> oldOutEdges = outEdges[srcId];
525 for (auto &outEdge : oldOutEdges) {
MLIR Teamc4237ae2019-01-18 16:56:27526 // Remove any out edges from 'srcId' to 'dstId' across memrefs.
527 if (outEdge.id == dstId)
MLIR Teama0f3db402019-01-29 17:36:41528 removeEdge(srcId, outEdge.id, outEdge.value);
MLIR Team6892ffb2018-12-20 04:42:55529 }
530 }
MLIR Teama0f3db402019-01-29 17:36:41531 // Remove any edges in 'inEdges[dstId]' on 'oldMemRef' (which is being
532 // replaced by a private memref). These edges could come from nodes
533 // other than 'srcId' which were removed in the previous step.
534 if (inEdges.count(dstId) > 0) {
535 SmallVector<Edge, 2> oldInEdges = inEdges[dstId];
536 for (auto &inEdge : oldInEdges)
537 if (inEdge.value == oldMemRef)
538 removeEdge(inEdge.id, dstId, inEdge.value);
539 }
MLIR Team6892ffb2018-12-20 04:42:55540 }
541
MLIR Teamd038e342019-03-01 19:50:25542 // Update edge mappings for nodes 'sibId' and 'dstId' to reflect fusion
543 // of sibling node 'sidId' into node 'dstId'.
544 void updateEdges(unsigned sibId, unsigned dstId) {
545 // For each edge in 'inEdges[sibId]':
546 // *) Add new edge from source node 'inEdge.id' to 'dstNode'.
547 // *) Remove edge from source node 'inEdge.id' to 'sibNode'.
548 if (inEdges.count(sibId) > 0) {
549 SmallVector<Edge, 2> oldInEdges = inEdges[sibId];
550 for (auto &inEdge : oldInEdges) {
551 addEdge(inEdge.id, dstId, inEdge.value);
552 removeEdge(inEdge.id, sibId, inEdge.value);
553 }
554 }
555
556 // For each edge in 'outEdges[sibId]' to node 'id'
557 // *) Add new edge from 'dstId' to 'outEdge.id'.
558 // *) Remove edge from 'sibId' to 'outEdge.id'.
559 if (outEdges.count(sibId) > 0) {
560 SmallVector<Edge, 2> oldOutEdges = outEdges[sibId];
561 for (auto &outEdge : oldOutEdges) {
562 addEdge(dstId, outEdge.id, outEdge.value);
563 removeEdge(sibId, outEdge.id, outEdge.value);
564 }
565 }
566 }
567
MLIR Team6892ffb2018-12-20 04:42:55568 // Adds ops in 'loads' and 'stores' to node at 'id'.
River Riddle99b87c92019-03-27 21:02:02569 void addToNode(unsigned id, const SmallVectorImpl<Operation *> &loads,
570 const SmallVectorImpl<Operation *> &stores) {
MLIR Team6892ffb2018-12-20 04:42:55571 Node *node = getNode(id);
Chris Lattner456ad6a2018-12-29 00:05:35572 for (auto *loadOpInst : loads)
573 node->loads.push_back(loadOpInst);
574 for (auto *storeOpInst : stores)
575 node->stores.push_back(storeOpInst);
MLIR Team6892ffb2018-12-20 04:42:55576 }
577
MLIR Teamc4237ae2019-01-18 16:56:27578 void clearNodeLoadAndStores(unsigned id) {
579 Node *node = getNode(id);
580 node->loads.clear();
581 node->stores.clear();
582 }
583
MLIR Teamd038e342019-03-01 19:50:25584 // Calls 'callback' for each input edge incident to node 'id' which carries a
585 // memref dependence.
586 void forEachMemRefInputEdge(unsigned id,
587 const std::function<void(Edge)> &callback) {
588 if (inEdges.count(id) > 0)
589 forEachMemRefEdge(inEdges[id], callback);
590 }
Amit Sabne70a416d2019-04-09 16:17:40591
MLIR Teamd038e342019-03-01 19:50:25592 // Calls 'callback' for each output edge from node 'id' which carries a
593 // memref dependence.
594 void forEachMemRefOutputEdge(unsigned id,
595 const std::function<void(Edge)> &callback) {
596 if (outEdges.count(id) > 0)
597 forEachMemRefEdge(outEdges[id], callback);
598 }
Amit Sabne70a416d2019-04-09 16:17:40599
MLIR Teamd038e342019-03-01 19:50:25600 // Calls 'callback' for each edge in 'edges' which carries a memref
601 // dependence.
602 void forEachMemRefEdge(ArrayRef<Edge> edges,
603 const std::function<void(Edge)> &callback) {
604 for (auto &edge : edges) {
605 // Skip if 'edge' is not a memref dependence edge.
606 if (!edge.value->getType().isa<MemRefType>())
607 continue;
608 assert(nodes.count(edge.id) > 0);
609 // Skip if 'edge.id' is not a loop nest.
River Riddled5b60ee82019-05-12 01:59:54610 if (!isa<AffineForOp>(getNode(edge.id)->op))
MLIR Teamd038e342019-03-01 19:50:25611 continue;
612 // Visit current input edge 'edge'.
613 callback(edge);
614 }
615 }
616
MLIR Team6892ffb2018-12-20 04:42:55617 void print(raw_ostream &os) const {
618 os << "\nMemRefDependenceGraph\n";
619 os << "\nNodes:\n";
620 for (auto &idAndNode : nodes) {
621 os << "Node: " << idAndNode.first << "\n";
622 auto it = inEdges.find(idAndNode.first);
623 if (it != inEdges.end()) {
624 for (const auto &e : it->second)
MLIR Teama0f3db402019-01-29 17:36:41625 os << " InEdge: " << e.id << " " << e.value << "\n";
MLIR Team6892ffb2018-12-20 04:42:55626 }
627 it = outEdges.find(idAndNode.first);
628 if (it != outEdges.end()) {
629 for (const auto &e : it->second)
MLIR Teama0f3db402019-01-29 17:36:41630 os << " OutEdge: " << e.id << " " << e.value << "\n";
MLIR Team6892ffb2018-12-20 04:42:55631 }
632 }
633 }
634 void dump() const { print(llvm::errs()); }
635};
636
River Riddle99b87c92019-03-27 21:02:02637// Intializes the data dependence graph by walking operations in 'f'.
MLIR Team6892ffb2018-12-20 04:42:55638// Assigns each node in the graph a node id based on program order in 'f'.
Chris Lattner315a4662018-12-28 21:07:39639// TODO(andydavis) Add support for taking a Block arg to construct the
MLIR Team6892ffb2018-12-20 04:42:55640// dependence graph at a different depth.
River Riddle8c443672019-07-09 23:17:55641bool MemRefDependenceGraph::init(FuncOp f) {
Chris Lattner3f190312018-12-27 22:35:10642 DenseMap<Value *, SetVector<unsigned>> memrefAccesses;
Chris Lattnerdffc5892018-12-29 23:33:43643
644 // TODO: support multi-block functions.
Chris Lattner46ade282019-03-26 01:02:49645 if (f.getBlocks().size() != 1)
Chris Lattnerdffc5892018-12-29 23:33:43646 return false;
647
River Riddle99b87c92019-03-27 21:02:02648 DenseMap<Operation *, unsigned> forToNodeMap;
649 for (auto &op : f.front()) {
River Riddlec5ecf992019-05-11 22:56:50650 if (auto forOp = dyn_cast<AffineForOp>(op)) {
River Riddle5052bd82019-02-02 00:42:18651 // Create graph node 'id' to represent top-level 'forOp' and record
MLIR Team6892ffb2018-12-20 04:42:55652 // all loads and store accesses it contains.
653 LoopNestStateCollector collector;
River Riddle99b87c92019-03-27 21:02:02654 collector.collect(&op);
River Riddle832567b2019-03-25 17:14:34655 // Return false if a non 'affine.for' region was found (not currently
656 // supported).
River Riddle75553832019-01-29 05:23:53657 if (collector.hasNonForRegion)
MLIR Team6892ffb2018-12-20 04:42:55658 return false;
River Riddle99b87c92019-03-27 21:02:02659 Node node(nextNodeId++, &op);
Chris Lattner456ad6a2018-12-29 00:05:35660 for (auto *opInst : collector.loadOpInsts) {
661 node.loads.push_back(opInst);
Andy Davis2e1187d2019-07-03 17:35:03662 auto *memref = cast<AffineLoadOp>(opInst).getMemRef();
MLIR Team6892ffb2018-12-20 04:42:55663 memrefAccesses[memref].insert(node.id);
664 }
Chris Lattner456ad6a2018-12-29 00:05:35665 for (auto *opInst : collector.storeOpInsts) {
666 node.stores.push_back(opInst);
Andy Davis2e1187d2019-07-03 17:35:03667 auto *memref = cast<AffineStoreOp>(opInst).getMemRef();
MLIR Team6892ffb2018-12-20 04:42:55668 memrefAccesses[memref].insert(node.id);
669 }
River Riddle99b87c92019-03-27 21:02:02670 forToNodeMap[&op] = node.id;
MLIR Team6892ffb2018-12-20 04:42:55671 nodes.insert({node.id, node});
Andy Davis2e1187d2019-07-03 17:35:03672 } else if (auto loadOp = dyn_cast<AffineLoadOp>(op)) {
River Riddleb4992772019-02-04 18:38:47673 // Create graph node for top-level load op.
River Riddle99b87c92019-03-27 21:02:02674 Node node(nextNodeId++, &op);
675 node.loads.push_back(&op);
Andy Davis2e1187d2019-07-03 17:35:03676 auto *memref = cast<AffineLoadOp>(op).getMemRef();
River Riddleb4992772019-02-04 18:38:47677 memrefAccesses[memref].insert(node.id);
678 nodes.insert({node.id, node});
Andy Davis2e1187d2019-07-03 17:35:03679 } else if (auto storeOp = dyn_cast<AffineStoreOp>(op)) {
River Riddleb4992772019-02-04 18:38:47680 // Create graph node for top-level store op.
River Riddle99b87c92019-03-27 21:02:02681 Node node(nextNodeId++, &op);
682 node.stores.push_back(&op);
Andy Davis2e1187d2019-07-03 17:35:03683 auto *memref = cast<AffineStoreOp>(op).getMemRef();
River Riddleb4992772019-02-04 18:38:47684 memrefAccesses[memref].insert(node.id);
685 nodes.insert({node.id, node});
River Riddle99b87c92019-03-27 21:02:02686 } else if (op.getNumRegions() != 0) {
River Riddleb4992772019-02-04 18:38:47687 // Return false if another region is found (not currently supported).
688 return false;
River Riddle99b87c92019-03-27 21:02:02689 } else if (op.getNumResults() > 0 && !op.use_empty()) {
River Riddleb4992772019-02-04 18:38:47690 // Create graph node for top-level producer of SSA values, which
691 // could be used by loop nest nodes.
River Riddle99b87c92019-03-27 21:02:02692 Node node(nextNodeId++, &op);
River Riddleb4992772019-02-04 18:38:47693 nodes.insert({node.id, node});
MLIR Teama0f3db402019-01-29 17:36:41694 }
695 }
696
697 // Add dependence edges between nodes which produce SSA values and their
698 // users.
699 for (auto &idAndNode : nodes) {
700 const Node &node = idAndNode.second;
701 if (!node.loads.empty() || !node.stores.empty())
702 continue;
River Riddle99b87c92019-03-27 21:02:02703 auto *opInst = node.op;
MLIR Teama0f3db402019-01-29 17:36:41704 for (auto *value : opInst->getResults()) {
River Riddle8780d8d2019-05-18 18:09:07705 for (auto *user : value->getUsers()) {
Chris Lattnerd9b5bc82019-03-25 02:53:05706 SmallVector<AffineForOp, 4> loops;
River Riddle8780d8d2019-05-18 18:09:07707 getLoopIVs(*user, &loops);
MLIR Teama0f3db402019-01-29 17:36:41708 if (loops.empty())
709 continue;
River Riddlef9d91532019-03-27 00:05:09710 assert(forToNodeMap.count(loops[0].getOperation()) > 0);
711 unsigned userLoopNestId = forToNodeMap[loops[0].getOperation()];
MLIR Teama0f3db402019-01-29 17:36:41712 addEdge(node.id, userLoopNestId, value);
MLIR Team6892ffb2018-12-20 04:42:55713 }
714 }
MLIR Team6892ffb2018-12-20 04:42:55715 }
716
717 // Walk memref access lists and add graph edges between dependent nodes.
718 for (auto &memrefAndList : memrefAccesses) {
719 unsigned n = memrefAndList.second.size();
720 for (unsigned i = 0; i < n; ++i) {
721 unsigned srcId = memrefAndList.second[i];
722 bool srcHasStore =
723 getNode(srcId)->getStoreOpCount(memrefAndList.first) > 0;
724 for (unsigned j = i + 1; j < n; ++j) {
725 unsigned dstId = memrefAndList.second[j];
726 bool dstHasStore =
727 getNode(dstId)->getStoreOpCount(memrefAndList.first) > 0;
728 if (srcHasStore || dstHasStore)
729 addEdge(srcId, dstId, memrefAndList.first);
730 }
731 }
732 }
733 return true;
734}
735
MLIR Team27d067e2019-01-16 17:55:02736// Removes load operations from 'srcLoads' which operate on 'memref', and
737// adds them to 'dstLoads'.
River Riddle99b87c92019-03-27 21:02:02738static void moveLoadsAccessingMemrefTo(Value *memref,
739 SmallVectorImpl<Operation *> *srcLoads,
740 SmallVectorImpl<Operation *> *dstLoads) {
MLIR Team27d067e2019-01-16 17:55:02741 dstLoads->clear();
River Riddle99b87c92019-03-27 21:02:02742 SmallVector<Operation *, 4> srcLoadsToKeep;
MLIR Team27d067e2019-01-16 17:55:02743 for (auto *load : *srcLoads) {
Andy Davis2e1187d2019-07-03 17:35:03744 if (cast<AffineLoadOp>(load).getMemRef() == memref)
MLIR Team27d067e2019-01-16 17:55:02745 dstLoads->push_back(load);
746 else
747 srcLoadsToKeep.push_back(load);
MLIR Team38c2fe32019-01-14 19:26:25748 }
MLIR Team27d067e2019-01-16 17:55:02749 srcLoads->swap(srcLoadsToKeep);
MLIR Team38c2fe32019-01-14 19:26:25750}
751
MLIR Team27d067e2019-01-16 17:55:02752// Returns the innermost common loop depth for the set of operations in 'ops'.
River Riddle99b87c92019-03-27 21:02:02753static unsigned getInnermostCommonLoopDepth(ArrayRef<Operation *> ops) {
MLIR Team27d067e2019-01-16 17:55:02754 unsigned numOps = ops.size();
755 assert(numOps > 0);
756
Chris Lattnerd9b5bc82019-03-25 02:53:05757 std::vector<SmallVector<AffineForOp, 4>> loops(numOps);
MLIR Team27d067e2019-01-16 17:55:02758 unsigned loopDepthLimit = std::numeric_limits<unsigned>::max();
759 for (unsigned i = 0; i < numOps; ++i) {
760 getLoopIVs(*ops[i], &loops[i]);
761 loopDepthLimit =
762 std::min(loopDepthLimit, static_cast<unsigned>(loops[i].size()));
MLIR Team38c2fe32019-01-14 19:26:25763 }
MLIR Team27d067e2019-01-16 17:55:02764
765 unsigned loopDepth = 0;
766 for (unsigned d = 0; d < loopDepthLimit; ++d) {
767 unsigned i;
768 for (i = 1; i < numOps; ++i) {
River Riddle5052bd82019-02-02 00:42:18769 if (loops[i - 1][d] != loops[i][d])
MLIR Team27d067e2019-01-16 17:55:02770 break;
MLIR Team27d067e2019-01-16 17:55:02771 }
772 if (i != numOps)
773 break;
774 ++loopDepth;
775 }
776 return loopDepth;
MLIR Team38c2fe32019-01-14 19:26:25777}
778
MLIR Teamd7c82442019-01-30 23:53:41779// Returns the maximum loop depth at which no dependences between 'loadOpInsts'
780// and 'storeOpInsts' are satisfied.
River Riddle99b87c92019-03-27 21:02:02781static unsigned getMaxLoopDepth(ArrayRef<Operation *> loadOpInsts,
782 ArrayRef<Operation *> storeOpInsts) {
MLIR Teamd7c82442019-01-30 23:53:41783 // Merge loads and stores into the same array.
River Riddle99b87c92019-03-27 21:02:02784 SmallVector<Operation *, 2> ops(loadOpInsts.begin(), loadOpInsts.end());
MLIR Teamd7c82442019-01-30 23:53:41785 ops.append(storeOpInsts.begin(), storeOpInsts.end());
786
787 // Compute the innermost common loop depth for loads and stores.
788 unsigned loopDepth = getInnermostCommonLoopDepth(ops);
789
790 // Return common loop depth for loads if there are no store ops.
791 if (storeOpInsts.empty())
792 return loopDepth;
793
794 // Check dependences on all pairs of ops in 'ops' and store the minimum
795 // loop depth at which a dependence is satisfied.
796 for (unsigned i = 0, e = ops.size(); i < e; ++i) {
797 auto *srcOpInst = ops[i];
798 MemRefAccess srcAccess(srcOpInst);
799 for (unsigned j = 0; j < e; ++j) {
800 auto *dstOpInst = ops[j];
801 MemRefAccess dstAccess(dstOpInst);
802
803 unsigned numCommonLoops =
804 getNumCommonSurroundingLoops(*srcOpInst, *dstOpInst);
805 for (unsigned d = 1; d <= numCommonLoops + 1; ++d) {
806 FlatAffineConstraints dependenceConstraints;
807 // TODO(andydavis) Cache dependence analysis results, check cache here.
Andy Davise33e36f2019-06-10 17:50:08808 DependenceResult result = checkMemrefAccessDependence(
809 srcAccess, dstAccess, d, &dependenceConstraints,
810 /*dependenceComponents=*/nullptr);
811 if (hasDependence(result)) {
MLIR Teamd7c82442019-01-30 23:53:41812 // Store minimum loop depth and break because we want the min 'd' at
813 // which there is a dependence.
814 loopDepth = std::min(loopDepth, d - 1);
815 break;
816 }
817 }
818 }
819 }
820 return loopDepth;
821}
822
MLIR Team8f5f2c72019-02-15 17:32:18823// Sinks all sequential loops to the innermost levels (while preserving
824// relative order among them) and moves all parallel loops to the
825// outermost (while again preserving relative order among them).
826// This can increase the loop depth at which we can fuse a slice, since we are
827// pushing loop carried dependence to a greater depth in the loop nest.
828static void sinkSequentialLoops(MemRefDependenceGraph::Node *node) {
River Riddled5b60ee82019-05-12 01:59:54829 assert(isa<AffineForOp>(node->op));
Andy Davis90d40232019-05-13 13:57:56830 AffineForOp newRootForOp = sinkSequentialLoops(cast<AffineForOp>(node->op));
831 node->op = newRootForOp.getOperation();
MLIR Team8f5f2c72019-02-15 17:32:18832}
833
Uday Bondhugula8be26272019-02-02 01:06:22834// TODO(mlir-team): improve/complete this when we have target data.
835unsigned getMemRefEltSizeInBytes(MemRefType memRefType) {
836 auto elementType = memRefType.getElementType();
837
838 unsigned sizeInBits;
839 if (elementType.isIntOrFloat()) {
840 sizeInBits = elementType.getIntOrFloatBitWidth();
841 } else {
842 auto vectorType = elementType.cast<VectorType>();
843 sizeInBits =
844 vectorType.getElementTypeBitWidth() * vectorType.getNumElements();
845 }
846 return llvm::divideCeil(sizeInBits, 8);
847}
848
MLIR Teamc4237ae2019-01-18 16:56:27849// Creates and returns a private (single-user) memref for fused loop rooted
River Riddle5052bd82019-02-02 00:42:18850// at 'forOp', with (potentially reduced) memref size based on the
Uday Bondhugula94a03f82019-01-22 21:58:52851// MemRefRegion written to by 'srcStoreOpInst' at depth 'dstLoopDepth'.
852// TODO(bondhugula): consider refactoring the common code from generateDma and
853// this one.
River Riddle99b87c92019-03-27 21:02:02854static Value *createPrivateMemRef(AffineForOp forOp, Operation *srcStoreOpInst,
Uday Bondhugula8be26272019-02-02 01:06:22855 unsigned dstLoopDepth,
856 Optional<unsigned> fastMemorySpace,
Uday Bondhugulad4b3ff12019-02-27 00:10:19857 uint64_t localBufSizeThreshold) {
River Riddlef9d91532019-03-27 00:05:09858 auto *forInst = forOp.getOperation();
River Riddle5052bd82019-02-02 00:42:18859
860 // Create builder to insert alloc op just before 'forOp'.
River Riddlef1b848e2019-06-05 02:18:23861 OpBuilder b(forInst);
MLIR Teamc4237ae2019-01-18 16:56:27862 // Builder to create constants at the top level.
River Riddlece502af2019-07-08 18:20:26863 OpBuilder top(forInst->getParentOfType<FuncOp>().getBody());
MLIR Teamc4237ae2019-01-18 16:56:27864 // Create new memref type based on slice bounds.
Andy Davis2e1187d2019-07-03 17:35:03865 auto *oldMemRef = cast<AffineStoreOp>(srcStoreOpInst).getMemRef();
MLIR Teamc4237ae2019-01-18 16:56:27866 auto oldMemRefType = oldMemRef->getType().cast<MemRefType>();
867 unsigned rank = oldMemRefType.getRank();
868
Uday Bondhugula94a03f82019-01-22 21:58:52869 // Compute MemRefRegion for 'srcStoreOpInst' at depth 'dstLoopDepth'.
Uday Bondhugula0f504142019-02-04 21:48:44870 MemRefRegion region(srcStoreOpInst->getLoc());
River Riddle1e55ae12019-03-08 06:14:47871 bool validRegion = succeeded(region.compute(srcStoreOpInst, dstLoopDepth));
MLIR Teamd42ef782019-03-04 19:01:25872 (void)validRegion;
873 assert(validRegion && "unexpected memref region failure");
River Riddle6859f332019-01-23 22:39:45874 SmallVector<int64_t, 4> newShape;
MLIR Teamc4237ae2019-01-18 16:56:27875 std::vector<SmallVector<int64_t, 4>> lbs;
Uday Bondhugula94a03f82019-01-22 21:58:52876 SmallVector<int64_t, 8> lbDivisors;
MLIR Teamc4237ae2019-01-18 16:56:27877 lbs.reserve(rank);
878 // Query 'region' for 'newShape' and lower bounds of MemRefRegion accessed
Uday Bondhugula94a03f82019-01-22 21:58:52879 // by 'srcStoreOpInst' at depth 'dstLoopDepth'.
MLIR Teamc4237ae2019-01-18 16:56:27880 Optional<int64_t> numElements =
Uday Bondhugula0f504142019-02-04 21:48:44881 region.getConstantBoundingSizeAndShape(&newShape, &lbs, &lbDivisors);
Uday Bondhugula8be26272019-02-02 01:06:22882 assert(numElements.hasValue() &&
883 "non-constant number of elts in local buffer");
MLIR Teamc4237ae2019-01-18 16:56:27884
Uday Bondhugula0f504142019-02-04 21:48:44885 const FlatAffineConstraints *cst = region.getConstraints();
Uday Bondhugula94a03f82019-01-22 21:58:52886 // 'outerIVs' holds the values that this memory region is symbolic/paramteric
887 // on; this would correspond to loop IVs surrounding the level at which the
888 // slice is being materialized.
889 SmallVector<Value *, 8> outerIVs;
890 cst->getIdValues(rank, cst->getNumIds(), &outerIVs);
891
892 // Build 'rank' AffineExprs from MemRefRegion 'lbs'
MLIR Teamc4237ae2019-01-18 16:56:27893 SmallVector<AffineExpr, 4> offsets;
894 offsets.reserve(rank);
895 for (unsigned d = 0; d < rank; ++d) {
Uday Bondhugula94a03f82019-01-22 21:58:52896 assert(lbs[d].size() == cst->getNumCols() - rank && "incorrect bound size");
897
MLIR Teamc4237ae2019-01-18 16:56:27898 AffineExpr offset = top.getAffineConstantExpr(0);
899 for (unsigned j = 0, e = cst->getNumCols() - rank - 1; j < e; j++) {
900 offset = offset + lbs[d][j] * top.getAffineDimExpr(j);
901 }
Uday Bondhugula94a03f82019-01-22 21:58:52902 assert(lbDivisors[d] > 0);
903 offset =
904 (offset + lbs[d][cst->getNumCols() - 1 - rank]).floorDiv(lbDivisors[d]);
MLIR Teamc4237ae2019-01-18 16:56:27905 offsets.push_back(offset);
906 }
907
908 // Create 'newMemRefType' using 'newShape' from MemRefRegion accessed
909 // by 'srcStoreOpInst'.
Uday Bondhugula8be26272019-02-02 01:06:22910 uint64_t bufSize =
911 getMemRefEltSizeInBytes(oldMemRefType) * numElements.getValue();
912 unsigned newMemSpace;
Uday Bondhugulad4b3ff12019-02-27 00:10:19913 if (bufSize <= localBufSizeThreshold && fastMemorySpace.hasValue()) {
Uday Bondhugula8be26272019-02-02 01:06:22914 newMemSpace = fastMemorySpace.getValue();
915 } else {
916 newMemSpace = oldMemRefType.getMemorySpace();
917 }
918 auto newMemRefType = top.getMemRefType(
919 newShape, oldMemRefType.getElementType(), {}, newMemSpace);
MLIR Teamc4237ae2019-01-18 16:56:27920 // Gather alloc operands for the dynamic dimensions of the memref.
921 SmallVector<Value *, 4> allocOperands;
922 unsigned dynamicDimCount = 0;
923 for (auto dimSize : oldMemRefType.getShape()) {
924 if (dimSize == -1)
925 allocOperands.push_back(
River Riddleaf1abcc2019-03-25 18:13:31926 top.create<DimOp>(forOp.getLoc(), oldMemRef, dynamicDimCount++));
MLIR Teamc4237ae2019-01-18 16:56:27927 }
928
River Riddle5052bd82019-02-02 00:42:18929 // Create new private memref for fused loop 'forOp'.
MLIR Teama0f3db402019-01-29 17:36:41930 // TODO(andydavis) Create/move alloc ops for private memrefs closer to their
931 // consumer loop nests to reduce their live range. Currently they are added
932 // at the beginning of the function, because loop nests can be reordered
933 // during the fusion pass.
MLIR Teamc4237ae2019-01-18 16:56:27934 Value *newMemRef =
River Riddleaf1abcc2019-03-25 18:13:31935 top.create<AllocOp>(forOp.getLoc(), newMemRefType, allocOperands);
MLIR Teamc4237ae2019-01-18 16:56:27936
937 // Build an AffineMap to remap access functions based on lower bound offsets.
938 SmallVector<AffineExpr, 4> remapExprs;
939 remapExprs.reserve(rank);
940 unsigned zeroOffsetCount = 0;
941 for (unsigned i = 0; i < rank; i++) {
942 if (auto constExpr = offsets[i].dyn_cast<AffineConstantExpr>())
943 if (constExpr.getValue() == 0)
944 ++zeroOffsetCount;
Uday Bondhugula94a03f82019-01-22 21:58:52945 auto dimExpr = b.getAffineDimExpr(outerIVs.size() + i);
946
947 auto remapExpr =
948 simplifyAffineExpr(dimExpr - offsets[i], outerIVs.size() + rank, 0);
949 remapExprs.push_back(remapExpr);
MLIR Teamc4237ae2019-01-18 16:56:27950 }
MLIR Team5a91b982019-05-29 21:56:41951 auto indexRemap = zeroOffsetCount == rank
952 ? AffineMap()
953 : b.getAffineMap(outerIVs.size() + rank, 0, remapExprs);
MLIR Teamc4237ae2019-01-18 16:56:27954 // Replace all users of 'oldMemRef' with 'newMemRef'.
Uday Bondhugula94a03f82019-01-22 21:58:52955 bool ret =
956 replaceAllMemRefUsesWith(oldMemRef, newMemRef, {}, indexRemap,
957 /*extraOperands=*/outerIVs,
River Riddleaf1abcc2019-03-25 18:13:31958 /*domInstFilter=*/&*forOp.getBody()->begin());
Uday Bondhugula94a03f82019-01-22 21:58:52959 assert(ret && "replaceAllMemrefUsesWith should always succeed here");
MLIR Team71495d52019-01-22 21:23:37960 (void)ret;
MLIR Teamc4237ae2019-01-18 16:56:27961 return newMemRef;
962}
963
MLIR Team58aa3832019-02-16 01:12:19964// Checks if node 'srcId' (which writes to a live out memref), can be safely
965// fused into node 'dstId'. Returns true if the following conditions are met:
Andy Davis7c1fc9e2019-04-02 13:37:40966// *) 'srcNode' only writes to live out 'memref'.
Amit Sabne70a416d2019-04-09 16:17:40967// *) 'srcNode' has exactly one output edge on 'memref' (which is to 'dstId').
Andy Davis7c1fc9e2019-04-02 13:37:40968// *) 'dstNode's read/write region to 'memref' is a super set of 'srcNode's
969// write region to 'memref'.
MLIR Team58aa3832019-02-16 01:12:19970// TODO(andydavis) Generalize this to handle more live in/out cases.
971static bool canFuseSrcWhichWritesToLiveOut(unsigned srcId, unsigned dstId,
972 Value *memref,
973 MemRefDependenceGraph *mdg) {
974 auto *srcNode = mdg->getNode(srcId);
975 auto *dstNode = mdg->getNode(dstId);
976
Andy Davis7c1fc9e2019-04-02 13:37:40977 // Gather all memrefs from 'srcNode' store ops.
978 DenseSet<Value *> storeMemrefs;
979 for (auto *storeOpInst : srcNode->stores) {
Andy Davis2e1187d2019-07-03 17:35:03980 storeMemrefs.insert(cast<AffineStoreOp>(storeOpInst).getMemRef());
Andy Davis7c1fc9e2019-04-02 13:37:40981 }
MLIR Team58aa3832019-02-16 01:12:19982 // Return false if any of the following are true:
983 // *) 'srcNode' writes to a live in/out memref other than 'memref'.
984 // *) 'srcNode' has more than one output edge on 'memref'.
Andy Davis7c1fc9e2019-04-02 13:37:40985 // Check that all stores are to the same memref.
986 if (storeMemrefs.size() != 1 ||
987 mdg->getOutEdgeCount(srcNode->id, memref) != 1)
MLIR Team58aa3832019-02-16 01:12:19988 return false;
989 // Compute MemRefRegion 'srcWriteRegion' for 'srcStoreOpInst' on 'memref'.
990 auto *srcStoreOpInst = srcNode->stores.front();
991 MemRefRegion srcWriteRegion(srcStoreOpInst->getLoc());
River Riddle1e55ae12019-03-08 06:14:47992 if (failed(srcWriteRegion.compute(srcStoreOpInst, /*loopDepth=*/0))) {
MLIR Teamd42ef782019-03-04 19:01:25993 LLVM_DEBUG(llvm::dbgs()
994 << "Unable to compute MemRefRegion for source operation\n.");
995 return false;
996 }
MLIR Team58aa3832019-02-16 01:12:19997 SmallVector<int64_t, 4> srcShape;
998 // Query 'srcWriteRegion' for 'srcShape' and 'srcNumElements'.
999 // by 'srcStoreOpInst' at depth 'dstLoopDepth'.
1000 Optional<int64_t> srcNumElements =
1001 srcWriteRegion.getConstantBoundingSizeAndShape(&srcShape);
1002 if (!srcNumElements.hasValue())
1003 return false;
1004
Andy Davis7c1fc9e2019-04-02 13:37:401005 // Compute MemRefRegion 'dstRegion' for 'dstStore/LoadOpInst' on 'memref'.
MLIR Team9d9675f2019-03-28 21:54:491006 // TODO(andydavis) Compute 'unionboundingbox' of all write regions (one for
1007 // each store op in 'dstStoreOps').
Andy Davis7c1fc9e2019-04-02 13:37:401008 SmallVector<Operation *, 2> dstStoreOps;
1009 dstNode->getStoreOpsForMemref(memref, &dstStoreOps);
1010 SmallVector<Operation *, 2> dstLoadOps;
1011 dstNode->getLoadOpsForMemref(memref, &dstLoadOps);
1012
1013 auto *dstOpInst = dstStoreOps.empty() ? dstLoadOps[0] : dstStoreOps[0];
1014 MemRefRegion dstRegion(dstOpInst->getLoc());
1015 if (failed(dstRegion.compute(dstOpInst, /*loopDepth=*/0))) {
MLIR Teamd42ef782019-03-04 19:01:251016 LLVM_DEBUG(llvm::dbgs()
1017 << "Unable to compute MemRefRegion for dest operation\n.");
1018 return false;
1019 }
MLIR Team58aa3832019-02-16 01:12:191020 SmallVector<int64_t, 4> dstShape;
Andy Davis7c1fc9e2019-04-02 13:37:401021 // Query 'dstRegion' for 'dstShape' and 'dstNumElements'.
1022 // by 'dstOpInst' at depth 'dstLoopDepth'.
MLIR Team58aa3832019-02-16 01:12:191023 Optional<int64_t> dstNumElements =
Andy Davis7c1fc9e2019-04-02 13:37:401024 dstRegion.getConstantBoundingSizeAndShape(&dstShape);
MLIR Team58aa3832019-02-16 01:12:191025 if (!dstNumElements.hasValue())
1026 return false;
1027
1028 // Return false if write region is not a superset of 'srcNodes' write
1029 // region to 'memref'.
1030 // TODO(andydavis) Check the shape and lower bounds here too.
1031 if (srcNumElements != dstNumElements)
1032 return false;
1033 return true;
1034}
1035
MLIR Team27d067e2019-01-16 17:55:021036// Checks the profitability of fusing a backwards slice of the loop nest
MLIR Teamd7c82442019-01-30 23:53:411037// surrounding 'srcOpInst' into the loop nest surrounding 'dstLoadOpInsts'.
MLIR Teamd038e342019-03-01 19:50:251038// The argument 'srcStoreOpInst' is used to calculate the storage reduction on
1039// the memref being produced and consumed, which is an input to the cost model.
1040// For producer-constumer fusion, 'srcStoreOpInst' will be the same as
1041// 'srcOpInst', as we are slicing w.r.t to that producer.
1042// For input-reuse fusion, 'srcOpInst' will be the src loop nest LoadOp which
1043// reads from the same memref as dst loop nest load ops, and 'srcStoreOpInst'
1044// will be the unique store op in the src node, which will be used to check
1045// that the write region is the same after input-reuse fusion.
Uday Bondhugulab4a14432019-01-26 00:00:501046// Returns true if it is profitable to fuse the candidate loop nests. Returns
1047// false otherwise. `dstLoopDepth` is set to the most profitable depth at which
1048// to materialize the source loop nest slice.
MLIR Team38c2fe32019-01-14 19:26:251049// The profitability model executes the following steps:
MLIR Team27d067e2019-01-16 17:55:021050// *) Computes the backward computation slice at 'srcOpInst'. This
1051// computation slice of the loop nest surrounding 'srcOpInst' is
MLIR Team38c2fe32019-01-14 19:26:251052// represented by modified src loop bounds in 'sliceState', which are
MLIR Team27d067e2019-01-16 17:55:021053// functions of loop IVs in the loop nest surrounding 'srcOpInst'.
MLIR Team38c2fe32019-01-14 19:26:251054// *) Computes the cost of unfused src/dst loop nests (currently the cost of a
1055// loop nest is the total number of dynamic operation instances in the loop
1056// nest).
1057// *) Computes the cost of fusing a slice of the src loop nest into the dst
MLIR Team27d067e2019-01-16 17:55:021058// loop nest at various values of dst loop depth, attempting to fuse
1059// the largest compution slice at the maximal dst loop depth (closest to the
1060// load) to minimize reuse distance and potentially enable subsequent
1061// load/store forwarding.
MLIR Teamd7c82442019-01-30 23:53:411062// NOTE: If the dst loop nest includes multiple loads in 'dstLoadOpInsts' for
MLIR Team27d067e2019-01-16 17:55:021063// the same memref as is written by 'srcOpInst', then the union of slice
1064// loop bounds is used to compute the slice and associated slice cost.
Uday Bondhugulab4a14432019-01-26 00:00:501065// NOTE: 'dstLoopDepth' refers to the loop depth within the destination loop
MLIR Team38c2fe32019-01-14 19:26:251066// nest, at which the src computation slice is inserted/fused.
MLIR Team27d067e2019-01-16 17:55:021067// NOTE: We attempt to maximize the dst loop depth, but there are cases
1068// where a particular setting for 'dstLoopNest' might fuse an unsliced
MLIR Team38c2fe32019-01-14 19:26:251069// loop (within the src computation slice) at a depth which results in
1070// execessive recomputation (see unit tests for examples).
1071// *) Compares the total cost of the unfused loop nests to the min cost fused
1072// loop nest computed in the previous step, and returns true if the latter
1073// is lower.
River Riddle99b87c92019-03-27 21:02:021074static bool isFusionProfitable(Operation *srcOpInst, Operation *srcStoreOpInst,
1075 ArrayRef<Operation *> dstLoadOpInsts,
1076 ArrayRef<Operation *> dstStoreOpInsts,
MLIR Team38c2fe32019-01-14 19:26:251077 ComputationSliceState *sliceState,
Uday Bondhugulace7e59532019-03-08 17:21:521078 unsigned *dstLoopDepth, bool maximalFusion) {
Uday Bondhugula06d21d92019-01-25 01:01:491079 LLVM_DEBUG({
1080 llvm::dbgs() << "Checking whether fusion is profitable between:\n";
Uday Bondhugulaa1dad3a2019-02-20 02:17:191081 llvm::dbgs() << " " << *srcOpInst << " and \n";
MLIR Teamd7c82442019-01-30 23:53:411082 for (auto dstOpInst : dstLoadOpInsts) {
Uday Bondhugulaa1dad3a2019-02-20 02:17:191083 llvm::dbgs() << " " << *dstOpInst << "\n";
Uday Bondhugula06d21d92019-01-25 01:01:491084 };
1085 });
Uday Bondhugula864d9e02019-01-23 17:16:241086
MLIR Team38c2fe32019-01-14 19:26:251087 // Compute cost of sliced and unsliced src loop nest.
Chris Lattnerd9b5bc82019-03-25 02:53:051088 SmallVector<AffineForOp, 4> srcLoopIVs;
MLIR Team27d067e2019-01-16 17:55:021089 getLoopIVs(*srcOpInst, &srcLoopIVs);
MLIR Team38c2fe32019-01-14 19:26:251090 unsigned numSrcLoopIVs = srcLoopIVs.size();
1091
1092 // Walk src loop nest and collect stats.
1093 LoopNestStats srcLoopNestStats;
Andy Davis59b68142019-06-18 15:52:091094 if (!getLoopNestStats(srcLoopIVs[0], &srcLoopNestStats))
MLIR Team38c2fe32019-01-14 19:26:251095 return false;
Andy Davis59b68142019-06-18 15:52:091096
MLIR Team38c2fe32019-01-14 19:26:251097 // Compute cost of dst loop nest.
Chris Lattnerd9b5bc82019-03-25 02:53:051098 SmallVector<AffineForOp, 4> dstLoopIVs;
MLIR Teamd7c82442019-01-30 23:53:411099 getLoopIVs(*dstLoadOpInsts[0], &dstLoopIVs);
MLIR Team38c2fe32019-01-14 19:26:251100
1101 LoopNestStats dstLoopNestStats;
Andy Davis59b68142019-06-18 15:52:091102 if (!getLoopNestStats(dstLoopIVs[0], &dstLoopNestStats))
MLIR Team38c2fe32019-01-14 19:26:251103 return false;
MLIR Team38c2fe32019-01-14 19:26:251104
MLIR Teamd7c82442019-01-30 23:53:411105 // Compute the maximum loop depth at which we can can insert the src slice
MLIR Teamd038e342019-03-01 19:50:251106 // and still satisfy dest loop nest dependences, for producer-consumer fusion.
1107 unsigned maxDstLoopDepth =
1108 (srcOpInst == srcStoreOpInst)
1109 ? getMaxLoopDepth(dstLoadOpInsts, dstStoreOpInsts)
1110 : dstLoopIVs.size();
MLIR Teamc1ff9e82019-03-06 04:33:301111 if (maxDstLoopDepth == 0) {
1112 LLVM_DEBUG(llvm::dbgs() << "Can't fuse: maxDstLoopDepth == 0 .\n");
MLIR Team27d067e2019-01-16 17:55:021113 return false;
MLIR Teamc1ff9e82019-03-06 04:33:301114 }
MLIR Team27d067e2019-01-16 17:55:021115
1116 // Search for min cost value for 'dstLoopDepth'. At each value of
1117 // 'dstLoopDepth' from 'maxDstLoopDepth' to '1', compute computation slice
1118 // bounds between 'srcOpInst' and each op in 'dstOpinsts' (taking the union
1119 // of these bounds). Next the union slice bounds are used to calculate
1120 // the cost of the slice and the cost of the slice inserted into the dst
1121 // loop nest at 'dstLoopDepth'.
Uday Bondhugula864d9e02019-01-23 17:16:241122 uint64_t minFusedLoopNestComputeCost = std::numeric_limits<uint64_t>::max();
MLIR Teamd038e342019-03-01 19:50:251123 double maxStorageReduction = 0.0;
Uday Bondhugula864d9e02019-01-23 17:16:241124 Optional<uint64_t> sliceMemEstimate = None;
1125
MLIR Team27d067e2019-01-16 17:55:021126 SmallVector<ComputationSliceState, 4> sliceStates;
1127 sliceStates.resize(maxDstLoopDepth);
Uday Bondhugula864d9e02019-01-23 17:16:241128 // The best loop depth at which to materialize the slice.
1129 Optional<unsigned> bestDstLoopDepth = None;
1130
1131 // Compute op instance count for the src loop nest without iteration slicing.
Andy Davis59b68142019-06-18 15:52:091132 uint64_t srcLoopNestCost = getComputeCost(srcLoopIVs[0], srcLoopNestStats);
Uday Bondhugula864d9e02019-01-23 17:16:241133
MLIR Teamb9dde912019-02-06 19:01:101134 // Compute src loop nest write region size.
MLIR Teamd038e342019-03-01 19:50:251135 MemRefRegion srcWriteRegion(srcStoreOpInst->getLoc());
River Riddle1e55ae12019-03-08 06:14:471136 if (failed(srcWriteRegion.compute(srcStoreOpInst, /*loopDepth=*/0))) {
MLIR Teamd42ef782019-03-04 19:01:251137 LLVM_DEBUG(llvm::dbgs()
River Riddle99b87c92019-03-27 21:02:021138 << "Unable to compute MemRefRegion for source operation\n.");
MLIR Teamd42ef782019-03-04 19:01:251139 return false;
1140 }
1141
MLIR Teamb9dde912019-02-06 19:01:101142 Optional<int64_t> maybeSrcWriteRegionSizeBytes =
1143 srcWriteRegion.getRegionSize();
1144 if (!maybeSrcWriteRegionSizeBytes.hasValue())
1145 return false;
1146 int64_t srcWriteRegionSizeBytes = maybeSrcWriteRegionSizeBytes.getValue();
1147
Uday Bondhugula864d9e02019-01-23 17:16:241148 // Compute op instance count for the src loop nest.
Andy Davis59b68142019-06-18 15:52:091149 uint64_t dstLoopNestCost = getComputeCost(dstLoopIVs[0], dstLoopNestStats);
MLIR Team27d067e2019-01-16 17:55:021150
MLIR Teamb9dde912019-02-06 19:01:101151 // Evaluate all depth choices for materializing the slice in the destination
1152 // loop nest.
MLIR Team27d067e2019-01-16 17:55:021153 for (unsigned i = maxDstLoopDepth; i >= 1; --i) {
MLIR Teamc1ff9e82019-03-06 04:33:301154 // Compute the union of slice bounds of all ops in 'dstLoadOpInsts'.
Andy Davis1de0f972019-05-29 21:02:141155 if (failed(mlir::computeSliceUnion({srcOpInst}, dstLoadOpInsts,
Andy Davis898cf0e2019-06-17 16:59:351156 /*loopDepth=*/i,
1157 /*numCommonLoops=*/0,
1158 /*isBackwardSlice=*/true,
Andy Davis1de0f972019-05-29 21:02:141159 &sliceStates[i - 1]))) {
MLIR Teamc1ff9e82019-03-06 04:33:301160 LLVM_DEBUG(llvm::dbgs()
Andy Davis1de0f972019-05-29 21:02:141161 << "computeSliceUnion failed for loopDepth: " << i << "\n");
MLIR Teamc1ff9e82019-03-06 04:33:301162 continue;
MLIR Team38c2fe32019-01-14 19:26:251163 }
MLIR Teamc1ff9e82019-03-06 04:33:301164
Andy Davis59b68142019-06-18 15:52:091165 int64_t fusedLoopNestComputeCost;
1166 if (!getFusionComputeCost(srcLoopIVs[0], srcLoopNestStats, dstLoopIVs[0],
1167 dstLoopNestStats, &sliceStates[i - 1],
1168 &fusedLoopNestComputeCost)) {
1169 LLVM_DEBUG(llvm::dbgs() << "Unable to compute fusion compute cost.\n.");
Uday Bondhugula864d9e02019-01-23 17:16:241170 continue;
MLIR Teamc1ff9e82019-03-06 04:33:301171 }
Uday Bondhugula864d9e02019-01-23 17:16:241172
Uday Bondhugula864d9e02019-01-23 17:16:241173 double additionalComputeFraction =
1174 fusedLoopNestComputeCost /
1175 (static_cast<double>(srcLoopNestCost) + dstLoopNestCost) -
1176 1;
1177
Amit Sabne70a416d2019-04-09 16:17:401178 // Determine what the slice write MemRefRegion would be, if the src loop
MLIR Teamb9dde912019-02-06 19:01:101179 // nest slice 'sliceStates[i - 1]' were to be inserted into the dst loop
1180 // nest at loop depth 'i'
MLIR Teamd038e342019-03-01 19:50:251181 MemRefRegion sliceWriteRegion(srcStoreOpInst->getLoc());
River Riddle1e55ae12019-03-08 06:14:471182 if (failed(sliceWriteRegion.compute(srcStoreOpInst, /*loopDepth=*/0,
1183 &sliceStates[i - 1]))) {
MLIR Teamc1ff9e82019-03-06 04:33:301184 LLVM_DEBUG(llvm::dbgs()
1185 << "Failed to compute slice write region at loopDepth: " << i
1186 << "\n");
MLIR Teamd42ef782019-03-04 19:01:251187 continue;
MLIR Teamc1ff9e82019-03-06 04:33:301188 }
MLIR Teamd42ef782019-03-04 19:01:251189
MLIR Teamb9dde912019-02-06 19:01:101190 Optional<int64_t> maybeSliceWriteRegionSizeBytes =
1191 sliceWriteRegion.getRegionSize();
1192 if (!maybeSliceWriteRegionSizeBytes.hasValue() ||
MLIR Teamc1ff9e82019-03-06 04:33:301193 maybeSliceWriteRegionSizeBytes.getValue() == 0) {
1194 LLVM_DEBUG(llvm::dbgs()
1195 << "Failed to get slice write region size at loopDepth: " << i
1196 << "\n");
MLIR Teamb9dde912019-02-06 19:01:101197 continue;
MLIR Teamc1ff9e82019-03-06 04:33:301198 }
MLIR Teamb9dde912019-02-06 19:01:101199 int64_t sliceWriteRegionSizeBytes =
1200 maybeSliceWriteRegionSizeBytes.getValue();
1201
MLIR Teamd038e342019-03-01 19:50:251202 // If we are fusing for reuse, check that write regions remain the same.
1203 // TODO(andydavis) Write region check should check sizes and offsets in
1204 // each dimension, so that we are sure they are covering the same memref
1205 // region. Also, move this out to a isMemRefRegionSuperSet helper function.
1206 if (srcOpInst != srcStoreOpInst &&
1207 sliceWriteRegionSizeBytes != srcWriteRegionSizeBytes)
1208 continue;
1209
MLIR Teamb9dde912019-02-06 19:01:101210 double storageReduction = static_cast<double>(srcWriteRegionSizeBytes) /
1211 static_cast<double>(sliceWriteRegionSizeBytes);
Uday Bondhugula864d9e02019-01-23 17:16:241212
Uday Bondhugula06d21d92019-01-25 01:01:491213 LLVM_DEBUG({
1214 std::stringstream msg;
1215 msg << " evaluating fusion profitability at depth : " << i << "\n"
Uday Bondhugulad4b3ff12019-02-27 00:10:191216 << std::fixed << std::setprecision(2)
1217 << " additional compute fraction: "
Uday Bondhugula06d21d92019-01-25 01:01:491218 << 100.0 * additionalComputeFraction << "%\n"
1219 << " storage reduction factor: " << storageReduction << "x\n"
1220 << " fused nest cost: " << fusedLoopNestComputeCost << "\n"
Uday Bondhugulaa1dad3a2019-02-20 02:17:191221 << " src write region size: " << srcWriteRegionSizeBytes << "\n"
1222 << " slice write region size: " << sliceWriteRegionSizeBytes
1223 << "\n";
Uday Bondhugula06d21d92019-01-25 01:01:491224 llvm::dbgs() << msg.str();
1225 });
Uday Bondhugula864d9e02019-01-23 17:16:241226
1227 double computeToleranceThreshold =
1228 clFusionAddlComputeTolerance.getNumOccurrences() > 0
1229 ? clFusionAddlComputeTolerance
1230 : LoopFusion::kComputeToleranceThreshold;
1231
1232 // TODO(b/123247369): This is a placeholder cost model.
1233 // Among all choices that add an acceptable amount of redundant computation
1234 // (as per computeToleranceThreshold), we will simply pick the one that
1235 // reduces the intermediary size the most.
1236 if ((storageReduction > maxStorageReduction) &&
Uday Bondhugulace7e59532019-03-08 17:21:521237 (maximalFusion ||
Uday Bondhugula864d9e02019-01-23 17:16:241238 (additionalComputeFraction < computeToleranceThreshold))) {
1239 maxStorageReduction = storageReduction;
MLIR Team27d067e2019-01-16 17:55:021240 bestDstLoopDepth = i;
Uday Bondhugula864d9e02019-01-23 17:16:241241 minFusedLoopNestComputeCost = fusedLoopNestComputeCost;
MLIR Teamb9dde912019-02-06 19:01:101242 sliceMemEstimate = sliceWriteRegionSizeBytes;
MLIR Team38c2fe32019-01-14 19:26:251243 }
1244 }
1245
Uday Bondhugula864d9e02019-01-23 17:16:241246 // A simple cost model: fuse if it reduces the memory footprint. If
1247 // -maximal-fusion is set, fuse nevertheless.
MLIR Team38c2fe32019-01-14 19:26:251248
Uday Bondhugulace7e59532019-03-08 17:21:521249 if (!maximalFusion && !bestDstLoopDepth.hasValue()) {
Uday Bondhugulaa1dad3a2019-02-20 02:17:191250 LLVM_DEBUG(
1251 llvm::dbgs()
1252 << "All fusion choices involve more than the threshold amount of "
1253 "redundant computation; NOT fusing.\n");
MLIR Team38c2fe32019-01-14 19:26:251254 return false;
Uday Bondhugula864d9e02019-01-23 17:16:241255 }
1256
MLIR Teamd42ef782019-03-04 19:01:251257 if (!bestDstLoopDepth.hasValue()) {
1258 LLVM_DEBUG(llvm::dbgs() << "no fusion depth could be evaluated.\n");
1259 return false;
1260 }
Uday Bondhugula864d9e02019-01-23 17:16:241261
1262 // Set dstLoopDepth based on best values from search.
1263 *dstLoopDepth = bestDstLoopDepth.getValue();
1264
1265 LLVM_DEBUG(
Uday Bondhugula06d21d92019-01-25 01:01:491266 llvm::dbgs() << " LoopFusion fusion stats:"
1267 << "\n best loop depth: " << bestDstLoopDepth
Uday Bondhugula864d9e02019-01-23 17:16:241268 << "\n src loop nest compute cost: " << srcLoopNestCost
1269 << "\n dst loop nest compute cost: " << dstLoopNestCost
1270 << "\n fused loop nest compute cost: "
1271 << minFusedLoopNestComputeCost << "\n");
1272
River Riddle5052bd82019-02-02 00:42:181273 auto dstMemSize = getMemoryFootprintBytes(dstLoopIVs[0]);
1274 auto srcMemSize = getMemoryFootprintBytes(srcLoopIVs[0]);
Uday Bondhugula864d9e02019-01-23 17:16:241275
1276 Optional<double> storageReduction = None;
1277
Uday Bondhugulace7e59532019-03-08 17:21:521278 if (!maximalFusion) {
Uday Bondhugula864d9e02019-01-23 17:16:241279 if (!dstMemSize.hasValue() || !srcMemSize.hasValue()) {
1280 LLVM_DEBUG(
1281 llvm::dbgs()
1282 << " fusion memory benefit cannot be evaluated; NOT fusing.\n");
1283 return false;
1284 }
1285
1286 auto srcMemSizeVal = srcMemSize.getValue();
1287 auto dstMemSizeVal = dstMemSize.getValue();
1288
1289 assert(sliceMemEstimate.hasValue() && "expected value");
Uday Bondhugula864d9e02019-01-23 17:16:241290 auto fusedMem = dstMemSizeVal + sliceMemEstimate.getValue();
1291
1292 LLVM_DEBUG(llvm::dbgs() << " src mem: " << srcMemSizeVal << "\n"
1293 << " dst mem: " << dstMemSizeVal << "\n"
1294 << " fused mem: " << fusedMem << "\n"
1295 << " slice mem: " << sliceMemEstimate << "\n");
1296
Jacques Pienaar2fe8ae42019-05-04 02:48:571297 if (static_cast<long>(fusedMem) > srcMemSizeVal + dstMemSizeVal) {
Uday Bondhugula864d9e02019-01-23 17:16:241298 LLVM_DEBUG(llvm::dbgs() << "Fusion is not profitable; NOT fusing.\n");
1299 return false;
1300 }
1301 storageReduction =
1302 100.0 *
1303 (1.0 - fusedMem / (static_cast<double>(srcMemSizeVal) + dstMemSizeVal));
1304 }
1305
1306 double additionalComputeFraction =
1307 100.0 * (minFusedLoopNestComputeCost /
1308 (static_cast<double>(srcLoopNestCost) + dstLoopNestCost) -
1309 1);
MLIR Team5c5739d2019-01-25 06:27:401310 (void)additionalComputeFraction;
Uday Bondhugula06d21d92019-01-25 01:01:491311 LLVM_DEBUG({
1312 std::stringstream msg;
1313 msg << " fusion is most profitable at depth " << *dstLoopDepth << " with "
MLIR Team8564b272019-02-22 15:48:591314 << std::setprecision(2) << additionalComputeFraction
Uday Bondhugula06d21d92019-01-25 01:01:491315 << "% redundant computation and a ";
1316 msg << (storageReduction.hasValue()
1317 ? std::to_string(storageReduction.getValue())
1318 : "<unknown>");
1319 msg << "% storage reduction.\n";
1320 llvm::dbgs() << msg.str();
1321 });
Uday Bondhugula864d9e02019-01-23 17:16:241322
MLIR Team27d067e2019-01-16 17:55:021323 // Update return parameter 'sliceState' with 'bestSliceState'.
Uday Bondhugula864d9e02019-01-23 17:16:241324 ComputationSliceState *bestSliceState = &sliceStates[*dstLoopDepth - 1];
MLIR Team27d067e2019-01-16 17:55:021325 sliceState->lbs = bestSliceState->lbs;
1326 sliceState->ubs = bestSliceState->ubs;
1327 sliceState->lbOperands = bestSliceState->lbOperands;
1328 sliceState->ubOperands = bestSliceState->ubOperands;
Uday Bondhugula864d9e02019-01-23 17:16:241329
MLIR Team27d067e2019-01-16 17:55:021330 // Canonicalize slice bound affine maps.
MLIR Team38c2fe32019-01-14 19:26:251331 for (unsigned i = 0; i < numSrcLoopIVs; ++i) {
Nicolas Vasilache0e7a8a92019-01-26 18:41:171332 if (sliceState->lbs[i] != AffineMap()) {
MLIR Team27d067e2019-01-16 17:55:021333 canonicalizeMapAndOperands(&sliceState->lbs[i],
1334 &sliceState->lbOperands[i]);
1335 }
Nicolas Vasilache0e7a8a92019-01-26 18:41:171336 if (sliceState->ubs[i] != AffineMap()) {
MLIR Team27d067e2019-01-16 17:55:021337 canonicalizeMapAndOperands(&sliceState->ubs[i],
1338 &sliceState->ubOperands[i]);
MLIR Team38c2fe32019-01-14 19:26:251339 }
1340 }
1341 return true;
1342}
1343
MLIR Teamd038e342019-03-01 19:50:251344// GreedyFusion greedily fuses loop nests which have a producer/consumer or
1345// input-reuse relationship on a memref, with the goal of improving locality.
MLIR Teamf28e4df2018-11-01 14:26:001346//
MLIR Teamd038e342019-03-01 19:50:251347// The steps of the producer-consumer fusion algorithm are as follows:
MLIR Team3b692302018-12-17 17:57:141348//
MLIR Team6892ffb2018-12-20 04:42:551349// *) A worklist is initialized with node ids from the dependence graph.
1350// *) For each node id in the worklist:
Amit Sabne70a416d2019-04-09 16:17:401351// *) Pop an AffineForOp of the worklist. This 'dstAffineForOp' will be a
River Riddle5052bd82019-02-02 00:42:181352// candidate destination AffineForOp into which fusion will be attempted.
1353// *) Add each LoadOp currently in 'dstAffineForOp' into list 'dstLoadOps'.
MLIR Team3b692302018-12-17 17:57:141354// *) For each LoadOp in 'dstLoadOps' do:
Amit Sabne70a416d2019-04-09 16:17:401355// *) Look up dependent loop nests which have a single store op to the same
MLIR Teamd038e342019-03-01 19:50:251356// memref.
1357// *) Check if dependences would be violated by the fusion.
MLIR Team6892ffb2018-12-20 04:42:551358// *) Get a computation slice of 'srcLoopNest', which adjusts its loop
MLIR Team3b692302018-12-17 17:57:141359// bounds to be functions of 'dstLoopNest' IVs and symbols.
1360// *) Fuse the 'srcLoopNest' computation slice into the 'dstLoopNest',
MLIR Teamd038e342019-03-01 19:50:251361// at a loop depth determined by the cost model in 'isFusionProfitable'.
River Riddle99b87c92019-03-27 21:02:021362// *) Add the newly fused load/store operations to the state,
Amit Sabne70a416d2019-04-09 16:17:401363// and also add newly fused load ops to 'dstLoopOps' to be considered
MLIR Team3b692302018-12-17 17:57:141364// as fusion dst load ops in another iteration.
1365// *) Remove old src loop nest and its associated state.
1366//
MLIR Teamd038e342019-03-01 19:50:251367// The steps of the input-reuse fusion algorithm are as follows:
1368//
1369// *) Initialize 'worklist' with node ids from the dependence graph.
1370// *) For each 'dstNode' in the worklist:
1371// *) Find a candidate sibling node 'sibNode' to fuse with 'dstNode' which
1372// loads from the same memref, but which has no dependence paths to/from.
1373// *) Get a computation slice of 'sibLoopNest', which adjusts its loop
1374// bounds to be functions of 'dstLoopNest' IVs and symbols.
1375// *) Fuse the 'sibLoopNest' computation slice into the 'dstLoopNest',
1376// at a loop depth determined by the cost model in 'isFusionProfitable'.
1377// This function also checks that the memref write region of 'sibLoopNest',
1378// is preserved in the fused loop nest.
1379// *) Update graph state to reflect the fusion of 'sibNode' into 'dstNode'.
1380//
River Riddle99b87c92019-03-27 21:02:021381// Given a graph where top-level operations are vertices in the set 'V' and
MLIR Team3b692302018-12-17 17:57:141382// edges in the set 'E' are dependences between vertices, this algorithm
MLIR Team6892ffb2018-12-20 04:42:551383// takes O(V) time for initialization, and has runtime O(V + E).
MLIR Team3b692302018-12-17 17:57:141384//
MLIR Team6892ffb2018-12-20 04:42:551385// This greedy algorithm is not 'maximal' due to the current restriction of
1386// fusing along single producer consumer edges, but there is a TODO to fix this.
MLIR Team3b692302018-12-17 17:57:141387//
1388// TODO(andydavis) Experiment with other fusion policies.
MLIR Team6892ffb2018-12-20 04:42:551389struct GreedyFusion {
1390public:
MLIR Teamd038e342019-03-01 19:50:251391 // The data dependence graph to traverse during fusion.
MLIR Team6892ffb2018-12-20 04:42:551392 MemRefDependenceGraph *mdg;
MLIR Teamd038e342019-03-01 19:50:251393 // Worklist of graph nodes visited during the fusion pass.
MLIR Teama78edcd2019-02-05 14:57:081394 SmallVector<unsigned, 8> worklist;
MLIR Teamd038e342019-03-01 19:50:251395 // Set of graph nodes which are present on the worklist.
MLIR Teama78edcd2019-02-05 14:57:081396 llvm::SmallDenseSet<unsigned, 16> worklistSet;
MLIR Teamd038e342019-03-01 19:50:251397 // Parameter for local buffer size threshold.
1398 unsigned localBufSizeThreshold;
1399 // Parameter for fast memory space.
1400 Optional<unsigned> fastMemorySpace;
Uday Bondhugulace7e59532019-03-08 17:21:521401 // If true, ignore any additional (redundant) computation tolerance threshold
1402 // that would have prevented fusion.
1403 bool maximalFusion;
MLIR Teamf28e4df2018-11-01 14:26:001404
MLIR Teamd038e342019-03-01 19:50:251405 using Node = MemRefDependenceGraph::Node;
1406
1407 GreedyFusion(MemRefDependenceGraph *mdg, unsigned localBufSizeThreshold,
Uday Bondhugulace7e59532019-03-08 17:21:521408 Optional<unsigned> fastMemorySpace, bool maximalFusion)
MLIR Teamd038e342019-03-01 19:50:251409 : mdg(mdg), localBufSizeThreshold(localBufSizeThreshold),
Uday Bondhugulace7e59532019-03-08 17:21:521410 fastMemorySpace(fastMemorySpace), maximalFusion(maximalFusion) {}
MLIR Teamd038e342019-03-01 19:50:251411
1412 // Initializes 'worklist' with nodes from 'mdg'
1413 void init() {
MLIR Teama78edcd2019-02-05 14:57:081414 // TODO(andydavis) Add a priority queue for prioritizing nodes by different
1415 // metrics (e.g. arithmetic intensity/flops-to-bytes ratio).
MLIR Teamd038e342019-03-01 19:50:251416 worklist.clear();
1417 worklistSet.clear();
1418 for (auto &idAndNode : mdg->nodes) {
1419 const Node &node = idAndNode.second;
1420 worklist.push_back(node.id);
1421 worklistSet.insert(node.id);
1422 }
MLIR Team6892ffb2018-12-20 04:42:551423 }
MLIR Team3b692302018-12-17 17:57:141424
MLIR Teamd038e342019-03-01 19:50:251425 // Run the GreedyFusion pass.
1426 // *) First pass through the nodes fuses single-use producer nodes into their
1427 // unique consumer.
1428 // *) Second pass fuses sibling nodes which share no dependence edges.
1429 // *) Third pass fuses any remaining producer nodes into their users.
1430 void run() {
MLIR Teamc1ff9e82019-03-06 04:33:301431 // TODO(andydavis) Run this repeatedly until a fixed-point is reached.
MLIR Teamd038e342019-03-01 19:50:251432 fuseProducerConsumerNodes(/*maxSrcUserCount=*/1);
1433 fuseSiblingNodes();
1434 fuseProducerConsumerNodes(
1435 /*maxSrcUserCount=*/std::numeric_limits<unsigned>::max());
1436 eraseUnusedMemRefAllocations();
1437 }
1438
1439 void fuseProducerConsumerNodes(unsigned maxSrcUserCount) {
1440 init();
MLIR Team3b692302018-12-17 17:57:141441 while (!worklist.empty()) {
MLIR Team6892ffb2018-12-20 04:42:551442 unsigned dstId = worklist.back();
MLIR Team3b692302018-12-17 17:57:141443 worklist.pop_back();
MLIR Teama78edcd2019-02-05 14:57:081444 worklistSet.erase(dstId);
1445
MLIR Team6892ffb2018-12-20 04:42:551446 // Skip if this node was removed (fused into another node).
1447 if (mdg->nodes.count(dstId) == 0)
MLIR Team3b692302018-12-17 17:57:141448 continue;
MLIR Team6892ffb2018-12-20 04:42:551449 // Get 'dstNode' into which to attempt fusion.
1450 auto *dstNode = mdg->getNode(dstId);
1451 // Skip if 'dstNode' is not a loop nest.
River Riddled5b60ee82019-05-12 01:59:541452 if (!isa<AffineForOp>(dstNode->op))
MLIR Team3b692302018-12-17 17:57:141453 continue;
MLIR Team8f5f2c72019-02-15 17:32:181454 // Sink sequential loops in 'dstNode' (and thus raise parallel loops)
1455 // while preserving relative order. This can increase the maximum loop
1456 // depth at which we can fuse a slice of a producer loop nest into a
1457 // consumer loop nest.
1458 sinkSequentialLoops(dstNode);
MLIR Team3b692302018-12-17 17:57:141459
River Riddle99b87c92019-03-27 21:02:021460 SmallVector<Operation *, 4> loads = dstNode->loads;
1461 SmallVector<Operation *, 4> dstLoadOpInsts;
MLIR Teamc4237ae2019-01-18 16:56:271462 DenseSet<Value *> visitedMemrefs;
MLIR Team6892ffb2018-12-20 04:42:551463 while (!loads.empty()) {
MLIR Team27d067e2019-01-16 17:55:021464 // Get memref of load on top of the stack.
Andy Davis2e1187d2019-07-03 17:35:031465 auto *memref = cast<AffineLoadOp>(loads.back()).getMemRef();
MLIR Teamc4237ae2019-01-18 16:56:271466 if (visitedMemrefs.count(memref) > 0)
1467 continue;
1468 visitedMemrefs.insert(memref);
MLIR Team27d067e2019-01-16 17:55:021469 // Move all loads in 'loads' accessing 'memref' to 'dstLoadOpInsts'.
1470 moveLoadsAccessingMemrefTo(memref, &loads, &dstLoadOpInsts);
MLIR Team6892ffb2018-12-20 04:42:551471 // Skip if no input edges along which to fuse.
1472 if (mdg->inEdges.count(dstId) == 0)
MLIR Team3b692302018-12-17 17:57:141473 continue;
Amit Sabne70a416d2019-04-09 16:17:401474 // Iterate through in-edges for 'dstId' and src node id for any
MLIR Team1e851912019-01-31 00:01:461475 // edges on 'memref'.
1476 SmallVector<unsigned, 2> srcNodeIds;
MLIR Team6892ffb2018-12-20 04:42:551477 for (auto &srcEdge : mdg->inEdges[dstId]) {
1478 // Skip 'srcEdge' if not for 'memref'.
MLIR Teama0f3db402019-01-29 17:36:411479 if (srcEdge.value != memref)
MLIR Team6892ffb2018-12-20 04:42:551480 continue;
MLIR Team1e851912019-01-31 00:01:461481 srcNodeIds.push_back(srcEdge.id);
1482 }
1483 for (unsigned srcId : srcNodeIds) {
1484 // Skip if this node was removed (fused into another node).
1485 if (mdg->nodes.count(srcId) == 0)
1486 continue;
1487 // Get 'srcNode' from which to attempt fusion into 'dstNode'.
1488 auto *srcNode = mdg->getNode(srcId);
MLIR Team6892ffb2018-12-20 04:42:551489 // Skip if 'srcNode' is not a loop nest.
River Riddled5b60ee82019-05-12 01:59:541490 if (!isa<AffineForOp>(srcNode->op))
MLIR Team6892ffb2018-12-20 04:42:551491 continue;
MLIR Teamb28009b2019-01-23 19:11:431492 // Skip if 'srcNode' has more than one store to any memref.
1493 // TODO(andydavis) Support fusing multi-output src loop nests.
1494 if (srcNode->stores.size() != 1)
MLIR Team6892ffb2018-12-20 04:42:551495 continue;
Uday Bondhugula864d9e02019-01-23 17:16:241496
MLIR Team58aa3832019-02-16 01:12:191497 // Skip if 'srcNode' writes to any live in or escaping memrefs,
1498 // and cannot be fused.
1499 bool writesToLiveInOrOut =
1500 mdg->writesToLiveInOrEscapingMemrefs(srcNode->id);
1501 if (writesToLiveInOrOut &&
1502 !canFuseSrcWhichWritesToLiveOut(srcId, dstId, memref, mdg))
MLIR Teamd7c82442019-01-30 23:53:411503 continue;
1504
MLIR Teamd038e342019-03-01 19:50:251505 // Skip if 'srcNode' out edge count on 'memref' > 'maxSrcUserCount'.
1506 if (mdg->getOutEdgeCount(srcNode->id, memref) > maxSrcUserCount)
1507 continue;
1508
River Riddle99b87c92019-03-27 21:02:021509 // Compute an operation list insertion point for the fused loop
MLIR Teama0f3db402019-01-29 17:36:411510 // nest which preserves dependences.
River Riddle99b87c92019-03-27 21:02:021511 Operation *insertPointInst =
MLIR Teama78edcd2019-02-05 14:57:081512 mdg->getFusedLoopNestInsertionPoint(srcNode->id, dstNode->id);
MLIR Teama0f3db402019-01-29 17:36:411513 if (insertPointInst == nullptr)
MLIR Team6892ffb2018-12-20 04:42:551514 continue;
Uday Bondhugula864d9e02019-01-23 17:16:241515
MLIR Team6892ffb2018-12-20 04:42:551516 // Get unique 'srcNode' store op.
Chris Lattner456ad6a2018-12-29 00:05:351517 auto *srcStoreOpInst = srcNode->stores.front();
MLIR Teamd7c82442019-01-30 23:53:411518 // Gather 'dstNode' store ops to 'memref'.
River Riddle99b87c92019-03-27 21:02:021519 SmallVector<Operation *, 2> dstStoreOpInsts;
MLIR Teamd7c82442019-01-30 23:53:411520 for (auto *storeOpInst : dstNode->stores)
Andy Davis2e1187d2019-07-03 17:35:031521 if (cast<AffineStoreOp>(storeOpInst).getMemRef() == memref)
MLIR Teamd7c82442019-01-30 23:53:411522 dstStoreOpInsts.push_back(storeOpInst);
1523
Uday Bondhugulab4a14432019-01-26 00:00:501524 unsigned bestDstLoopDepth;
MLIR Team38c2fe32019-01-14 19:26:251525 mlir::ComputationSliceState sliceState;
MLIR Teama0f3db402019-01-29 17:36:411526 // Check if fusion would be profitable.
MLIR Teamd038e342019-03-01 19:50:251527 if (!isFusionProfitable(srcStoreOpInst, srcStoreOpInst,
1528 dstLoadOpInsts, dstStoreOpInsts, &sliceState,
Uday Bondhugulace7e59532019-03-08 17:21:521529 &bestDstLoopDepth, maximalFusion))
MLIR Team38c2fe32019-01-14 19:26:251530 continue;
Andy Davis898cf0e2019-06-17 16:59:351531 // TODO(andydavis) Remove the following test code when canFuseLoops
1532 // is fully functional.
Andy Davis1de0f972019-05-29 21:02:141533 mlir::ComputationSliceState sliceUnion;
Andy Davis898cf0e2019-06-17 16:59:351534 if (!maximalFusion) {
1535 FusionResult result = mlir::canFuseLoops(
1536 cast<AffineForOp>(srcNode->op), cast<AffineForOp>(dstNode->op),
1537 bestDstLoopDepth, &sliceUnion);
1538 assert(result.value == FusionResult::Success);
1539 (void)result;
1540 }
MLIR Team6892ffb2018-12-20 04:42:551541 // Fuse computation slice of 'srcLoopNest' into 'dstLoopNest'.
River Riddle5052bd82019-02-02 00:42:181542 auto sliceLoopNest = mlir::insertBackwardComputationSlice(
Uday Bondhugulab4a14432019-01-26 00:00:501543 srcStoreOpInst, dstLoadOpInsts[0], bestDstLoopDepth, &sliceState);
Chris Lattnerd9b5bc82019-03-25 02:53:051544 if (sliceLoopNest) {
River Riddleaf1abcc2019-03-25 18:13:311545 LLVM_DEBUG(llvm::dbgs() << "\tslice loop nest:\n"
River Riddlef9d91532019-03-27 00:05:091546 << *sliceLoopNest.getOperation() << "\n");
River Riddle5052bd82019-02-02 00:42:181547 // Move 'dstAffineForOp' before 'insertPointInst' if needed.
River Riddleadca3c22019-05-12 00:57:321548 auto dstAffineForOp = cast<AffineForOp>(dstNode->op);
River Riddlef9d91532019-03-27 00:05:091549 if (insertPointInst != dstAffineForOp.getOperation()) {
1550 dstAffineForOp.getOperation()->moveBefore(insertPointInst);
MLIR Teama0f3db402019-01-29 17:36:411551 }
MLIR Teamc4237ae2019-01-18 16:56:271552 // Update edges between 'srcNode' and 'dstNode'.
MLIR Teama0f3db402019-01-29 17:36:411553 mdg->updateEdges(srcNode->id, dstNode->id, memref);
MLIR Teamc4237ae2019-01-18 16:56:271554
1555 // Collect slice loop stats.
1556 LoopNestStateCollector sliceCollector;
River Riddlef9d91532019-03-27 00:05:091557 sliceCollector.collect(sliceLoopNest.getOperation());
MLIR Teamc4237ae2019-01-18 16:56:271558 // Promote single iteration slice loops to single IV value.
River Riddle5052bd82019-02-02 00:42:181559 for (auto forOp : sliceCollector.forOps) {
1560 promoteIfSingleIteration(forOp);
MLIR Team6892ffb2018-12-20 04:42:551561 }
MLIR Team58aa3832019-02-16 01:12:191562 if (!writesToLiveInOrOut) {
1563 // Create private memref for 'memref' in 'dstAffineForOp'.
River Riddle99b87c92019-03-27 21:02:021564 SmallVector<Operation *, 4> storesForMemref;
MLIR Team58aa3832019-02-16 01:12:191565 for (auto *storeOpInst : sliceCollector.storeOpInsts) {
Andy Davis2e1187d2019-07-03 17:35:031566 if (cast<AffineStoreOp>(storeOpInst).getMemRef() == memref)
MLIR Team58aa3832019-02-16 01:12:191567 storesForMemref.push_back(storeOpInst);
1568 }
1569 assert(storesForMemref.size() == 1);
1570 auto *newMemRef = createPrivateMemRef(
1571 dstAffineForOp, storesForMemref[0], bestDstLoopDepth,
1572 fastMemorySpace, localBufSizeThreshold);
1573 visitedMemrefs.insert(newMemRef);
1574 // Create new node in dependence graph for 'newMemRef' alloc op.
1575 unsigned newMemRefNodeId =
River Riddlef9d91532019-03-27 00:05:091576 mdg->addNode(newMemRef->getDefiningOp());
MLIR Team58aa3832019-02-16 01:12:191577 // Add edge from 'newMemRef' node to dstNode.
1578 mdg->addEdge(newMemRefNodeId, dstId, newMemRef);
MLIR Teamc4237ae2019-01-18 16:56:271579 }
MLIR Teamc4237ae2019-01-18 16:56:271580
1581 // Collect dst loop stats after memref privatizaton transformation.
1582 LoopNestStateCollector dstLoopCollector;
River Riddlef9d91532019-03-27 00:05:091583 dstLoopCollector.collect(dstAffineForOp.getOperation());
MLIR Teamc4237ae2019-01-18 16:56:271584
1585 // Add new load ops to current Node load op list 'loads' to
1586 // continue fusing based on new operands.
1587 for (auto *loadOpInst : dstLoopCollector.loadOpInsts) {
Andy Davis2e1187d2019-07-03 17:35:031588 auto *loadMemRef = cast<AffineLoadOp>(loadOpInst).getMemRef();
MLIR Teamc4237ae2019-01-18 16:56:271589 if (visitedMemrefs.count(loadMemRef) == 0)
1590 loads.push_back(loadOpInst);
1591 }
1592
Amit Sabne70a416d2019-04-09 16:17:401593 // Clear and add back loads and stores.
MLIR Teamc4237ae2019-01-18 16:56:271594 mdg->clearNodeLoadAndStores(dstNode->id);
1595 mdg->addToNode(dstId, dstLoopCollector.loadOpInsts,
1596 dstLoopCollector.storeOpInsts);
MLIR Team71495d52019-01-22 21:23:371597 // Remove old src loop nest if it no longer has outgoing dependence
Amit Sabne70a416d2019-04-09 16:17:401598 // edges, and if it does not write to a memref which escapes the
MLIR Team58aa3832019-02-16 01:12:191599 // function. If 'writesToLiveInOrOut' is true, then 'srcNode' has
1600 // been fused into 'dstNode' and write region of 'dstNode' covers
1601 // the write region of 'srcNode', and 'srcNode' has no other users
1602 // so it is safe to remove.
1603 if (writesToLiveInOrOut || mdg->canRemoveNode(srcNode->id)) {
MLIR Teamc4237ae2019-01-18 16:56:271604 mdg->removeNode(srcNode->id);
River Riddle99b87c92019-03-27 21:02:021605 srcNode->op->erase();
MLIR Teama78edcd2019-02-05 14:57:081606 } else {
1607 // Add remaining users of 'oldMemRef' back on the worklist (if not
1608 // already there), as its replacement with a local/private memref
1609 // has reduced dependences on 'oldMemRef' which may have created
1610 // new fusion opportunities.
1611 if (mdg->outEdges.count(srcNode->id) > 0) {
1612 SmallVector<MemRefDependenceGraph::Edge, 2> oldOutEdges =
1613 mdg->outEdges[srcNode->id];
1614 for (auto &outEdge : oldOutEdges) {
1615 if (outEdge.value == memref &&
1616 worklistSet.count(outEdge.id) == 0) {
1617 worklist.push_back(outEdge.id);
1618 worklistSet.insert(outEdge.id);
1619 }
1620 }
1621 }
MLIR Teamc4237ae2019-01-18 16:56:271622 }
MLIR Team3b692302018-12-17 17:57:141623 }
MLIR Team3b692302018-12-17 17:57:141624 }
1625 }
1626 }
MLIR Teamd038e342019-03-01 19:50:251627 }
1628
1629 // Visits each node in the graph, and for each node, attempts to fuse it with
1630 // its sibling nodes (nodes which share a parent, but no dependence edges).
1631 void fuseSiblingNodes() {
1632 init();
1633 while (!worklist.empty()) {
1634 unsigned dstId = worklist.back();
1635 worklist.pop_back();
1636 worklistSet.erase(dstId);
1637
1638 // Skip if this node was removed (fused into another node).
1639 if (mdg->nodes.count(dstId) == 0)
1640 continue;
1641 // Get 'dstNode' into which to attempt fusion.
1642 auto *dstNode = mdg->getNode(dstId);
1643 // Skip if 'dstNode' is not a loop nest.
River Riddled5b60ee82019-05-12 01:59:541644 if (!isa<AffineForOp>(dstNode->op))
MLIR Teamd038e342019-03-01 19:50:251645 continue;
1646 // Attempt to fuse 'dstNode' with its sibling nodes in the graph.
1647 fuseWithSiblingNodes(dstNode);
1648 }
1649 }
1650
1651 // Attempt to fuse 'dstNode' with sibling nodes in the graph.
1652 void fuseWithSiblingNodes(Node *dstNode) {
1653 DenseSet<unsigned> visitedSibNodeIds;
1654 std::pair<unsigned, Value *> idAndMemref;
1655 while (findSiblingNodeToFuse(dstNode, &visitedSibNodeIds, &idAndMemref)) {
1656 unsigned sibId = idAndMemref.first;
1657 Value *memref = idAndMemref.second;
1658 // TODO(andydavis) Check that 'sibStoreOpInst' post-dominates all other
1659 // stores to the same memref in 'sibNode' loop nest.
1660 auto *sibNode = mdg->getNode(sibId);
River Riddle99b87c92019-03-27 21:02:021661 // Compute an operation list insertion point for the fused loop
MLIR Teamd038e342019-03-01 19:50:251662 // nest which preserves dependences.
River Riddle99b87c92019-03-27 21:02:021663 assert(sibNode->op->getBlock() == dstNode->op->getBlock());
1664 Operation *insertPointInst =
1665 sibNode->op->isBeforeInBlock(dstNode->op)
MLIR Teamd038e342019-03-01 19:50:251666 ? mdg->getFusedLoopNestInsertionPoint(sibNode->id, dstNode->id)
1667 : mdg->getFusedLoopNestInsertionPoint(dstNode->id, sibNode->id);
1668 if (insertPointInst == nullptr)
1669 continue;
1670
1671 // Check if fusion would be profitable and at what depth.
1672
1673 // Get unique 'sibNode' load op to 'memref'.
River Riddle99b87c92019-03-27 21:02:021674 SmallVector<Operation *, 2> sibLoadOpInsts;
MLIR Teamd038e342019-03-01 19:50:251675 sibNode->getLoadOpsForMemref(memref, &sibLoadOpInsts);
1676 // Currently findSiblingNodeToFuse searches for siblings with one load.
1677 assert(sibLoadOpInsts.size() == 1);
River Riddle99b87c92019-03-27 21:02:021678 Operation *sibLoadOpInst = sibLoadOpInsts[0];
MLIR Teamd038e342019-03-01 19:50:251679 assert(!sibNode->stores.empty());
1680 // TODO(andydavis) Choose the store which postdominates all other stores.
1681 auto *sibStoreOpInst = sibNode->stores.back();
1682
1683 // Gather 'dstNode' load ops to 'memref'.
River Riddle99b87c92019-03-27 21:02:021684 SmallVector<Operation *, 2> dstLoadOpInsts;
MLIR Teamd038e342019-03-01 19:50:251685 dstNode->getLoadOpsForMemref(memref, &dstLoadOpInsts);
1686
1687 // Gather 'dstNode' store ops to 'memref'.
River Riddle99b87c92019-03-27 21:02:021688 SmallVector<Operation *, 2> dstStoreOpInsts;
MLIR Teamd038e342019-03-01 19:50:251689 dstNode->getStoreOpsForMemref(memref, &dstStoreOpInsts);
1690
1691 unsigned bestDstLoopDepth;
1692 mlir::ComputationSliceState sliceState;
1693
1694 // Check if fusion would be profitable.
1695 if (!isFusionProfitable(sibLoadOpInst, sibStoreOpInst, dstLoadOpInsts,
Uday Bondhugulace7e59532019-03-08 17:21:521696 dstStoreOpInsts, &sliceState, &bestDstLoopDepth,
1697 maximalFusion))
MLIR Teamd038e342019-03-01 19:50:251698 continue;
1699
1700 // Fuse computation slice of 'sibLoopNest' into 'dstLoopNest'.
1701 auto sliceLoopNest = mlir::insertBackwardComputationSlice(
1702 sibLoadOpInst, dstLoadOpInsts[0], bestDstLoopDepth, &sliceState);
1703 if (sliceLoopNest != nullptr) {
River Riddleadca3c22019-05-12 00:57:321704 auto dstForInst = cast<AffineForOp>(dstNode->op);
River Riddle99b87c92019-03-27 21:02:021705 // Update operation position of fused loop nest (if needed).
River Riddlef9d91532019-03-27 00:05:091706 if (insertPointInst != dstForInst.getOperation()) {
1707 dstForInst.getOperation()->moveBefore(insertPointInst);
MLIR Teamd038e342019-03-01 19:50:251708 }
1709 // Update data dependence graph state post fusion.
1710 updateStateAfterSiblingFusion(sliceLoopNest, sibNode, dstNode);
1711 }
1712 }
1713 }
1714
MLIR Team9d30b362019-03-29 15:06:251715 // Searches function argument uses and the graph from 'dstNode' looking for a
1716 // fusion candidate sibling node which shares no dependences with 'dstNode'
1717 // but which loads from the same memref. Returns true and sets
1718 // 'idAndMemrefToFuse' on success. Returns false otherwise.
MLIR Teamd038e342019-03-01 19:50:251719 bool findSiblingNodeToFuse(Node *dstNode,
1720 DenseSet<unsigned> *visitedSibNodeIds,
1721 std::pair<unsigned, Value *> *idAndMemrefToFuse) {
MLIR Team9d30b362019-03-29 15:06:251722 // Returns true if 'sibNode' can be fused with 'dstNode' for input reuse
1723 // on 'memref'.
1724 auto canFuseWithSibNode = [&](Node *sibNode, Value *memref) {
1725 // Skip if 'outEdge' is not a read-after-write dependence.
1726 // TODO(andydavis) Remove restrict to single load op restriction.
1727 if (sibNode->getLoadOpCount(memref) != 1)
1728 return false;
1729 // Skip if there exists a path of dependent edges between
1730 // 'sibNode' and 'dstNode'.
1731 if (mdg->hasDependencePath(sibNode->id, dstNode->id) ||
1732 mdg->hasDependencePath(dstNode->id, sibNode->id))
1733 return false;
1734 // Skip sib node if it loads to (and stores from) the same memref on
1735 // which it also has an input dependence edge.
1736 DenseSet<Value *> loadAndStoreMemrefSet;
1737 sibNode->getLoadAndStoreMemrefSet(&loadAndStoreMemrefSet);
1738 if (llvm::any_of(loadAndStoreMemrefSet, [=](Value *memref) {
1739 return mdg->getIncomingMemRefAccesses(sibNode->id, memref) > 0;
1740 }))
1741 return false;
1742
1743 // Check that all stores are to the same memref.
1744 DenseSet<Value *> storeMemrefs;
1745 for (auto *storeOpInst : sibNode->stores) {
Andy Davis2e1187d2019-07-03 17:35:031746 storeMemrefs.insert(cast<AffineStoreOp>(storeOpInst).getMemRef());
MLIR Team9d30b362019-03-29 15:06:251747 }
1748 if (storeMemrefs.size() != 1)
1749 return false;
1750 return true;
1751 };
1752
1753 // Search for siblings which load the same memref function argument.
River Riddlece502af2019-07-08 18:20:261754 auto fn = dstNode->op->getParentOfType<FuncOp>();
River Riddle54cd6a72019-07-01 17:29:091755 for (unsigned i = 0, e = fn.getNumArguments(); i != e; ++i) {
1756 for (auto *user : fn.getArgument(i)->getUsers()) {
Andy Davis2e1187d2019-07-03 17:35:031757 if (auto loadOp = dyn_cast<AffineLoadOp>(user)) {
MLIR Team9d30b362019-03-29 15:06:251758 // Gather loops surrounding 'use'.
1759 SmallVector<AffineForOp, 4> loops;
River Riddle8780d8d2019-05-18 18:09:071760 getLoopIVs(*user, &loops);
MLIR Team9d30b362019-03-29 15:06:251761 // Skip 'use' if it is not within a loop nest.
1762 if (loops.empty())
1763 continue;
1764 Node *sibNode = mdg->getForOpNode(loops[0]);
1765 assert(sibNode != nullptr);
1766 // Skip 'use' if it not a sibling to 'dstNode'.
1767 if (sibNode->id == dstNode->id)
1768 continue;
1769 // Skip 'use' if it has been visited.
1770 if (visitedSibNodeIds->count(sibNode->id) > 0)
1771 continue;
1772 // Skip 'use' if it does not load from the same memref as 'dstNode'.
1773 auto *memref = loadOp.getMemRef();
1774 if (dstNode->getLoadOpCount(memref) == 0)
1775 continue;
1776 // Check if 'sibNode/dstNode' can be input-reuse fused on 'memref'.
1777 if (canFuseWithSibNode(sibNode, memref)) {
1778 visitedSibNodeIds->insert(sibNode->id);
1779 idAndMemrefToFuse->first = sibNode->id;
1780 idAndMemrefToFuse->second = memref;
1781 return true;
1782 }
1783 }
1784 }
1785 }
1786
1787 // Search for siblings by following edges through an intermediate src node.
MLIR Teamd038e342019-03-01 19:50:251788 // Collect candidate 'dstNode' input edges in 'inEdges'.
1789 SmallVector<MemRefDependenceGraph::Edge, 2> inEdges;
1790 mdg->forEachMemRefInputEdge(
1791 dstNode->id, [&](MemRefDependenceGraph::Edge inEdge) {
1792 // Add 'inEdge' if it is a read-after-write dependence.
1793 if (dstNode->getLoadOpCount(inEdge.value) > 0 &&
1794 mdg->getNode(inEdge.id)->getStoreOpCount(inEdge.value) > 0)
1795 inEdges.push_back(inEdge);
1796 });
1797
1798 // Search for sibling nodes to fuse by visiting output edges from each input
1799 // edge in 'inEdges'.
1800 for (auto &inEdge : inEdges) {
1801 // Collect candidate output edges from each node 'inEdge.id' in 'inEdges'.
1802 SmallVector<MemRefDependenceGraph::Edge, 2> outEdges;
1803 mdg->forEachMemRefOutputEdge(
1804 inEdge.id, [&](MemRefDependenceGraph::Edge outEdge) {
1805 unsigned sibNodeId = outEdge.id;
1806 if (visitedSibNodeIds->count(sibNodeId) > 0)
1807 return;
1808 // Skip output edge if not a sibling using the same memref.
1809 if (outEdge.id == dstNode->id || outEdge.value != inEdge.value)
1810 return;
1811 auto *sibNode = mdg->getNode(sibNodeId);
River Riddled5b60ee82019-05-12 01:59:541812 if (!isa<AffineForOp>(sibNode->op))
MLIR Teamd038e342019-03-01 19:50:251813 return;
MLIR Team9d30b362019-03-29 15:06:251814 // Check if 'sibNode/dstNode' can be input-reuse fused on 'memref'.
1815 if (canFuseWithSibNode(sibNode, outEdge.value)) {
1816 // Add candidate 'outEdge' to sibling node.
1817 outEdges.push_back(outEdge);
MLIR Teamd038e342019-03-01 19:50:251818 }
MLIR Teamd038e342019-03-01 19:50:251819 });
1820
1821 // Add first candidate if any were returned.
1822 if (!outEdges.empty()) {
1823 visitedSibNodeIds->insert(outEdges[0].id);
1824 idAndMemrefToFuse->first = outEdges[0].id;
1825 idAndMemrefToFuse->second = outEdges[0].value;
1826 return true;
1827 }
1828 }
1829 return false;
1830 }
1831
Chris Lattnerd9b5bc82019-03-25 02:53:051832 void updateStateAfterSiblingFusion(AffineForOp sliceLoopNest, Node *sibNode,
1833 Node *dstNode) {
MLIR Teamd038e342019-03-01 19:50:251834 // Update 'sibNode' and 'dstNode' input/output edges to reflect fusion.
1835 mdg->updateEdges(sibNode->id, dstNode->id);
1836
1837 // Collect slice loop stats.
1838 LoopNestStateCollector sliceCollector;
River Riddlef9d91532019-03-27 00:05:091839 sliceCollector.collect(sliceLoopNest.getOperation());
MLIR Teamd038e342019-03-01 19:50:251840 // Promote single iteration slice loops to single IV value.
1841 for (auto forOp : sliceCollector.forOps) {
1842 promoteIfSingleIteration(forOp);
1843 }
1844
1845 // Collect dst loop stats after memref privatizaton transformation.
River Riddleadca3c22019-05-12 00:57:321846 auto dstForInst = cast<AffineForOp>(dstNode->op);
MLIR Teamd038e342019-03-01 19:50:251847 LoopNestStateCollector dstLoopCollector;
River Riddlef9d91532019-03-27 00:05:091848 dstLoopCollector.collect(dstForInst.getOperation());
MLIR Teamd038e342019-03-01 19:50:251849 // Clear and add back loads and stores
1850 mdg->clearNodeLoadAndStores(dstNode->id);
1851 mdg->addToNode(dstNode->id, dstLoopCollector.loadOpInsts,
1852 dstLoopCollector.storeOpInsts);
1853 // Remove old sibling loop nest if it no longer has outgoing dependence
1854 // edges, and it does not write to a memref which escapes the
1855 // function.
1856 if (mdg->getOutEdgeCount(sibNode->id) == 0) {
1857 mdg->removeNode(sibNode->id);
River Riddleadca3c22019-05-12 00:57:321858 sibNode->op->erase();
MLIR Teamd038e342019-03-01 19:50:251859 }
1860 }
1861
1862 // Clean up any allocs with no users.
1863 void eraseUnusedMemRefAllocations() {
MLIR Teamc4237ae2019-01-18 16:56:271864 for (auto &pair : mdg->memrefEdgeCount) {
1865 if (pair.second > 0)
1866 continue;
1867 auto *memref = pair.first;
River Riddle99b87c92019-03-27 21:02:021868 // Skip if there exist other uses (return operation or function calls).
MLIR Team71495d52019-01-22 21:23:371869 if (!memref->use_empty())
1870 continue;
MLIR Teamc4237ae2019-01-18 16:56:271871 // Use list expected to match the dep graph info.
River Riddle99b87c92019-03-27 21:02:021872 auto *op = memref->getDefiningOp();
River Riddle1423acc2019-04-23 21:38:261873 if (isa_and_nonnull<AllocOp>(op))
River Riddle99b87c92019-03-27 21:02:021874 op->erase();
MLIR Teamc4237ae2019-01-18 16:56:271875 }
MLIR Teamf28e4df2018-11-01 14:26:001876 }
MLIR Team3b692302018-12-17 17:57:141877};
1878
1879} // end anonymous namespace
MLIR Teamf28e4df2018-11-01 14:26:001880
River Riddleed5fe202019-02-28 22:50:421881void LoopFusion::runOnFunction() {
Uday Bondhugulad4b3ff12019-02-27 00:10:191882 // Override if a command line argument was provided.
Uday Bondhugula8be26272019-02-02 01:06:221883 if (clFusionFastMemorySpace.getNumOccurrences() > 0) {
1884 fastMemorySpace = clFusionFastMemorySpace.getValue();
1885 }
1886
Uday Bondhugulad4b3ff12019-02-27 00:10:191887 // Override if a command line argument was provided.
1888 if (clFusionLocalBufThreshold.getNumOccurrences() > 0) {
1889 localBufSizeThreshold = clFusionLocalBufThreshold * 1024;
1890 }
1891
Uday Bondhugulace7e59532019-03-08 17:21:521892 if (clMaximalLoopFusion.getNumOccurrences() > 0)
1893 maximalFusion = clMaximalLoopFusion;
1894
MLIR Team6892ffb2018-12-20 04:42:551895 MemRefDependenceGraph g;
Uday Bondhugula02af8c22019-03-05 23:05:341896 if (g.init(getFunction()))
Uday Bondhugulace7e59532019-03-08 17:21:521897 GreedyFusion(&g, localBufSizeThreshold, fastMemorySpace, maximalFusion)
1898 .run();
MLIR Teamf28e4df2018-11-01 14:26:001899}
Jacques Pienaar6f0fb222018-11-07 02:34:181900
Nicolas Vasilache258e8d92019-05-03 18:07:371901static PassRegistration<LoopFusion> pass("affine-loop-fusion",
1902 "Fuse loop nests");