Module 4: Virtual Memory

Operating System
Operating Concepts
System – 9th–Edition
Concepts 9th Edition 9.1 Silberschatz, Galvin and Gagne ©2013
 Virtual Memory
 Background
 Demand Paging
 Copy-on-Write
 Page Replacement
 Allocation of Frames
 Thrashing

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 1. Background

 Code needs to be in memory to execute, but entire program rarely used

 Error code, unusual routines, large data structures
 Entire program code not needed at same time
 Consider ability to execute partially-loaded program
 Program no longer constrained by limits of physical memory
 Each program takes less memory while running -> more programs run at
the same time
 Increased CPU utilization and throughput with no increase in response
time or turnaround time

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 What is virtual memory?
 Virtual memory is a technique that allows the execution of processes that are not
completely in memory.
 One major advantage of this scheme is that programs can be larger than physical
memory.
 Logical address space can therefore be much larger than physical address space

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 Virtual Memory That is Larger Than Physical Memory

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  Virtual address space – logical view of how process is
stored in memory
 Usually start at address 0, contiguous addresses until end of
space
 Meanwhile, physical memory organized in page frames
 MMU must map logical to physical
 Virtual memory can be implemented via:
1. Demand paging
2. Demand segmentation

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 Virtual-address Space
 Usually design logical address space for stack to start at Max logical
address and grow “down” while heap grows “up”
 Maximizes address space use
 Unused address space between the two is hole
 No physical memory needed until heap or stack grows to a
given new page
 Enables sparse address spaces with holes left for growth, dynamically
linked libraries, etc
 System libraries shared via mapping into virtual address space
 Shared memory by mapping pages read-write into virtual address
space
 Pages can be shared during fork(), speeding process creation

Vrtual address space

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 Shared Library Using Virtual Memory

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 2. Demand Paging
 Bring a page into memory only when it is
needed
 Lazy swapper is used which never swaps
a page into memory unless page will be
needed

 Less I/O needed, no unnecessary I/O

 Less memory needed
 Faster response
 More users
 Similar to paging system with swapping
 Page is needed  reference to it
 invalid reference  abort
 not-in-memory  bring to memory

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 Basic Concepts
 With swapping, pager guesses which pages will be used before swapping out
again
 Instead, pager brings in only those pages into memory
 How to determine that set of pages?
 Need new MMU functionality to implement demand paging
 If pages needed are already memory resident
 No difference from non demand-paging
 If page needed and not memory resident
 Need to detect and load the page into memory from storage
 Without changing program behavior
 Without programmer needing to change code

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 Valid-Invalid Bit
 With each page table entry a valid–invalid bit is associated
(v  in-memory – memory resident, i  not-in-memory)
 Initially valid–invalid bit is set to i on all entries
 Example of a page table snapshot:

 During MMU address translation, if valid–invalid bit in page table entry is i  page fault

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 Page Table When Some Pages Are Not in Main Memory

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 Page Fault

 If there is a reference to a page and that page is not there in main

memory is called page fault
 first reference to that page will trap to operating system:
page fault
1. Operating system looks at another table to decide:
 Invalid reference  abort
 Just not in memory

2. Find free frame

3. Swap page into frame via scheduled disk operation
4. Reset tables to indicate page now in memory
Set validation bit = v
5. Restart the instruction that caused the page fault

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 Steps in Handling a Page Fault

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 Aspects of Demand Paging
 Extreme case – start process with no pages in memory
 OS sets instruction pointer to first instruction of process, non-memory-resident -> page fault
 And for every other process pages on first access
 Pure demand paging
 Actually, a given instruction could access multiple pages -> multiple page faults
 Consider fetch and decode of instruction which adds 2 numbers from memory and stores result back
to memory
 Pain decreased because of locality of reference
 Hardware support needed for demand paging
 Page table with valid / invalid bit
 Secondary memory (swap device with swap space)
 Instruction restart

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 Performance of Demand Paging
 Stages in Demand Paging (worse case)
1. Trap to the operating system
2. Save the user registers and process state
3. Determine that the interrupt was a page fault
4. Check that the page reference was legal and determine the location of the page on the disk
5. Issue a read from the disk to a free frame:
1. Wait in a queue for this device until the read request is serviced
2. Wait for the device seek and/or latency time
3. Begin the transfer of the page to a free frame
6. While waiting, allocate the CPU to some other user
7. Receive an interrupt from the disk I/O subsystem (I/O completed)
8. Save the registers and process state for the other user
9. Determine that the interrupt was from the disk
10. Correct the page table and other tables to show page is now in memory
11. Wait for the CPU to be allocated to this process again
12. Restore the user registers, process state, and new page table, and then resume the interrupted
instruction

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 Performance of Demand Paging
 Three major activities
1. Service the interrupt
2. Read the page
3. Restart the process

 The first and third tasks can be reduced, with careful coding( normally 1
to 100 microseconds)
 Second task will probably take 8 milliseconds

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  Page Fault Rate 0  p  1
 if p = 0 no page faults
 if p = 1, every reference is a fault
 Effective Access Time (EAT)
EAT = (1 – p) x memory access
+ p (page fault overhead)

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 Demand Paging Example
 Let p be the probability of page fault
 Memory access time = 200 nanoseconds
 Average page-fault service time = 8 milliseconds
– EAT = (1 – p) x 200 + p (8 milliseconds)
= (1 – p ) x 200 + p x 8,000,000
= 200 + 7,999,800 x p
 If one access out of 1,000 causes a page fault, then
EAT = 8.2 microseconds.
 EAT is directly proportional to no.of page fault

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 Copy-on-Write

 Copy-on-Write (COW) allows both parent and child processes to

initially share the same pages in memory
 If either process modifies a shared page, only then is the page
copied
 COW allows more efficient process creation as only modified pages are copied
 In general, free pages are allocated from a pool of zero-fill-on-demand pages
 vfork() variation on fork

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 Before Process 1 Modifies Page C

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 After Process 1 Modifies Page C

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 Page Replacement

 When free frames not available then old page will be replaced by new

page is known as page replacement

 Prevent over-allocation of memory by modifying page-fault service routine to include page
replacement
 Use modify (dirty) bit to reduce overhead of page transfers – only modified pages are written to disk

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 Need For Page Replacement

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 Basic Page Replacement
1. Find the location of the desired page on disk

2. Find a free frame:

- If there is a free frame, use it
- If there is no free frame, use a page replacement algorithm to select a victim
frame
- Write victim frame to disk if dirty

3. Bring the desired page into the (newly) free frame; update the page and frame tables

4. Continue the process by restarting the instruction that caused the trap

Note now potentially 2 page transfers for page fault – increasing EAT

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 Steps in Page Replacement

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 Page and Frame Replacement Algorithms

1. FIFO: First in First Out

2. LRU: Least Recently used
3. Optimal Algorithm

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 1. First-In-First-Out (FIFO) Algorithm

 The page that comes to the memory first will be replaced

first .
 When a page must be replaced, the oldest page is chosen.
 A FIFO replacement algorithm associates with each page the time when that page was
brought into memory.

Example
Given a Reference string: 7,0,1,2,0,3,0,4,2,3,0,3,2,1,2,0,1,7,0,1
3 frames available
Calculate the number of page faults?

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 Solution

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 Graph of Page Faults Versus The Number of Frames

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 Limitation of FIFO
 For some reference string Adding more frames can cause more page
faults is known as Belady’s Anomaly

 Consider 1,2,3,4,1,2,5,1,2,3,4,5
 Notice that the number of faults for four frames (ten) is greater than the
number of faults for three frames (nine)!

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 FIFO Illustrating Belady’s Anomaly

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 2. Least Recently Used (LRU) Algorithm

 Replace page that has not been used in the longest period of time
 Use past knowledge rather than future
 Associate time of last use with each page

Example
Given a Reference string: 7,0,1,2,0,3,0,4,2,3,0,3,2,1,2,0,1,7,0,1
3 frames available
Calculate the number of page faults?

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  12 faults – better than FIFO but worse than OPT
 Generally good algorithm and frequently used

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 3. Optimal Algorithm

 Replace page that will not be used for longest period of time
 Best among other two
 Results lowest number of page faults

Example
Given a Reference string: 7,0,1,2,0,3,0,4,2,3,0,3,2,1,2,0,1,7,0,1
3 frames available
Calculate the number of page faults?

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 No of page faults is 9

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 Drawback

 The optimal page-replacement algorithm is difficult to implement,

because it requires future knowledge of the reference string.
 Difficult for determining the future reference.
 Advance knowledge is required about future reference.

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 Example-2

Consider the following page reference string

1,2,3,4,2,1,5,6,2,1,2,3,7,6,3,2,1,2,3,6. Assume 4 and 5 free frames are
Available.
Calculate the number of page faults by applying the Following Algorithms
a) FIFO b) LRU c) Optimal algorithm

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 Example-3

Consider the following page reference string 1 0 7 1 0 2 1 2 3 0 3 2 4 0 3 6

2 1. Assume 3 free frames are Available.
Calculate the number of page faults by applying the Following Algorithms
a) FIFO b) LRU c) Optimal algorithm

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 Example-4

Consider the following page reference string 1 2 3 4 1 2 5 1 2 3

4 5. Assume 4 free frames are Available.
Calculate the number of page faults by applying the Following
Algorithms
a) FIFO b) LRU c) Optimal algorithm

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 LRU Algorithm implementation
1. Counter implementation
 we associate with each page-table entry a time-of-use field and add to the CPU a logical clock or
counter
 When a page needs to be changed, look at the counters to find smallest value

2. Stack implementation
 Stack contains the page numbers
 When page is referenced it is kept at top
 Bottom will contain the LRU page
 Use doubly linked list for middle element deletion

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 Allocation of Frames

 Two major allocation schemes

 fixed allocation
 priority allocation
 Many variations

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 Fixed Allocation

 Equal allocation – For example, if there are 100 frames (after

allocating frames for the OS) and 5 processes, give each process
20 frames
 Proportional allocation – Allocate according to the size of process

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 Priority Allocation

 Use a proportional allocation scheme using priorities rather

than size

 If process Pi generates a page fault,

 select for replacement one of its frames
 select for replacement a frame from a process with lower
priority number

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 Global vs. Local Allocation
 Global replacement – process selects a replacement frame from the set of
all frames; one process can take a frame from another
 process execution time can vary greatly
 greater throughput so more common

 Local replacement – each process selects from only its own set of
allocated frames
 More consistent per-process performance
 But possibly underutilized memory

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 Thrashing

 Thrashing  a process is busy swapping pages in and out

rather than executing
 If a process does not have “enough” frames, the page-fault rate is very high
 When there is a page fault Then Replace the existing frame
 But quickly need replaced frame back
 This leads to:
 Low CPU utilization
 Operating system thinking that it needs to increase the degree of multiprogramming
 Another process added to the system

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 Thrashing (Cont.)

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 End

Operating System
Operating Concepts
System – 9th–Edition
Concepts 9th Edition 9.49 Silberschatz, Galvin and Gagne ©2013