Implementation of OR Gate from NAND Gate

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NAND Gate is a universal logic gate, using which we can realize any logic gate. Read this tutorial to find out how you can realize an OR gate using a NAND gate. Before going into the implementation part, let's have a brief overview of OR and NAND gates.

What is an OR Gate?

An OR Gate is a basic logic gate. An OR gate may accept two or more than two inputs, but gives only one output. The OR gate gives a HIGH (Logic 1) output if any one of its inputs is in the HIGH or Logic 1 state, otherwise, it gives a LOW (Logic 0) state as output. Therefore, the output of the OR gate is LOW or Logic 0 state, only if its all inputs are LOW or Logic 0 state.

The OR gate is also known as an "any or all gate" or "an inclusive OR gate". The logic symbol of a two input OR gate is shown in Figure-1.

Output Equation of OR Gate

If A and B are the input variables and Y is the output variable, then the output equation of the OR gate is given by,

$$\mathrm{Y \: = \: A \: + \: B}$$

Where, the '+' symbol represents the OR operation. It is read as Y is equal to A OR B.

Truth Table of OR Gate

The table that shows the relationship between inputs and output of a logic gate is referred to as a Truth Table. The following is the truth table for the OR Gate −

What is a NAND Gate?

The NAND Gate is a type of universal logic gate. Where, a universal logic gate is one that can be used to realize any kind logical expression or any other type of logic gate.

A NAND gate is basically a combination of two basic logic gates namely AND gate and NOT gate, i.e.,

$$\mathrm{NAND \: Logic \: = \: AND \: Logic \: + \: NOT \: Logic}$$

A NAND gate is the type of logic gate whose output is LOW (Logic 0) when all its inputs are high, and its output is HIGH (Logic 1), when any of its inputs is LOW (Logic 0). Therefore, the operation of the NAND gate is opposite that of the AND gate. The logic symbol of a two input NAND gate is shown in Figure-2.

Output Equation of NAND Gate

If A and B are the input variables and Y is the output variable of the NAND gate, then its output is given by,

$$\mathrm{Y \: = \: \overline{A \: \cdot \: B} \: = \: (A \: \cdot \: B)'}$$

It is read as "Y is equal to A.B whole bar".

Truth Table of NAND Gate

The following is the truth table of the NAND gate −

Now, let us discuss the implementation of OR Gate from NAND Gate.

Implementation of OR Gate from NAND Gate

The NAND gate is a universal gate, therefore, it can be used to realize the OR gate. The implementation of OR gate using the NAND gate is shown in Figure-3.

The NAND circuit shown in Figure-3 is equivalent to an OR gate. It is also known as bubbled NAND Gate, where the bubbled NAND gate is equivalent to the OR gate in operation.

Theory of OR Gate using NAND Gate

To realize the OR gate using NAND gate, we first complement the inputs A and B. This is done by the NAND Gate 1 and 2 in the above Figure-3. Then, these complemented inputs, i.e. A' and B' are applied to a NAND Gate (NAND Gate 3). Thus, we get,

$$\mathrm{Y \: = \: \overline{\bar{A} \: \cdot \: \bar{B}}}$$

Using De Morgen's Law, we have,

$$\mathrm{Y \: = \: \bar{\bar{A}} \: + \: \bar{\bar{B}} \: = \: A \: + \: B}$$

This is the output equation of the OR gate. Therefore, the logic circuit of NAND gates in Figure-3 is equivalent to the OR Gate.